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Ryan Mallonb8d41dd2011-06-05 07:21:22 +00001/*
2 * Bluewater Systems Snapper 9260 and 9G20 modules
3 *
4 * (C) Copyright 2011 Bluewater Systems
5 * Author: Andre Renaud <andre@bluewatersys.com>
6 * Author: Ryan Mallon <ryan@bluewatersys.com>
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Ryan Mallonb8d41dd2011-06-05 07:21:22 +00009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/* SoC type is defined in boards.cfg */
15#include <asm/hardware.h>
Alexey Brodkin1ace4022014-02-26 17:47:58 +040016#include <linux/sizes.h>
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000017
Simon Glass5e8a7492014-10-29 13:08:55 -060018#define CONFIG_SYS_TEXT_BASE 0x21f00000
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000019
20/* ARM asynchronous clock */
21#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
Simon Glasscd052cd2014-10-29 13:08:56 -060023#define CONFIG_SYS_GENERIC_BOARD
Simon Glass1a1927f2014-10-29 13:09:01 -060024#define CONFIG_DM
25#define CONFIG_CMD_DM
26#define CONFIG_DM_GPIO
27#define CONFIG_DM_SERIAL
28#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000029
30/* CPU */
31#define CONFIG_ARCH_CPU_INIT
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000032
33#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
34#define CONFIG_SETUP_MEMORY_TAGS
35#define CONFIG_INITRD_TAG
36#define CONFIG_SKIP_LOWLEVEL_INIT
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000037#define CONFIG_DISPLAY_CPUINFO
38#define CONFIG_FIT
39
40/* SDRAM */
41#define CONFIG_NR_DRAM_BANKS 1
42#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
43#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
44#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
45 GENERATED_GBL_DATA_SIZE)
46
47/* Mem test settings */
48#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
49#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
50
51/* NAND Flash */
52#define CONFIG_NAND_ATMEL
53#define CONFIG_SYS_NO_FLASH
54#define CONFIG_SYS_MAX_NAND_DEVICE 1
55#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
56#define CONFIG_SYS_NAND_DBW_8
57#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
58#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
59#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
60#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
61
62/* Ethernet */
63#define CONFIG_MACB
64#define CONFIG_RMII
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000065#define CONFIG_NET_RETRY_COUNT 20
66#define CONFIG_RESET_PHY_R
Heiko Schocher4535a242013-11-18 08:07:23 +010067#define CONFIG_AT91_WANTS_COMMON_PHY
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000068#define CONFIG_TFTP_PORT
69#define CONFIG_TFTP_TSIZE
70
71/* USB */
72#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +080073#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000074#define CONFIG_USB_OHCI_NEW
75#define CONFIG_DOS_PARTITION
76#define CONFIG_SYS_USB_OHCI_CPU_INIT
77#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
78#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
79#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
80#define CONFIG_USB_STORAGE
81
82/* GPIOs and IO expander */
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000083#define CONFIG_ATMEL_LEGACY
84#define CONFIG_AT91_GPIO
85#define CONFIG_AT91_GPIO_PULLUP 1
86#define CONFIG_PCA953X
87#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
88#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
89
90/* UARTs/Serial console */
91#define CONFIG_ATMEL_USART
Simon Glass1a1927f2014-10-29 13:09:01 -060092#ifndef CONFIG_DM_SERIAL
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000093#define CONFIG_USART_BASE ATMEL_BASE_DBGU
94#define CONFIG_USART_ID ATMEL_ID_SYS
Simon Glass1a1927f2014-10-29 13:09:01 -060095#endif
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000096#define CONFIG_BAUDRATE 115200
Ryan Mallonb8d41dd2011-06-05 07:21:22 +000097#define CONFIG_SYS_PROMPT "Snapper> "
98
99/* I2C - Bit-bashed */
Heiko Schocherea818db2013-01-29 08:53:15 +0100100#define CONFIG_SYS_I2C
101#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
102#define CONFIG_SYS_I2C_SOFT_SPEED 100000
103#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
Ryan Mallonb8d41dd2011-06-05 07:21:22 +0000104#define CONFIG_SOFT_I2C_READ_REPEATED_START
Ryan Mallonb8d41dd2011-06-05 07:21:22 +0000105#define I2C_INIT do { \
106 at91_set_gpio_output(AT91_PIN_PA23, 1); \
107 at91_set_gpio_output(AT91_PIN_PA24, 1); \
108 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
109 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
110 } while (0)
111#define I2C_SOFT_DECLARATIONS
112#define I2C_ACTIVE
113#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
114#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
115#define I2C_SDA(bit) do { \
116 if (bit) { \
117 at91_set_gpio_input(AT91_PIN_PA23, 1); \
118 } else { \
119 at91_set_gpio_output(AT91_PIN_PA23, 1); \
120 at91_set_gpio_value(AT91_PIN_PA23, bit); \
121 } \
122 } while (0)
123#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
124#define I2C_DELAY udelay(2)
125
126/* Boot options */
127#define CONFIG_SYS_LOAD_ADDR 0x23000000
128#define CONFIG_BOOTDELAY 3
129#define CONFIG_ZERO_BOOTDELAY_CHECK
130
131#define CONFIG_BOOTP_BOOTFILESIZE
132#define CONFIG_BOOTP_BOOTPATH
133#define CONFIG_BOOTP_GATEWAY
134#define CONFIG_BOOTP_HOSTNAME
135
136/* Environment settings */
137#define CONFIG_ENV_IS_IN_NAND
138#define CONFIG_ENV_OFFSET (512 << 10)
139#define CONFIG_ENV_SIZE (256 << 10)
140#define CONFIG_ENV_OVERWRITE
141#define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any"
142
143/* Console settings */
144#define CONFIG_SYS_CBSIZE 256
145#define CONFIG_SYS_MAXARGS 16
146#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
147 sizeof(CONFIG_SYS_PROMPT) + 16)
148#define CONFIG_SYS_LONGHELP
Ryan Mallonb8d41dd2011-06-05 07:21:22 +0000149#define CONFIG_CMDLINE_EDITING
150#define CONFIG_AUTO_COMPLETE
151#define CONFIG_SYS_HUSH_PARSER
Ryan Mallonb8d41dd2011-06-05 07:21:22 +0000152
153/* U-Boot memory settings */
154#define CONFIG_SYS_MALLOC_LEN (1 << 20)
Ryan Mallonb8d41dd2011-06-05 07:21:22 +0000155
156/* Command line configuration */
157#include <config_cmd_default.h>
158#undef CONFIG_CMD_BDI
159#undef CONFIG_CMD_FPGA
160#undef CONFIG_CMD_IMI
161#undef CONFIG_CMD_IMLS
162#undef CONFIG_CMD_LOADS
163#undef CONFIG_CMD_SOURCE
164
165#define CONFIG_CMD_PING
166#define CONFIG_CMD_DHCP
167#define CONFIG_CMD_FAT
168#define CONFIG_CMD_I2C
Simon Glass1a1927f2014-10-29 13:09:01 -0600169#define CONFIG_CMD_GPIO
Ryan Mallonb8d41dd2011-06-05 07:21:22 +0000170#define CONFIG_CMD_USB
171#define CONFIG_CMD_MII
172#define CONFIG_CMD_NAND
173#define CONFIG_CMD_PCA953X
174#define CONFIG_CMD_PCA953X_INFO
175
176#endif /* __CONFIG_H */