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Stefano Babic649a33e2010-11-30 11:46:56 -05001/*
2 * (C) Copyright 2010
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de
4 *
5 * Based on da850evm.c, original Copyrights follow:
6 *
7 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
8 *
9 * Based on da830evm.c. Original Copyrights follow:
10 *
11 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
12 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <common.h>
30#include <i2c.h>
31#include <net.h>
32#include <netdev.h>
33#include <asm/arch/hardware.h>
34#include <asm/arch/emif_defs.h>
35#include <asm/arch/emac_defs.h>
36#include <asm/io.h>
37#include <asm/arch/davinci_misc.h>
Bastian Ruppertca1646b2011-10-04 23:43:29 +000038#include <asm/arch/gpio.h>
Stefano Babic3c891012011-10-04 23:43:37 +000039#include <asm/arch/da8xx-fb.h>
Stefano Babic649a33e2010-11-30 11:46:56 -050040
41DECLARE_GLOBAL_DATA_PTR;
42
Stefano Babic3c891012011-10-04 23:43:37 +000043static const struct da8xx_panel lcd_panel = {
44 /* Casio COM57H531x */
45 .name = "Casio_COM57H531x",
46 .width = 640,
47 .height = 480,
48 .hfp = 12,
49 .hbp = 144,
50 .hsw = 30,
51 .vfp = 10,
52 .vbp = 35,
53 .vsw = 3,
54 .pxl_clk = 25000000,
55 .invert_pxl_clk = 0,
56};
57
Stefano Babic649a33e2010-11-30 11:46:56 -050058/* SPI0 pin muxer settings */
59static const struct pinmux_config spi1_pins[] = {
60 { pinmux(5), 1, 1 },
61 { pinmux(5), 1, 2 },
62 { pinmux(5), 1, 4 },
63 { pinmux(5), 1, 5 }
64};
65
Stefano Babic42059872011-10-04 23:43:38 +000066/* I2C pin muxer settings */
67static const struct pinmux_config i2c_pins[] = {
68 { pinmux(4), 2, 2 },
69 { pinmux(4), 2, 3 }
70};
71
Bastian Ruppertf9fc2372011-10-04 23:43:28 +000072/* UART0 pin muxer settings */
Stefano Babic649a33e2010-11-30 11:46:56 -050073static const struct pinmux_config uart_pins[] = {
Bastian Ruppertf9fc2372011-10-04 23:43:28 +000074 { pinmux(3), 2, 7 },
75 { pinmux(3), 2, 6 },
76 { pinmux(3), 2, 4 },
77 { pinmux(3), 2, 5 }
Stefano Babic649a33e2010-11-30 11:46:56 -050078};
79
80#ifdef CONFIG_DRIVER_TI_EMAC
81#define HAS_RMII 1
82static const struct pinmux_config emac_pins[] = {
83 { pinmux(14), 8, 2 },
84 { pinmux(14), 8, 3 },
85 { pinmux(14), 8, 4 },
86 { pinmux(14), 8, 5 },
87 { pinmux(14), 8, 6 },
88 { pinmux(14), 8, 7 },
89 { pinmux(15), 8, 1 },
90 { pinmux(4), 8, 0 },
91 { pinmux(4), 8, 1 }
92};
93#endif
94
95#ifdef CONFIG_NAND_DAVINCI
96const struct pinmux_config nand_pins[] = {
Stefano Babic17a89042011-10-04 23:43:30 +000097 { pinmux(7), 1, 0}, /* CS2 */
98 { pinmux(7), 0, 1}, /* CS3 in three state*/
99 { pinmux(7), 1, 4 }, /* EMA_WE */
100 { pinmux(7), 1, 5 }, /* EMA_OE */
101 { pinmux(9), 1, 0 }, /* EMA_D[7] */
102 { pinmux(9), 1, 1 }, /* EMA_D[6] */
103 { pinmux(9), 1, 2 }, /* EMA_D[5] */
104 { pinmux(9), 1, 3 }, /* EMA_D[4] */
105 { pinmux(9), 1, 4 }, /* EMA_D[3] */
106 { pinmux(9), 1, 5 }, /* EMA_D[2] */
107 { pinmux(9), 1, 6 }, /* EMA_D[1] */
108 { pinmux(9), 1, 7 }, /* EMA_D[0] */
109 { pinmux(12), 1, 5 }, /* EMA_A[2] */
110 { pinmux(12), 1, 6 }, /* EMA_A[1] */
111 { pinmux(6), 1, 0 } /* EMA_CLK */
Stefano Babic649a33e2010-11-30 11:46:56 -0500112};
113#endif
114
Bastian Ruppertca1646b2011-10-04 23:43:29 +0000115const struct pinmux_config gpio_pins[] = {
116 { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
117 { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
Bastian Ruppert8540b162011-10-04 23:43:34 +0000118 { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
119 { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */
120 { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/
Bastian Ruppertca1646b2011-10-04 23:43:29 +0000121};
122
Stefano Babic3c891012011-10-04 23:43:37 +0000123const struct pinmux_config lcd_pins[] = {
124 { pinmux(17), 2, 1 }, /* LCD_D_0 */
125 { pinmux(17), 2, 0 }, /* LCD_D_1 */
126 { pinmux(16), 2, 7 }, /* LCD_D_2 */
127 { pinmux(16), 2, 6 }, /* LCD_D_3 */
128 { pinmux(16), 2, 5 }, /* LCD_D_4 */
129 { pinmux(16), 2, 4 }, /* LCD_D_5 */
130 { pinmux(16), 2, 3 }, /* LCD_D_6 */
131 { pinmux(16), 2, 2 }, /* LCD_D_7 */
132 { pinmux(18), 2, 1 }, /* LCD_D_8 */
133 { pinmux(18), 2, 0 }, /* LCD_D_9 */
134 { pinmux(17), 2, 7 }, /* LCD_D_10 */
135 { pinmux(17), 2, 6 }, /* LCD_D_11 */
136 { pinmux(17), 2, 5 }, /* LCD_D_12 */
137 { pinmux(17), 2, 4 }, /* LCD_D_13 */
138 { pinmux(17), 2, 3 }, /* LCD_D_14 */
139 { pinmux(17), 2, 2 }, /* LCD_D_15 */
140 { pinmux(18), 2, 6 }, /* LCD_PCLK */
141 { pinmux(19), 2, 0 }, /* LCD_HSYNC */
142 { pinmux(19), 2, 1 }, /* LCD_VSYNC */
143 { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
144};
145
Bastian Rupperte5ee9122011-10-04 23:43:33 +0000146const struct pinmux_config halten_pin[] = {
147 { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */
148};
149
Stefano Babic649a33e2010-11-30 11:46:56 -0500150static const struct pinmux_resource pinmuxes[] = {
151#ifdef CONFIG_SPI_FLASH
152 PINMUX_ITEM(spi1_pins),
153#endif
154 PINMUX_ITEM(uart_pins),
Stefano Babic42059872011-10-04 23:43:38 +0000155 PINMUX_ITEM(i2c_pins),
Stefano Babic649a33e2010-11-30 11:46:56 -0500156#ifdef CONFIG_NAND_DAVINCI
157 PINMUX_ITEM(nand_pins),
158#endif
Stefano Babic3c891012011-10-04 23:43:37 +0000159#ifdef CONFIG_VIDEO
160 PINMUX_ITEM(lcd_pins),
161#endif
Stefano Babic649a33e2010-11-30 11:46:56 -0500162};
163
164static const struct lpsc_resource lpsc[] = {
165 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
166 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
167 { DAVINCI_LPSC_EMAC }, /* image download */
Bastian Ruppertf9fc2372011-10-04 23:43:28 +0000168 { DAVINCI_LPSC_UART0 }, /* console */
Stefano Babic649a33e2010-11-30 11:46:56 -0500169 { DAVINCI_LPSC_GPIO },
Stefano Babic3c891012011-10-04 23:43:37 +0000170 { DAVINCI_LPSC_LCDC }, /* LCD */
Stefano Babic649a33e2010-11-30 11:46:56 -0500171};
172
Stefano Babic1c6ec6d2011-10-04 23:43:31 +0000173int board_early_init_f(void)
Stefano Babic649a33e2010-11-30 11:46:56 -0500174{
Bastian Ruppertca1646b2011-10-04 23:43:29 +0000175 struct davinci_gpio *gpio6_base =
176 (struct davinci_gpio *)DAVINCI_GPIO_BANK67;
177
178 /* PinMux for GPIO */
179 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
180 return 1;
181
182 /* Set the RESETOUTn low */
183 writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
184 &gpio6_base->set_data);
185 writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
186
187 /* Set U0_SW0 low for UART0 as console*/
188 writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
189 &gpio6_base->set_data);
190 writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
191
192 /* Set U0_SW1 low for UART0 as console*/
193 writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
194 &gpio6_base->set_data);
195 writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
196
Bastian Ruppert8540b162011-10-04 23:43:34 +0000197 /* Set LCD_B_PWR low to power down LCD Backlight*/
198 writel((readl(&gpio6_base->set_data) & ~(1 << 6)),
199 &gpio6_base->set_data);
200 writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir);
201
202 /* Set DISP_ON low to disable LCD output*/
203 writel((readl(&gpio6_base->set_data) & ~(1 << 1)),
204 &gpio6_base->set_data);
205 writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir);
206
Stefano Babic649a33e2010-11-30 11:46:56 -0500207#ifndef CONFIG_USE_IRQ
208 irq_init();
209#endif
210
Stefano Babic649a33e2010-11-30 11:46:56 -0500211 /*
212 * NAND CS setup - cycle counts based on da850evm NAND timings in the
213 * Linux kernel @ 25MHz EMIFA
214 */
Stefano Babic17a89042011-10-04 23:43:30 +0000215#ifdef CONFIG_NAND_DAVINCI
Stefano Babic649a33e2010-11-30 11:46:56 -0500216 writel((DAVINCI_ABCR_WSETUP(0) |
Stefano Babic17a89042011-10-04 23:43:30 +0000217 DAVINCI_ABCR_WSTROBE(1) |
Stefano Babic649a33e2010-11-30 11:46:56 -0500218 DAVINCI_ABCR_WHOLD(0) |
219 DAVINCI_ABCR_RSETUP(0) |
220 DAVINCI_ABCR_RSTROBE(1) |
221 DAVINCI_ABCR_RHOLD(0) |
222 DAVINCI_ABCR_TA(0) |
223 DAVINCI_ABCR_ASIZE_8BIT),
Stefano Babic17a89042011-10-04 23:43:30 +0000224 &davinci_emif_regs->ab1cr); /* CS2 */
Stefano Babic649a33e2010-11-30 11:46:56 -0500225#endif
226
Stefano Babic649a33e2010-11-30 11:46:56 -0500227 /*
228 * Power on required peripherals
229 * ARM does not have access by default to PSC0 and PSC1
230 * assuming here that the DSP bootloader has set the IOPU
231 * such that PSC access is available to ARM
232 */
233 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
234 return 1;
235
236 /* setup the SUSPSRC for ARM to control emulation suspend */
237 writel(readl(&davinci_syscfg_regs->suspsrc) &
238 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
239 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
Bastian Ruppertf9fc2372011-10-04 23:43:28 +0000240 DAVINCI_SYSCFG_SUSPSRC_UART0),
Stefano Babic649a33e2010-11-30 11:46:56 -0500241 &davinci_syscfg_regs->suspsrc);
242
243 /* configure pinmux settings */
244 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
245 return 1;
246
247#ifdef CONFIG_DRIVER_TI_EMAC
248 if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
249 return 1;
250
251 davinci_emac_mii_mode_sel(HAS_RMII);
252#endif /* CONFIG_DRIVER_TI_EMAC */
253
254 /* enable the console UART */
255 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
256 DAVINCI_UART_PWREMU_MGMT_UTRST),
Bastian Ruppertf9fc2372011-10-04 23:43:28 +0000257 &davinci_uart0_ctrl_regs->pwremu_mgmt);
Stefano Babic649a33e2010-11-30 11:46:56 -0500258
Stefano Babic3c891012011-10-04 23:43:37 +0000259 /*
260 * Reconfigure the LCDC priority to the highest to ensure that
261 * the throughput/latency requirements for the LCDC are met.
262 */
263 writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
264 &davinci_syscfg_regs->mstpri[2]);
265
266 /* Set LCD_B_PWR low to power up LCD Backlight*/
267 writel((readl(&gpio6_base->set_data) | (1 << 6)),
268 &gpio6_base->set_data);
269
270 /* Set DISP_ON low to disable LCD output*/
271 writel((readl(&gpio6_base->set_data) | (1 << 1)),
272 &gpio6_base->set_data);
273
Stefano Babic649a33e2010-11-30 11:46:56 -0500274 return 0;
275}
276
Stefano Babic1c6ec6d2011-10-04 23:43:31 +0000277int board_init(void)
278{
279 /* arch number of the board */
280 gd->bd->bi_arch_number = MACH_TYPE_EA20;
281
282 /* address of boot parameters */
283 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
284
Stefano Babic3c891012011-10-04 23:43:37 +0000285 da8xx_video_init(&lcd_panel, 16);
286
Stefano Babic1c6ec6d2011-10-04 23:43:31 +0000287 return 0;
288}
Bastian Rupperte5ee9122011-10-04 23:43:33 +0000289
290#ifdef BOARD_LATE_INIT
291
292int board_late_init(void)
293{
294 struct davinci_gpio *gpio8_base =
295 (struct davinci_gpio *)DAVINCI_GPIO_BANK8;
296
297 /* PinMux for HALTEN */
298 if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
299 return 1;
300
301 /* Set HALTEN to high */
302 writel((readl(&gpio8_base->set_data) | (1 << 6)),
303 &gpio8_base->set_data);
304 writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir);
305
Stefano Babic3c891012011-10-04 23:43:37 +0000306 setenv("stdout", "serial");
307
Bastian Rupperte5ee9122011-10-04 23:43:33 +0000308 return 0;
309}
310#endif /* BOARD_LATE_INIT */
311
Stefano Babic649a33e2010-11-30 11:46:56 -0500312#ifdef CONFIG_DRIVER_TI_EMAC
313
314/*
315 * Initializes on-board ethernet controllers.
316 */
317int board_eth_init(bd_t *bis)
318{
319 if (!davinci_emac_initialize()) {
320 printf("Error: Ethernet init failed!\n");
321 return -1;
322 }
323
324 /*
325 * This board has a RMII PHY. However, the MDC line on the SOM
326 * must not be disabled (there is no MII PHY on the
327 * baseboard) via the GPIO2[6], because this pin
328 * disables at the same time the SPI flash.
329 */
330
331 return 0;
332}
333#endif /* CONFIG_DRIVER_TI_EMAC */