| Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 1 | menu "Timer Support" |
| 2 | |
| 3 | config TIMER |
| Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 4 | bool "Enable driver model for timer drivers" |
| Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 5 | depends on DM |
| 6 | help |
| Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 7 | Enable driver model for timer access. It uses the same API as |
| 8 | lib/time.c, but now implemented by the uclass. The first timer |
| Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 9 | will be used. The timer is usually a 32 bits free-running up |
| 10 | counter. There may be no real tick, and no timer interrupt. |
| 11 | |
| Simon Glass | c95fec3 | 2016-02-24 09:14:49 -0700 | [diff] [blame] | 12 | config TIMER_EARLY |
| 13 | bool "Allow timer to be used early in U-Boot" |
| 14 | depends on TIMER |
| 15 | help |
| 16 | In some cases the timer must be accessible before driver model is |
| 17 | active. Examples include when using CONFIG_TRACE to trace U-Boot's |
| 18 | execution before driver model is set up. Enable this option to |
| 19 | use an early timer. These functions must be supported by your timer |
| 20 | driver: timer_early_get_count() and timer_early_get_rate(). |
| 21 | |
| Thomas Chou | a54915d | 2015-10-22 22:28:53 +0800 | [diff] [blame] | 22 | config ALTERA_TIMER |
| Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 23 | bool "Altera timer support" |
| Thomas Chou | a54915d | 2015-10-22 22:28:53 +0800 | [diff] [blame] | 24 | depends on TIMER |
| 25 | help |
| Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 26 | Select this to enable a timer for Altera devices. Please find |
| Thomas Chou | a54915d | 2015-10-22 22:28:53 +0800 | [diff] [blame] | 27 | details on the "Embedded Peripherals IP User Guide" of Altera. |
| 28 | |
| Thomas Chou | 9961a0b | 2015-10-30 15:35:52 +0800 | [diff] [blame] | 29 | config SANDBOX_TIMER |
| Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 30 | bool "Sandbox timer support" |
| Thomas Chou | 9961a0b | 2015-10-30 15:35:52 +0800 | [diff] [blame] | 31 | depends on SANDBOX && TIMER |
| 32 | help |
| 33 | Select this to enable an emulated timer for sandbox. It gets |
| 34 | time from host os. |
| 35 | |
| Bin Meng | 7030f27 | 2015-11-13 00:11:24 -0800 | [diff] [blame] | 36 | config X86_TSC_TIMER |
| 37 | bool "x86 Time-Stamp Counter (TSC) timer support" |
| 38 | depends on TIMER && X86 |
| 39 | default y if X86 |
| 40 | help |
| 41 | Select this to enable Time-Stamp Counter (TSC) timer for x86. |
| 42 | |
| Mugunthan V N | dadf313 | 2015-12-24 16:08:07 +0530 | [diff] [blame] | 43 | config OMAP_TIMER |
| 44 | bool "Omap timer support" |
| 45 | depends on TIMER |
| 46 | help |
| 47 | Select this to enable an timer for Omap devices. |
| 48 | |
| maxims@google.com | 4697abe | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 49 | config AST_TIMER |
| 50 | bool "Aspeed ast2400/ast2500 timer support" |
| 51 | depends on TIMER |
| 52 | default y if ARCH_ASPEED |
| 53 | help |
| 54 | Select this to enable timer for Aspeed ast2400/ast2500 devices. |
| 55 | This is a simple sys timer driver, it is compatible with lib/time.c, |
| 56 | but does not support any interrupts. Even though SoC has 8 hardware |
| 57 | counters, they are all treated as a single device by this driver. |
| 58 | This is mostly because they all share several registers which |
| 59 | makes it difficult to completely separate them. |
| 60 | |
| Patrice Chotard | 347cb2e | 2017-02-21 13:37:05 +0100 | [diff] [blame] | 61 | config STI_TIMER |
| 62 | bool "STi timer support" |
| 63 | depends on TIMER |
| 64 | default y if ARCH_STI |
| 65 | help |
| 66 | Select this to enable a timer for STi devices. |
| 67 | |
| Vlad Zakharov | ad9b5f7 | 2017-03-21 14:49:47 +0300 | [diff] [blame] | 68 | config ARC_TIMER |
| 69 | bool "ARC timer support" |
| 70 | depends on TIMER && ARC && CLK |
| 71 | help |
| 72 | Select this to enable built-in ARC timers. |
| 73 | ARC cores may have up to 2 built-in timers: timer0 and timer1, |
| 74 | usually at least one of them exists. Either of them is supported |
| 75 | in U-Boot. |
| 76 | |
| rick | f5076f8 | 2017-05-17 10:59:20 +0800 | [diff] [blame] | 77 | config AG101P_TIMER |
| rick | b841b6e | 2017-05-18 14:37:53 +0800 | [diff] [blame^] | 78 | bool "AG101P timer support" |
| 79 | depends on TIMER && NDS32 |
| rick | f5076f8 | 2017-05-17 10:59:20 +0800 | [diff] [blame] | 80 | help |
| rick | b841b6e | 2017-05-18 14:37:53 +0800 | [diff] [blame^] | 81 | Select this to enable a timer for AG01P devices. |
| 82 | |
| 83 | config AE3XX_TIMER |
| 84 | bool "AE3XX timer support" |
| 85 | depends on TIMER && NDS32 |
| 86 | help |
| 87 | Select this to enable a timer for AE3XX devices. |
| rick | f5076f8 | 2017-05-17 10:59:20 +0800 | [diff] [blame] | 88 | |
| Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 89 | endmenu |