Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Sascha Hauer, Pengutronix |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
Stefano Babic | 8627111 | 2011-03-14 15:43:56 +0100 | [diff] [blame] | 25 | #include <asm/arch/imx-regs.h> |
Stefano Babic | 9f008bb | 2011-07-13 14:34:52 +0200 | [diff] [blame] | 26 | #include <asm/arch/clock.h> |
Stefano Babic | f76888c | 2010-10-06 08:59:26 +0200 | [diff] [blame] | 27 | #include <asm/io.h> |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 28 | |
| 29 | static u32 mx31_decode_pll(u32 reg, u32 infreq) |
| 30 | { |
| 31 | u32 mfi = (reg >> 10) & 0xf; |
Jens Gehrlein | 079edb9 | 2008-07-04 16:50:05 +0200 | [diff] [blame] | 32 | u32 mfn = reg & 0x3ff; |
| 33 | u32 mfd = (reg >> 16) & 0x3ff; |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 34 | u32 pd = (reg >> 26) & 0xf; |
| 35 | |
| 36 | mfi = mfi <= 5 ? 5 : mfi; |
| 37 | mfd += 1; |
| 38 | pd += 1; |
| 39 | |
| 40 | return ((2 * (infreq >> 10) * (mfi * mfd + mfn)) / |
| 41 | (mfd * pd)) << 10; |
| 42 | } |
| 43 | |
Guennadi Liakhovetski | 2ab02fd | 2008-05-08 10:09:27 +0200 | [diff] [blame] | 44 | static u32 mx31_get_mpl_dpdgck_clk(void) |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 45 | { |
| 46 | u32 infreq; |
| 47 | |
| 48 | if ((__REG(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM) |
| 49 | infreq = CONFIG_MX31_CLK32 * 1024; |
| 50 | else |
| 51 | infreq = CONFIG_MX31_HCLK_FREQ; |
| 52 | |
| 53 | return mx31_decode_pll(__REG(CCM_MPCTL), infreq); |
| 54 | } |
| 55 | |
Guennadi Liakhovetski | 2ab02fd | 2008-05-08 10:09:27 +0200 | [diff] [blame] | 56 | static u32 mx31_get_mcu_main_clk(void) |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 57 | { |
| 58 | /* For now we assume mpl_dpdgck_clk == mcu_main_clk |
| 59 | * which should be correct for most boards |
| 60 | */ |
| 61 | return mx31_get_mpl_dpdgck_clk(); |
| 62 | } |
| 63 | |
Stefano Babic | 9f008bb | 2011-07-13 14:34:52 +0200 | [diff] [blame] | 64 | static u32 mx31_get_ipg_clk(void) |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 65 | { |
| 66 | u32 freq = mx31_get_mcu_main_clk(); |
| 67 | u32 pdr0 = __REG(CCM_PDR0); |
| 68 | |
| 69 | freq /= ((pdr0 >> 3) & 0x7) + 1; |
| 70 | freq /= ((pdr0 >> 6) & 0x3) + 1; |
| 71 | |
| 72 | return freq; |
| 73 | } |
| 74 | |
| 75 | void mx31_dump_clocks(void) |
| 76 | { |
| 77 | u32 cpufreq = mx31_get_mcu_main_clk(); |
| 78 | printf("mx31 cpu clock: %dMHz\n",cpufreq / 1000000); |
| 79 | printf("ipg clock : %dHz\n", mx31_get_ipg_clk()); |
| 80 | } |
| 81 | |
Stefano Babic | 9f008bb | 2011-07-13 14:34:52 +0200 | [diff] [blame] | 82 | unsigned int mxc_get_clock(enum mxc_clock clk) |
| 83 | { |
| 84 | switch (clk) { |
| 85 | case MXC_ARM_CLK: |
| 86 | return mx31_get_mcu_main_clk(); |
| 87 | case MXC_IPG_CLK: |
Stefano Babic | 67f463b | 2011-08-30 00:51:13 +0000 | [diff] [blame] | 88 | case MXC_IPG_PERCLK: |
Stefano Babic | 9f008bb | 2011-07-13 14:34:52 +0200 | [diff] [blame] | 89 | case MXC_CSPI_CLK: |
| 90 | case MXC_UART_CLK: |
| 91 | return mx31_get_ipg_clk(); |
| 92 | } |
| 93 | return -1; |
| 94 | } |
| 95 | |
| 96 | u32 imx_get_uartclk(void) |
| 97 | { |
| 98 | return mxc_get_clock(MXC_UART_CLK); |
| 99 | } |
| 100 | |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 101 | void mx31_gpio_mux(unsigned long mode) |
| 102 | { |
| 103 | unsigned long reg, shift, tmp; |
| 104 | |
Magnus Lilja | 5276a35 | 2008-08-03 21:44:10 +0200 | [diff] [blame] | 105 | reg = IOMUXC_BASE + (mode & 0x1fc); |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 106 | shift = (~mode & 0x3) * 8; |
| 107 | |
| 108 | tmp = __REG(reg); |
| 109 | tmp &= ~(0xff << shift); |
Magnus Lilja | 5276a35 | 2008-08-03 21:44:10 +0200 | [diff] [blame] | 110 | tmp |= ((mode >> IOMUX_MODE_POS) & 0xff) << shift; |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 111 | __REG(reg) = tmp; |
| 112 | } |
| 113 | |
Stefano Babic | f76888c | 2010-10-06 08:59:26 +0200 | [diff] [blame] | 114 | void mx31_set_pad(enum iomux_pins pin, u32 config) |
| 115 | { |
Stefano Babic | d078b7c | 2010-10-19 20:19:13 +0200 | [diff] [blame] | 116 | u32 field, l, reg; |
Stefano Babic | f76888c | 2010-10-06 08:59:26 +0200 | [diff] [blame] | 117 | |
| 118 | pin &= IOMUX_PADNUM_MASK; |
| 119 | reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4; |
| 120 | field = (pin + 2) % 3; |
| 121 | |
Stefano Babic | d078b7c | 2010-10-19 20:19:13 +0200 | [diff] [blame] | 122 | l = __REG(reg); |
Stefano Babic | f76888c | 2010-10-06 08:59:26 +0200 | [diff] [blame] | 123 | l &= ~(0x1ff << (field * 10)); |
| 124 | l |= config << (field * 10); |
Stefano Babic | d078b7c | 2010-10-19 20:19:13 +0200 | [diff] [blame] | 125 | __REG(reg) = l; |
Stefano Babic | f76888c | 2010-10-06 08:59:26 +0200 | [diff] [blame] | 126 | |
| 127 | } |
| 128 | |
Fabio Estevam | 4adaf9b | 2011-04-11 16:18:12 +0000 | [diff] [blame] | 129 | struct mx3_cpu_type mx31_cpu_type[] = { |
Stefano Babic | 2f22045 | 2011-04-29 08:56:27 +0200 | [diff] [blame] | 130 | { .srev = 0x00, .v = 0x10 }, |
| 131 | { .srev = 0x10, .v = 0x11 }, |
| 132 | { .srev = 0x11, .v = 0x11 }, |
| 133 | { .srev = 0x12, .v = 0x1F }, |
| 134 | { .srev = 0x13, .v = 0x1F }, |
| 135 | { .srev = 0x14, .v = 0x12 }, |
| 136 | { .srev = 0x15, .v = 0x12 }, |
| 137 | { .srev = 0x28, .v = 0x20 }, |
| 138 | { .srev = 0x29, .v = 0x20 }, |
Fabio Estevam | 4adaf9b | 2011-04-11 16:18:12 +0000 | [diff] [blame] | 139 | }; |
| 140 | |
Stefano Babic | 2f22045 | 2011-04-29 08:56:27 +0200 | [diff] [blame] | 141 | u32 get_cpu_rev(void) |
Fabio Estevam | 4adaf9b | 2011-04-11 16:18:12 +0000 | [diff] [blame] | 142 | { |
| 143 | u32 i, srev; |
| 144 | |
| 145 | /* read SREV register from IIM module */ |
| 146 | struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR; |
| 147 | srev = readl(&iim->iim_srev); |
| 148 | |
| 149 | for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) |
| 150 | if (srev == mx31_cpu_type[i].srev) |
| 151 | return mx31_cpu_type[i].v; |
Stefano Babic | 2f22045 | 2011-04-29 08:56:27 +0200 | [diff] [blame] | 152 | |
| 153 | return srev | 0x8000; |
Fabio Estevam | 4adaf9b | 2011-04-11 16:18:12 +0000 | [diff] [blame] | 154 | } |
| 155 | |
Stefano Babic | d43458d | 2011-05-17 13:45:41 +0200 | [diff] [blame] | 156 | static char *get_reset_cause(void) |
Fabio Estevam | 25d8e1b | 2011-04-18 07:38:11 +0000 | [diff] [blame] | 157 | { |
| 158 | /* read RCSR register from CCM module */ |
| 159 | struct clock_control_regs *ccm = |
| 160 | (struct clock_control_regs *)CCM_BASE; |
| 161 | |
| 162 | u32 cause = readl(&ccm->rcsr) & 0x07; |
| 163 | |
| 164 | switch (cause) { |
| 165 | case 0x0000: |
| 166 | return "POR"; |
Fabio Estevam | 25d8e1b | 2011-04-18 07:38:11 +0000 | [diff] [blame] | 167 | case 0x0001: |
| 168 | return "RST"; |
Fabio Estevam | 25d8e1b | 2011-04-18 07:38:11 +0000 | [diff] [blame] | 169 | case 0x0002: |
| 170 | return "WDOG"; |
Fabio Estevam | 25d8e1b | 2011-04-18 07:38:11 +0000 | [diff] [blame] | 171 | case 0x0006: |
| 172 | return "JTAG"; |
Fabio Estevam | 25d8e1b | 2011-04-18 07:38:11 +0000 | [diff] [blame] | 173 | default: |
| 174 | return "unknown reset"; |
| 175 | } |
| 176 | } |
| 177 | |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 178 | #if defined(CONFIG_DISPLAY_CPUINFO) |
| 179 | int print_cpuinfo (void) |
| 180 | { |
Stefano Babic | 2f22045 | 2011-04-29 08:56:27 +0200 | [diff] [blame] | 181 | u32 srev = get_cpu_rev(); |
| 182 | |
Fabio Estevam | b6ce479 | 2011-09-16 04:01:22 +0000 | [diff] [blame^] | 183 | printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.\n", |
Stefano Babic | 2f22045 | 2011-04-29 08:56:27 +0200 | [diff] [blame] | 184 | (srev & 0xF0) >> 4, (srev & 0x0F), |
| 185 | ((srev & 0x8000) ? " unknown" : ""), |
| 186 | mx31_get_mcu_main_clk() / 1000000); |
Fabio Estevam | 25d8e1b | 2011-04-18 07:38:11 +0000 | [diff] [blame] | 187 | printf("Reset cause: %s\n", get_reset_cause()); |
Sascha Hauer | 9b56f4f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 188 | return 0; |
| 189 | } |
| 190 | #endif |