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Tom Warrenee4bbbc2011-01-27 10:58:08 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27#include <asm/sizes.h>
28#include "tegra2-common.h"
29
30/* High-level configuration options */
31#define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M"
32#define V_PROMPT "Tegra2 (SeaBoard) # "
33#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard"
34
35/* Board-specific serial config */
36#define CONFIG_SERIAL_MULTI
37#define CONFIG_TEGRA2_ENABLE_UARTD
38#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
39
Simon Glassbf800882011-11-05 04:46:47 +000040/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
41#define CONFIG_UART_DISABLE_GPIO GPIO_PI3
42
Tom Warren05858732011-02-23 09:54:31 +000043#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
Tom Warrenee4bbbc2011-01-27 10:58:08 +000044#define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */
45
Tom Warren74652cf2011-04-14 12:18:06 +000046#define CONFIG_BOARD_EARLY_INIT_F
Tom Warren83800952011-05-31 10:30:38 +000047
Simon Glassbf800882011-11-05 04:46:47 +000048/* SPI */
49#define CONFIG_TEGRA2_SPI
50#define CONFIG_SPI_FLASH
51#define CONFIG_SPI_FLASH_WINBOND
52#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
53#define CONFIG_CMD_SPI
54#define CONFIG_CMD_SF
Simon Glass9dd79fd2011-11-05 04:46:48 +000055#define CONFIG_SPI_FLASH_SIZE (4 << 20)
Simon Glassbf800882011-11-05 04:46:47 +000056
Tom Warren83800952011-05-31 10:30:38 +000057/* SD/MMC */
58#define CONFIG_MMC
59#define CONFIG_GENERIC_MMC
60#define CONFIG_TEGRA2_MMC
61#define CONFIG_CMD_MMC
62
63#define CONFIG_DOS_PARTITION
64#define CONFIG_EFI_PARTITION
65#define CONFIG_CMD_EXT2
66#define CONFIG_CMD_FAT
Simon Glass9dd79fd2011-11-05 04:46:48 +000067
68/* Environment in SPI */
69#define CONFIG_ENV_IS_IN_SPI_FLASH
70#define CONFIG_ENV_SPI_MAX_HZ 48000000
71#define CONFIG_ENV_SPI_MODE SPI_MODE_0
72
73#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
74#define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
Tom Warrenee4bbbc2011-01-27 10:58:08 +000075#endif /* __CONFIG_H */