blob: bd801ccdc2a30ff313ff7016f18375e5e1e81d9e [file] [log] [blame]
Matthias Fuchs72c5d522007-12-28 17:07:14 +01001/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Matthias Fuchs72c5d522007-12-28 17:07:14 +01006 */
7
8OUTPUT_ARCH(powerpc)
Matthias Fuchs72c5d522007-12-28 17:07:14 +01009SECTIONS
10{
11 /* Read-only sections, merged into text segment: */
12 . = + SIZEOF_HEADERS;
13 .interp : { *(.interp) }
14 .hash : { *(.hash) }
15 .dynsym : { *(.dynsym) }
16 .dynstr : { *(.dynstr) }
17 .rel.text : { *(.rel.text) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020018 .rela.text : { *(.rela.text) }
Matthias Fuchs72c5d522007-12-28 17:07:14 +010019 .rel.data : { *(.rel.data) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020020 .rela.data : { *(.rela.data) }
21 .rel.rodata : { *(.rel.rodata) }
22 .rela.rodata : { *(.rela.rodata) }
Matthias Fuchs72c5d522007-12-28 17:07:14 +010023 .rel.got : { *(.rel.got) }
24 .rela.got : { *(.rela.got) }
25 .rel.ctors : { *(.rel.ctors) }
26 .rela.ctors : { *(.rela.ctors) }
27 .rel.dtors : { *(.rel.dtors) }
28 .rela.dtors : { *(.rela.dtors) }
29 .rel.bss : { *(.rel.bss) }
30 .rela.bss : { *(.rela.bss) }
31 .rel.plt : { *(.rel.plt) }
32 .rela.plt : { *(.rela.plt) }
33 .init : { *(.init) }
34 .plt : { *(.plt) }
35 .text :
36 {
37 /* WARNING - the following is hand-optimized to fit within */
38 /* the sector layout of our flash chips! XXX FIXME XXX */
39
Stefan Roesea47a12b2010-04-15 16:07:28 +020040 arch/powerpc/cpu/ppc4xx/start.o (.text)
Matthias Fuchs72c5d522007-12-28 17:07:14 +010041
42 /* Align to next NAND block */
43 . = ALIGN(0x4000);
Jean-Christophe PLAGNIOL-VILLARD0cf4fd32008-09-10 22:48:01 +020044 common/env_embedded.o (.ppcenv)
Matthias Fuchs72c5d522007-12-28 17:07:14 +010045 /* Keep some space here for redundant env and potential bad env blocks */
46 . = ALIGN(0x10000);
47
48 *(.text)
Matthias Fuchs72c5d522007-12-28 17:07:14 +010049 *(.got1)
50 }
51 _etext = .;
52 PROVIDE (etext = .);
53 .rodata :
54 {
Trent Piephof62fb992009-02-18 15:22:05 -080055 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
Matthias Fuchs72c5d522007-12-28 17:07:14 +010056 }
57 .fini : { *(.fini) } =0
58 .ctors : { *(.ctors) }
59 .dtors : { *(.dtors) }
60
61 /* Read-write section, merged into data segment: */
62 . = (. + 0x00FF) & 0xFFFFFF00;
63 _erotext = .;
64 PROVIDE (erotext = .);
65 .reloc :
66 {
67 *(.got)
68 _GOT2_TABLE_ = .;
69 *(.got2)
70 _FIXUP_TABLE_ = .;
71 *(.fixup)
72 }
73 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
74 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
75
76 .data :
77 {
78 *(.data)
79 *(.data1)
80 *(.sdata)
81 *(.sdata2)
82 *(.dynamic)
83 CONSTRUCTORS
84 }
85 _edata = .;
86 PROVIDE (edata = .);
87
88 . = .;
Matthias Fuchs72c5d522007-12-28 17:07:14 +010089
Marek Vasut55675142012-10-12 10:27:03 +000090 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000091 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000092 }
Matthias Fuchs72c5d522007-12-28 17:07:14 +010093
94 . = .;
95 __start___ex_table = .;
96 __ex_table : { *(__ex_table) }
97 __stop___ex_table = .;
98
99 . = ALIGN(256);
100 __init_begin = .;
101 .text.init : { *(.text.init) }
102 .data.init : { *(.data.init) }
103 . = ALIGN(256);
104 __init_end = .;
105
106 __bss_start = .;
Wolfgang Denk64134f02008-01-12 20:31:39 +0100107 .bss (NOLOAD) :
Matthias Fuchs72c5d522007-12-28 17:07:14 +0100108 {
109 *(.sbss) *(.scommon)
110 *(.dynbss)
111 *(.bss)
112 *(COMMON)
Selvamuthukumar9b827cf2008-10-16 22:54:03 +0530113 . = ALIGN(4);
Matthias Fuchs72c5d522007-12-28 17:07:14 +0100114 }
115
Simon Glass3929fb02013-03-14 06:54:53 +0000116 __bss_end = . ;
Matthias Fuchs72c5d522007-12-28 17:07:14 +0100117 PROVIDE (end = .);
118}