blob: 610e9d9b1d8a4237e02cf5e36b2c04f03d58c8bf [file] [log] [blame]
Simon Glass3a1a18f2015-01-27 22:13:47 -07001/*
2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <mmc.h>
9#include <pci_ids.h>
Bin Mengfe3fbd32015-07-30 03:49:18 -070010#include <asm/irq.h>
Simon Glass3a1a18f2015-01-27 22:13:47 -070011#include <asm/post.h>
12
13static struct pci_device_id mmc_supported[] = {
14 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
15 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
16};
17
18int cpu_mmc_init(bd_t *bis)
19{
Simon Glass3a1a18f2015-01-27 22:13:47 -070020 return pci_mmc_init("ValleyView SDHCI", mmc_supported,
21 ARRAY_SIZE(mmc_supported));
22}
23
Simon Glassb4302582015-08-04 12:34:02 -060024#ifndef CONFIG_EFI_APP
Simon Glass3a1a18f2015-01-27 22:13:47 -070025int arch_cpu_init(void)
26{
27 int ret;
28
29 post_code(POST_CPU_INIT);
30#ifdef CONFIG_SYS_X86_TSC_TIMER
31 timer_set_base(rdtsc());
32#endif
33
34 ret = x86_cpu_init_f();
35 if (ret)
36 return ret;
37
38 return 0;
39}
Bin Mengfe3fbd32015-07-30 03:49:18 -070040
41int arch_misc_init(void)
42{
43 pirq_init();
44
45 return 0;
46}
Simon Glassb4302582015-08-04 12:34:02 -060047#endif