blob: dd2dec4412101948b00cad99ea9efbea0b6fc829 [file] [log] [blame]
Shengzhou Liu48c6f322014-11-24 17:11:56 +08001/* Copyright 2014 Freescale Semiconductor, Inc.
2 *
3 * SPDX-License-Identifier: GPL-2.0+
4 */
5
6#include <common.h>
7#include <malloc.h>
8#include <ns16550.h>
9#include <nand.h>
10#include <i2c.h>
11#include <mmc.h>
12#include <fsl_esdhc.h>
13#include <spi_flash.h>
14
15DECLARE_GLOBAL_DATA_PTR;
16
17phys_size_t get_effective_memsize(void)
18{
19 return CONFIG_SYS_L3_SIZE;
20}
21
22unsigned long get_board_sys_clk(void)
23{
24 return CONFIG_SYS_CLK_FREQ;
25}
26
27unsigned long get_board_ddr_clk(void)
28{
29 return CONFIG_DDR_CLK_FREQ;
30}
31
32void board_init_f(ulong bootflag)
33{
34 u32 plat_ratio, sys_clk, ccb_clk;
35 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
36
37 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
38 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
39
40 /* Update GD pointer */
41 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
42
43 console_init_f();
44
45 /* initialize selected port with appropriate baud rate */
46 sys_clk = get_board_sys_clk();
47 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
48 ccb_clk = sys_clk * plat_ratio / 2;
49
50 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
51 ccb_clk / 16 / CONFIG_BAUDRATE);
52
53#if defined(CONFIG_SPL_MMC_BOOT)
54 puts("\nSD boot...\n");
55#elif defined(CONFIG_SPL_SPI_BOOT)
56 puts("\nSPI boot...\n");
57#elif defined(CONFIG_SPL_NAND_BOOT)
58 puts("\nNAND boot...\n");
59#endif
60
61 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
62}
63
64void board_init_r(gd_t *gd, ulong dest_addr)
65{
66 bd_t *bd;
67
68 bd = (bd_t *)(gd + sizeof(gd_t));
69 memset(bd, 0, sizeof(bd_t));
70 gd->bd = bd;
71 bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
72 bd->bi_memsize = CONFIG_SYS_L3_SIZE;
73
74 probecpu();
75 get_clocks();
76 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
77 CONFIG_SPL_RELOC_MALLOC_SIZE);
78
79#ifdef CONFIG_SPL_NAND_BOOT
80 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
81 (uchar *)CONFIG_ENV_ADDR);
82#endif
83#ifdef CONFIG_SPL_MMC_BOOT
84 mmc_initialize(bd);
85 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
86 (uchar *)CONFIG_ENV_ADDR);
87#endif
88#ifdef CONFIG_SPL_SPI_BOOT
89 spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
90 (uchar *)CONFIG_ENV_ADDR);
91#endif
92
93 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
94 gd->env_valid = 1;
95
96 i2c_init_all();
97
98 gd->ram_size = initdram(0);
99
100#ifdef CONFIG_SPL_MMC_BOOT
101 mmc_boot();
102#elif defined(CONFIG_SPL_SPI_BOOT)
103 spi_boot();
104#elif defined(CONFIG_SPL_NAND_BOOT)
105 nand_boot();
106#endif
107}