blob: fbec421bee2397c985d322d38afc3a1da3bb31b3 [file] [log] [blame]
Simon Glasscd392fe2014-11-10 18:00:22 -07001/*
2 * ifdtool - Manage Intel Firmware Descriptor information
3 *
4 * Copyright (C) 2011 The ChromiumOS Authors.
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 *
8 * From Coreboot project
9 */
10
11#include <stdint.h>
12
13#define __packed __attribute__((packed))
14
15#define IFDTOOL_VERSION "1.1-U-Boot"
16
17enum spi_frequency {
18 SPI_FREQUENCY_20MHZ = 0,
19 SPI_FREQUENCY_33MHZ = 1,
20 SPI_FREQUENCY_50MHZ = 4,
21};
22
23enum component_density {
24 COMPONENT_DENSITY_512KB = 0,
25 COMPONENT_DENSITY_1MB = 1,
26 COMPONENT_DENSITY_2MB = 2,
27 COMPONENT_DENSITY_4MB = 3,
28 COMPONENT_DENSITY_8MB = 4,
29 COMPONENT_DENSITY_16MB = 5,
30};
31
32/* flash descriptor */
33struct __packed fdbar_t {
34 uint32_t flvalsig;
35 uint32_t flmap0;
36 uint32_t flmap1;
37 uint32_t flmap2;
38 uint8_t reserved[0xefc - 0x20];
39 uint32_t flumap1;
40};
41
42#define MAX_REGIONS 5
43
44/* regions */
45struct __packed frba_t {
46 uint32_t flreg[MAX_REGIONS];
47};
48
49/* component section */
50struct __packed fcba_t {
51 uint32_t flcomp;
52 uint32_t flill;
53 uint32_t flpb;
54};
55
56#define MAX_STRAPS 18
57
58/* pch strap */
59struct __packed fpsba_t {
60 uint32_t pchstrp[MAX_STRAPS];
61};
62
63/* master */
64struct __packed fmba_t {
65 uint32_t flmstr1;
66 uint32_t flmstr2;
67 uint32_t flmstr3;
68};
69
70/* processor strap */
71struct __packed fmsba_t {
72 uint32_t data[8];
73};
74
75/* ME VSCC */
76struct vscc_t {
77 uint32_t jid;
78 uint32_t vscc;
79};
80
81struct vtba_t {
82 /* Actual number of entries specified in vtl */
83 struct vscc_t entry[8];
84};
85
86struct region_t {
87 int base, limit, size;
88};