| Mike Frysinger | dc6bc64 | 2009-11-11 19:08:33 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Common Blackfin memory map |
| 3 | * |
| 4 | * Copyright 2004-2009 Analog Devices Inc. |
| 5 | * Licensed under the GPL-2 or later. |
| 6 | */ |
| 7 | |
| 8 | #ifndef __BF54X_MEM_MAP_H__ |
| 9 | #define __BF54X_MEM_MAP_H__ |
| 10 | |
| 11 | #define L1_DATA_A_SRAM (0xFF800000) |
| 12 | #define L1_DATA_A_SRAM_SIZE (0x4000) |
| 13 | #define L1_DATA_A_SRAM_END (L1_DATA_A_SRAM + L1_DATA_A_SRAM_SIZE) |
| 14 | #define L1_DATA_B_SRAM (0xFF900000) |
| 15 | #define L1_DATA_B_SRAM_SIZE (0x4000) |
| 16 | #define L1_DATA_B_SRAM_END (L1_DATA_B_SRAM + L1_DATA_B_SRAM_SIZE) |
| 17 | #define L1_INST_SRAM (0xFFA00000) |
| 18 | #define L1_INST_SRAM_SIZE (0xC000) |
| 19 | #define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE) |
| 20 | |
| 21 | #endif |