blob: cc5ba98d6bd9a71db3c9e7b0c433d304b8a09293 [file] [log] [blame]
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05301/*
2 * Xilinx ZC770 XM010 board DTS
3 *
Michal Simek5c45b162015-07-22 11:36:32 +02004 * Copyright (C) 2013 - 2015 Xilinx, Inc.
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05305 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8/dts-v1/;
9#include "zynq-7000.dtsi"
10
11/ {
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053012 compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
Michal Simek5c45b162015-07-22 11:36:32 +020013 model = "Xilinx Zynq";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090014
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090015 aliases {
Michal Simek5c45b162015-07-22 11:36:32 +020016 ethernet0 = &gem0;
17 i2c0 = &i2c0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090018 serial0 = &uart1;
Jagan Teki7b0d3452015-09-04 12:49:49 +053019 spi0 = &qspi;
20 spi1 = &spi1;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090021 };
22
Michal Simek5c45b162015-07-22 11:36:32 +020023 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020024 bootargs = "";
Michal Simek46919412016-01-12 13:56:44 +010025 stdout-path = "serial0:115200n8";
Michal Simek5c45b162015-07-22 11:36:32 +020026 };
27
Michal Simekcc7978b2016-11-11 13:11:37 +010028 memory@0 {
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090029 device_type = "memory";
Michal Simek5c45b162015-07-22 11:36:32 +020030 reg = <0x0 0x40000000>;
31 };
32
33 usb_phy0: phy0 {
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090036 };
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053037};
Jagan Teki89cab972015-06-27 00:51:35 +053038
Michal Simek5c45b162015-07-22 11:36:32 +020039&can0 {
40 status = "okay";
41};
42
43&gem0 {
44 status = "okay";
45 phy-mode = "rgmii-id";
46 phy-handle = <&ethernet_phy>;
47
48 ethernet_phy: ethernet-phy@7 {
49 reg = <7>;
Sai Pavan Boddu5fad1ab2017-03-06 18:17:19 +053050 device_type = "ethernet-phy";
Michal Simek5c45b162015-07-22 11:36:32 +020051 };
52};
53
54&i2c0 {
55 status = "okay";
56 clock-frequency = <400000>;
57
58 m24c02_eeprom@52 {
59 compatible = "at,24c02";
60 reg = <0x52>;
61 };
62
63};
64
Michal Simeka95d54b2016-04-07 13:04:15 +020065&qspi {
66 status = "okay";
67};
68
Michal Simek5c45b162015-07-22 11:36:32 +020069&sdhci0 {
70 status = "okay";
71};
72
Michal Simeka95d54b2016-04-07 13:04:15 +020073&spi1 {
74 status = "okay";
75 num-cs = <4>;
76 is-decoded-cs = <0>;
77 flash@0 {
78 compatible = "sst25wf080";
79 reg = <1>;
80 spi-max-frequency = <1000000>;
81 #address-cells = <1>;
82 #size-cells = <1>;
83 partition@test {
84 label = "spi-flash";
85 reg = <0x0 0x100000>;
86 };
87 };
88};
89
Michal Simek5c45b162015-07-22 11:36:32 +020090&uart1 {
Simon Glass035c6b22015-10-17 19:41:24 -060091 u-boot,dm-pre-reloc;
Michal Simek5c45b162015-07-22 11:36:32 +020092 status = "okay";
93};
94
95&usb0 {
96 status = "okay";
97 dr_mode = "host";
98 usb-phy = <&usb_phy0>;
Jagan Teki89cab972015-06-27 00:51:35 +053099};