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Tim Harvey59189a82014-03-06 07:46:30 -08001/*
2 * Copyright (C) 2013 Gateworks Corporation
3 *
4 * Author: Tim Harvey <tharvey@gateworks.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __ASSEMBLY__
10
11/* i2c slave addresses */
12#define GSC_SC_ADDR 0x20
13#define GSC_RTC_ADDR 0x68
14#define GSC_HWMON_ADDR 0x29
15#define GSC_EEPROM_ADDR 0x51
16
17/* System Controller registers */
18enum {
19 GSC_SC_CTRL0 = 0x00,
20 GSC_SC_CTRL1 = 0x01,
21 GSC_SC_STATUS = 0x0a,
22 GSC_SC_FWVER = 0x0e,
23};
24
25/* System Controller Control1 bits */
26enum {
27 GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable watchdog */
28};
29
30/* System Controller Interrupt bits */
31enum {
32 GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
33 GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
34 GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
35 GSC_SC_IRQ_GPIO = 4, /* GPIO change */
36 GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
37 GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
38 GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
39};
40
41/* Hardware Monitor registers */
42enum {
43 GSC_HWMON_TEMP = 0x00,
44 GSC_HWMON_VIN = 0x02,
45 GSC_HWMON_VDD_3P3 = 0x05,
46 GSC_HWMON_VBATT = 0x08,
47 GSC_HWMON_VDD_5P0 = 0x0b,
48 GSC_HWMON_VDD_CORE = 0x0e,
49 GSC_HWMON_VDD_HIGH = 0x14,
50 GSC_HWMON_VDD_DDR = 0x17,
51 GSC_HWMON_VDD_SOC = 0x11,
52 GSC_HWMON_VDD_1P8 = 0x1d,
53 GSC_HWMON_VDD_2P5 = 0x23,
54 GSC_HWMON_VDD_1P0 = 0x20,
55};
56
57/*
58 * I2C transactions to the GSC are done via these functions which
59 * perform retries in the case of a busy GSC NAK'ing the transaction
60 */
61int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
62int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
63#endif
64