blob: 8be552e2ea2511e3c2ae750db8b654670d022221 [file] [log] [blame]
stroese809ac5e2004-12-16 18:24:54 +00001/*
2 * (C) Copyright 2001-2004
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
26#include <command.h>
27#include <malloc.h>
28
Wolfgang Denkd87080b2006-03-31 18:32:53 +020029DECLARE_GLOBAL_DATA_PTR;
stroese809ac5e2004-12-16 18:24:54 +000030
31extern void lxt971_no_sleep(void);
32
stroese809ac5e2004-12-16 18:24:54 +000033/* fpga configuration data - not compressed, generated by bin2c */
34const unsigned char fpgadata[] =
35{
36#include "fpgadata.c"
37};
38int filesize = sizeof(fpgadata);
39
40
41int board_early_init_f (void)
42{
43 /*
44 * IRQ 0-15 405GP internally generated; active high; level sensitive
45 * IRQ 16 405GP internally generated; active low; level sensitive
46 * IRQ 17-24 RESERVED
47 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
48 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
49 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
50 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
51 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
52 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
53 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
54 */
55 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
56 mtdcr(uicer, 0x00000000); /* disable all ints */
57 mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
58 mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
59 mtdcr(uictr, 0x10000000); /* set int trigger levels */
60 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
61 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
62
63 /*
64 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
65 */
66 mtebc (epcr, 0xa8400000); /* ebc always driven */
67
68 /*
69 * Reset CPLD via GPIO12 (CS3) pin
70 */
71 out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12));
72 udelay(1000); /* wait 1ms */
73 out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12));
74 udelay(1000); /* wait 1ms */
75
76 return 0;
77}
78
79
80/* ------------------------------------------------------------------------- */
81
stroese809ac5e2004-12-16 18:24:54 +000082int misc_init_r (void)
83{
stroese809ac5e2004-12-16 18:24:54 +000084 /* adjust flash start and offset */
85 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
86 gd->bd->bi_flashoffset = 0;
87
88 return (0);
89}
90
91
92/*
93 * Check Board Identity:
94 */
95
96int checkboard (void)
97{
Stefan Roese18c5e642006-01-18 20:06:44 +010098 char str[64];
stroese809ac5e2004-12-16 18:24:54 +000099 int i = getenv_r ("serial#", str, sizeof(str));
100 int flashcnt;
101 int delay;
102 volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000);
103
104 puts ("Board: ");
105
106 if (i == -1) {
107 puts ("### No HW ID - assuming VOM405");
108 } else {
109 puts(str);
110 }
111
112 printf(" (PLD-Version=%02d)\n", *led_reg);
113
114 /*
115 * Flash LEDs
116 */
117 for (flashcnt = 0; flashcnt < 3; flashcnt++) {
118 *led_reg = 0x40; /* LED_B..D off */
119 for (delay = 0; delay < 100; delay++)
120 udelay(1000);
121 *led_reg = 0x47; /* LED_B..D on */
122 for (delay = 0; delay < 50; delay++)
123 udelay(1000);
124 }
125 *led_reg = 0x40;
126
stroese809ac5e2004-12-16 18:24:54 +0000127 return 0;
128}
129
130/* ------------------------------------------------------------------------- */
131
132long int initdram (int board_type)
133{
134 unsigned long val;
135
136 mtdcr(memcfga, mem_mb0cf);
137 val = mfdcr(memcfgd);
138
139#if 0
140 printf("\nmb0cf=%x\n", val); /* test-only */
141 printf("strap=%x\n", mfdcr(strap)); /* test-only */
142#endif
143
144 return (4*1024*1024 << ((val & 0x000e0000) >> 17));
145}
146
147/* ------------------------------------------------------------------------- */
148
Stefan Roesefeaedfc2005-11-15 10:35:59 +0100149void reset_phy(void)
stroese809ac5e2004-12-16 18:24:54 +0000150{
Stefan Roesefeaedfc2005-11-15 10:35:59 +0100151#ifdef CONFIG_LXT971_NO_SLEEP
stroese809ac5e2004-12-16 18:24:54 +0000152
Stefan Roesefeaedfc2005-11-15 10:35:59 +0100153 /*
154 * Disable sleep mode in LXT971
155 */
156 lxt971_no_sleep();
157#endif
stroese809ac5e2004-12-16 18:24:54 +0000158}