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gerrit.cesnet.cz / github / trini / u-boot / ad7321da8e5c56613b604cb91e064fbaa44b3283 / . / board / renesas / lager / qos.c
blob: ae155512f58a35fdc4dfa3455e19302f83924459 [file] [log] [blame]
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1/*
2 * board/renesas/lager/qos.c
3 *
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]4 * Copyright (C) 2013,2014 Renesas Electronics Corporation
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#include <common.h>
10#include <asm/processor.h>
11#include <asm/mach-types.h>
12#include <asm/io.h>
13#include <asm/arch/rmobile.h>
14
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]15/* QoS version 0.955 for ES1 and version 0.973 for ES2 */
Nobuhiro Iwamatsufb6f6002014-10-31 16:16:26 +0900[diff] [blame]16#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]17enum {
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]18 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
19 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
20 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
21 DBSC3_15,
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]22 DBSC3_NR,
23};
24
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]25static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
26 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
27 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
28 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
29 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
30 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
31 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
32 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
33 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
34 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
35 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
36 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
37 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
38 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
39 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
40 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
41 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]42};
43
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]44static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
45 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
46 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
47 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
48 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
49 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
50 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
51 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
52 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
53 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
54 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
55 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
56 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
57 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
58 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
59 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
60 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
61};
62
63/* QoS version 0.955 for ES1 */
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]64static void qos_init_es1(void)
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]65{
66 int i;
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]67 struct rcar_s3c *s3c;
68 struct rcar_s3c_qos *s3c_qos;
69 struct rcar_dbsc3_qos *qos_addr;
70 struct rcar_mxi *mxi;
71 struct rcar_mxi_qos *mxi_qos;
72 struct rcar_axi_qos *axi_qos;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]73
74 /* DBSC DBADJ2 */
75 writel(0x20042004, DBSC3_0_DBADJ2);
76
77 /* S3C -QoS */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]78 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]79 writel(0x80FF1C1E, &s3c->s3cadsplcr);
80 writel(0x1F060505, &s3c->s3crorr);
81 writel(0x1F020100, &s3c->s3cworr);
82
83 /* QoS Control Registers */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]84 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]85 writel(0x00800080, &s3c_qos->s3cqos0);
86 writel(0x22000010, &s3c_qos->s3cqos1);
87 writel(0x22002200, &s3c_qos->s3cqos2);
88 writel(0x2F002200, &s3c_qos->s3cqos3);
89 writel(0x2F002F00, &s3c_qos->s3cqos4);
90 writel(0x22000010, &s3c_qos->s3cqos5);
91 writel(0x22002200, &s3c_qos->s3cqos6);
92 writel(0x2F002200, &s3c_qos->s3cqos7);
93 writel(0x2F002F00, &s3c_qos->s3cqos8);
94
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]95 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]96 writel(0x00800080, &s3c_qos->s3cqos0);
97 writel(0x22000010, &s3c_qos->s3cqos1);
98 writel(0x22002200, &s3c_qos->s3cqos2);
99 writel(0x2F002200, &s3c_qos->s3cqos3);
100 writel(0x2F002F00, &s3c_qos->s3cqos4);
101 writel(0x22000010, &s3c_qos->s3cqos5);
102 writel(0x22002200, &s3c_qos->s3cqos6);
103 writel(0x2F002200, &s3c_qos->s3cqos7);
104 writel(0x2F002F00, &s3c_qos->s3cqos8);
105
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]106 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]107 writel(0x80918099, &s3c_qos->s3cqos0);
108 writel(0x20410010, &s3c_qos->s3cqos1);
109 writel(0x200A2023, &s3c_qos->s3cqos2);
110 writel(0x20502001, &s3c_qos->s3cqos3);
111 writel(0x00002032, &s3c_qos->s3cqos4);
112 writel(0x20410FFF, &s3c_qos->s3cqos5);
113 writel(0x200A2023, &s3c_qos->s3cqos6);
114 writel(0x20502001, &s3c_qos->s3cqos7);
115 writel(0x20142032, &s3c_qos->s3cqos8);
116
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]117 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]118 writel(0x00810089, &s3c_qos->s3cqos0);
119 writel(0x20410001, &s3c_qos->s3cqos1);
120 writel(0x200A2023, &s3c_qos->s3cqos2);
121 writel(0x20502001, &s3c_qos->s3cqos3);
122 writel(0x00002032, &s3c_qos->s3cqos4);
123 writel(0x20410FFF, &s3c_qos->s3cqos5);
124 writel(0x200A2023, &s3c_qos->s3cqos6);
125 writel(0x20502001, &s3c_qos->s3cqos7);
126 writel(0x20142032, &s3c_qos->s3cqos8);
127
128 writel(0x00200808, &s3c->s3carcr11);
129
130 /* DBSC -QoS */
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]131 /* DBSC0 - Read */
132 for (i = DBSC3_00; i < DBSC3_NR; i++) {
133 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]134 writel(0x00000203, &qos_addr->dblgcnt);
135 writel(0x00002064, &qos_addr->dbtmval0);
136 writel(0x00002048, &qos_addr->dbtmval1);
137 writel(0x00002032, &qos_addr->dbtmval2);
138 writel(0x00002019, &qos_addr->dbtmval3);
139 writel(0x00000001, &qos_addr->dbrqctr);
140 writel(0x00002019, &qos_addr->dbthres0);
141 writel(0x00002019, &qos_addr->dbthres1);
142 writel(0x00002019, &qos_addr->dbthres2);
143 writel(0x00000000, &qos_addr->dblgqon);
144 }
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]145
146 /* DBSC0 - Write */
147 for (i = DBSC3_00; i < DBSC3_NR; i++) {
148 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
149 writel(0x00000203, &qos_addr->dblgcnt);
150 writel(0x00002064, &qos_addr->dbtmval0);
151 writel(0x00002048, &qos_addr->dbtmval1);
152 writel(0x00002032, &qos_addr->dbtmval2);
153 writel(0x00002019, &qos_addr->dbtmval3);
154 writel(0x00000001, &qos_addr->dbrqctr);
155 writel(0x00002019, &qos_addr->dbthres0);
156 writel(0x00002019, &qos_addr->dbthres1);
157 writel(0x00002019, &qos_addr->dbthres2);
158 writel(0x00000000, &qos_addr->dblgqon);
159 }
160
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]161 /* CCI-400 -QoS */
162 writel(0x20001000, CCI_400_MAXOT_1);
163 writel(0x20001000, CCI_400_MAXOT_2);
164 writel(0x0000000C, CCI_400_QOSCNTL_1);
165 writel(0x0000000C, CCI_400_QOSCNTL_2);
166
167 /* MXI -QoS */
168 /* Transaction Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]169 mxi = (struct rcar_mxi *)MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]170 writel(0x00000013, &mxi->mxrtcr);
171 writel(0x00000013, &mxi->mxwtcr);
172 writel(0x00B800C0, &mxi->mxsaar0);
173 writel(0x02000800, &mxi->mxsaar1);
174 writel(0x00200000, &mxi->mxs3cracr);
175 writel(0x00200000, &mxi->mxs3cwacr);
176 writel(0x00200000, &mxi->mxaxiracr);
177 writel(0x00200000, &mxi->mxaxiwacr);
178
179 /* QoS Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]180 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]181 writel(0x0000000C, &mxi_qos->vspdu0);
182 writel(0x0000000C, &mxi_qos->vspdu1);
183 writel(0x0000000D, &mxi_qos->du0);
184 writel(0x0000000D, &mxi_qos->du1);
185
186 /* AXI -QoS */
187 /* Transaction Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]188 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]189 writel(0x00000002, &axi_qos->qosconf);
190 writel(0x0000200F, &axi_qos->qosctset0);
191 writel(0x00002009, &axi_qos->qosctset1);
192 writel(0x00002003, &axi_qos->qosctset2);
193 writel(0x00002003, &axi_qos->qosctset3);
194 writel(0x00000001, &axi_qos->qosreqctr);
195 writel(0x00002006, &axi_qos->qosthres0);
196 writel(0x00002001, &axi_qos->qosthres1);
197 writel(0x00000000, &axi_qos->qosthres2);
198 writel(0x00000001, &axi_qos->qosqon);
199
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]200 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]201 writel(0x00000000, &axi_qos->qosconf);
202 writel(0x0000200A, &axi_qos->qosctset0);
203 writel(0x00000001, &axi_qos->qosreqctr);
204 writel(0x00002006, &axi_qos->qosthres0);
205 writel(0x00002001, &axi_qos->qosthres1);
206 writel(0x00000000, &axi_qos->qosthres2);
207 writel(0x00000001, &axi_qos->qosqon);
208
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]209 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]210 writel(0x00000000, &axi_qos->qosconf);
211 writel(0x0000200A, &axi_qos->qosctset0);
212 writel(0x00000001, &axi_qos->qosreqctr);
213 writel(0x00002006, &axi_qos->qosthres0);
214 writel(0x00002001, &axi_qos->qosthres1);
215 writel(0x00000000, &axi_qos->qosthres2);
216 writel(0x00000001, &axi_qos->qosqon);
217
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]218 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]219 writel(0x00000000, &axi_qos->qosconf);
220 writel(0x00002002, &axi_qos->qosctset0);
221 writel(0x00000001, &axi_qos->qosreqctr);
222 writel(0x00002006, &axi_qos->qosthres0);
223 writel(0x00002001, &axi_qos->qosthres1);
224 writel(0x00000000, &axi_qos->qosthres2);
225 writel(0x00000001, &axi_qos->qosqon);
226
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]227 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]228 writel(0x00000000, &axi_qos->qosconf);
229 writel(0x00002004, &axi_qos->qosctset0);
230 writel(0x00000001, &axi_qos->qosreqctr);
231 writel(0x00002006, &axi_qos->qosthres0);
232 writel(0x00002001, &axi_qos->qosthres1);
233 writel(0x00000000, &axi_qos->qosthres2);
234 writel(0x00000001, &axi_qos->qosqon);
235
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]236 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]237 writel(0x00000002, &axi_qos->qosconf);
238 writel(0x0000200F, &axi_qos->qosctset0);
239 writel(0x00002009, &axi_qos->qosctset1);
240 writel(0x00002003, &axi_qos->qosctset2);
241 writel(0x00002003, &axi_qos->qosctset3);
242 writel(0x00000001, &axi_qos->qosreqctr);
243 writel(0x00002006, &axi_qos->qosthres0);
244 writel(0x00002001, &axi_qos->qosthres1);
245 writel(0x00000000, &axi_qos->qosthres2);
246 writel(0x00000001, &axi_qos->qosqon);
247
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]248 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]249 writel(0x00000002, &axi_qos->qosconf);
250 writel(0x0000200F, &axi_qos->qosctset0);
251 writel(0x00002009, &axi_qos->qosctset1);
252 writel(0x00002003, &axi_qos->qosctset2);
253 writel(0x00002003, &axi_qos->qosctset3);
254 writel(0x00000001, &axi_qos->qosreqctr);
255 writel(0x00002006, &axi_qos->qosthres0);
256 writel(0x00002001, &axi_qos->qosthres1);
257 writel(0x00000000, &axi_qos->qosthres2);
258 writel(0x00000001, &axi_qos->qosqon);
259
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]260 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]261 writel(0x00000002, &axi_qos->qosconf);
262 writel(0x0000200F, &axi_qos->qosctset0);
263 writel(0x00002009, &axi_qos->qosctset1);
264 writel(0x00002003, &axi_qos->qosctset2);
265 writel(0x00002003, &axi_qos->qosctset3);
266 writel(0x00000001, &axi_qos->qosreqctr);
267 writel(0x00002006, &axi_qos->qosthres0);
268 writel(0x00002001, &axi_qos->qosthres1);
269 writel(0x00000000, &axi_qos->qosthres2);
270 writel(0x00000001, &axi_qos->qosqon);
271
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]272 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]273 writel(0x00000000, &axi_qos->qosconf);
274 writel(0x00002014, &axi_qos->qosctset0);
275 writel(0x00000001, &axi_qos->qosreqctr);
276 writel(0x00002006, &axi_qos->qosthres0);
277 writel(0x00002001, &axi_qos->qosthres1);
278 writel(0x00000000, &axi_qos->qosthres2);
279 writel(0x00000001, &axi_qos->qosqon);
280
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]281 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]282 writel(0x00000001, &axi_qos->qosconf);
283 writel(0x00002001, &axi_qos->qosctset0);
284 writel(0x00002009, &axi_qos->qosctset1);
285 writel(0x00002003, &axi_qos->qosctset2);
286 writel(0x00002003, &axi_qos->qosctset3);
287 writel(0x00000001, &axi_qos->qosreqctr);
288 writel(0x00002006, &axi_qos->qosthres0);
289 writel(0x00002001, &axi_qos->qosthres1);
290 writel(0x00000000, &axi_qos->qosthres2);
291 writel(0x00000001, &axi_qos->qosqon);
292
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]293 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]294 writel(0x00000001, &axi_qos->qosconf);
295 writel(0x00002001, &axi_qos->qosctset0);
296 writel(0x00002009, &axi_qos->qosctset1);
297 writel(0x00002003, &axi_qos->qosctset2);
298 writel(0x00002003, &axi_qos->qosctset3);
299 writel(0x00000001, &axi_qos->qosreqctr);
300 writel(0x00002006, &axi_qos->qosthres0);
301 writel(0x00002001, &axi_qos->qosthres1);
302 writel(0x00000000, &axi_qos->qosthres2);
303 writel(0x00000001, &axi_qos->qosqon);
304
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]305 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]306 writel(0x00000001, &axi_qos->qosconf);
307 writel(0x00002001, &axi_qos->qosctset0);
308 writel(0x00002009, &axi_qos->qosctset1);
309 writel(0x00002003, &axi_qos->qosctset2);
310 writel(0x00002003, &axi_qos->qosctset3);
311 writel(0x00000001, &axi_qos->qosreqctr);
312 writel(0x00002006, &axi_qos->qosthres0);
313 writel(0x00002001, &axi_qos->qosthres1);
314 writel(0x00000000, &axi_qos->qosthres2);
315 writel(0x00000001, &axi_qos->qosqon);
316
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]317 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]318 writel(0x00000001, &axi_qos->qosconf);
319 writel(0x00002001, &axi_qos->qosctset0);
320 writel(0x00002009, &axi_qos->qosctset1);
321 writel(0x00002003, &axi_qos->qosctset2);
322 writel(0x00002003, &axi_qos->qosctset3);
323 writel(0x00000001, &axi_qos->qosreqctr);
324 writel(0x00002006, &axi_qos->qosthres0);
325 writel(0x00002001, &axi_qos->qosthres1);
326 writel(0x00000000, &axi_qos->qosthres2);
327 writel(0x00000001, &axi_qos->qosqon);
328
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]329 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]330 writel(0x00000001, &axi_qos->qosconf);
331 writel(0x00002001, &axi_qos->qosctset0);
332 writel(0x00002009, &axi_qos->qosctset1);
333 writel(0x00002003, &axi_qos->qosctset2);
334 writel(0x00002003, &axi_qos->qosctset3);
335 writel(0x00000001, &axi_qos->qosreqctr);
336 writel(0x00002006, &axi_qos->qosthres0);
337 writel(0x00002001, &axi_qos->qosthres1);
338 writel(0x00000000, &axi_qos->qosthres2);
339 writel(0x00000001, &axi_qos->qosqon);
340
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]341 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]342 writel(0x00000000, &axi_qos->qosconf);
343 writel(0x00002002, &axi_qos->qosctset0);
344 writel(0x00000001, &axi_qos->qosreqctr);
345 writel(0x00002006, &axi_qos->qosthres0);
346 writel(0x00002001, &axi_qos->qosthres1);
347 writel(0x00000000, &axi_qos->qosthres2);
348 writel(0x00000001, &axi_qos->qosqon);
349
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]350 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]351 writel(0x00000000, &axi_qos->qosconf);
352 writel(0x00002002, &axi_qos->qosctset0);
353 writel(0x00000001, &axi_qos->qosreqctr);
354 writel(0x00002006, &axi_qos->qosthres0);
355 writel(0x00002001, &axi_qos->qosthres1);
356 writel(0x00000000, &axi_qos->qosthres2);
357 writel(0x00000001, &axi_qos->qosqon);
358
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]359 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]360 writel(0x00000000, &axi_qos->qosconf);
361 writel(0x00002014, &axi_qos->qosctset0);
362 writel(0x00000001, &axi_qos->qosreqctr);
363 writel(0x00002006, &axi_qos->qosthres0);
364 writel(0x00002001, &axi_qos->qosthres1);
365 writel(0x00000000, &axi_qos->qosthres2);
366 writel(0x00000001, &axi_qos->qosqon);
367
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]368 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]369 writel(0x00000002, &axi_qos->qosconf);
370 writel(0x0000200F, &axi_qos->qosctset0);
371 writel(0x00002009, &axi_qos->qosctset1);
372 writel(0x00002003, &axi_qos->qosctset2);
373 writel(0x00002003, &axi_qos->qosctset3);
374 writel(0x00000001, &axi_qos->qosreqctr);
375 writel(0x00002006, &axi_qos->qosthres0);
376 writel(0x00002001, &axi_qos->qosthres1);
377 writel(0x00000000, &axi_qos->qosthres2);
378 writel(0x00000001, &axi_qos->qosqon);
379
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]380 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]381 writel(0x00000000, &axi_qos->qosconf);
382 writel(0x0000200A, &axi_qos->qosctset0);
383 writel(0x00000001, &axi_qos->qosreqctr);
384 writel(0x00002006, &axi_qos->qosthres0);
385 writel(0x00002001, &axi_qos->qosthres1);
386 writel(0x00000000, &axi_qos->qosthres2);
387 writel(0x00000001, &axi_qos->qosqon);
388
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]389 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]390 writel(0x00000000, &axi_qos->qosconf);
391 writel(0x0000200A, &axi_qos->qosctset0);
392 writel(0x00000001, &axi_qos->qosreqctr);
393 writel(0x00002006, &axi_qos->qosthres0);
394 writel(0x00002001, &axi_qos->qosthres1);
395 writel(0x00000000, &axi_qos->qosthres2);
396 writel(0x00000001, &axi_qos->qosqon);
397
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]398 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]399 writel(0x00000000, &axi_qos->qosconf);
400 writel(0x00002005, &axi_qos->qosctset0);
401 writel(0x00000001, &axi_qos->qosreqctr);
402 writel(0x00002006, &axi_qos->qosthres0);
403 writel(0x00002001, &axi_qos->qosthres1);
404 writel(0x00000000, &axi_qos->qosthres2);
405 writel(0x00000001, &axi_qos->qosqon);
406
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]407 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]408 writel(0x00000000, &axi_qos->qosconf);
409 writel(0x00002005, &axi_qos->qosctset0);
410 writel(0x00000001, &axi_qos->qosreqctr);
411 writel(0x00002006, &axi_qos->qosthres0);
412 writel(0x00002001, &axi_qos->qosthres1);
413 writel(0x00000000, &axi_qos->qosthres2);
414 writel(0x00000001, &axi_qos->qosqon);
415
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]416 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]417 writel(0x00000000, &axi_qos->qosconf);
418 writel(0x00002005, &axi_qos->qosctset0);
419 writel(0x00000001, &axi_qos->qosreqctr);
420 writel(0x00002006, &axi_qos->qosthres0);
421 writel(0x00002001, &axi_qos->qosthres1);
422 writel(0x00000000, &axi_qos->qosthres2);
423 writel(0x00000001, &axi_qos->qosqon);
424
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]425 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]426 writel(0x00000000, &axi_qos->qosconf);
427 writel(0x00002014, &axi_qos->qosctset0);
428 writel(0x00000001, &axi_qos->qosreqctr);
429 writel(0x00002006, &axi_qos->qosthres0);
430 writel(0x00002001, &axi_qos->qosthres1);
431 writel(0x00000000, &axi_qos->qosthres2);
432 writel(0x00000001, &axi_qos->qosqon);
433
434 /* QoS Register (RT-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]435 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]436 writel(0x00000000, &axi_qos->qosconf);
437 writel(0x00002005, &axi_qos->qosctset0);
438 writel(0x00002009, &axi_qos->qosctset1);
439 writel(0x00002003, &axi_qos->qosctset2);
440 writel(0x00002003, &axi_qos->qosctset3);
441 writel(0x00000001, &axi_qos->qosreqctr);
442 writel(0x00002006, &axi_qos->qosthres0);
443 writel(0x00002001, &axi_qos->qosthres1);
444 writel(0x00000000, &axi_qos->qosthres2);
445 writel(0x00000001, &axi_qos->qosqon);
446
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]447 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]448 writel(0x00000000, &axi_qos->qosconf);
449 writel(0x00002007, &axi_qos->qosctset0);
450 writel(0x00000001, &axi_qos->qosreqctr);
451 writel(0x00002006, &axi_qos->qosthres0);
452 writel(0x00002001, &axi_qos->qosthres1);
453 writel(0x00000000, &axi_qos->qosthres2);
454 writel(0x00000001, &axi_qos->qosqon);
455
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]456 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]457 writel(0x00000002, &axi_qos->qosconf);
458 writel(0x0000200F, &axi_qos->qosctset0);
459 writel(0x00002009, &axi_qos->qosctset1);
460 writel(0x00002003, &axi_qos->qosctset2);
461 writel(0x00002003, &axi_qos->qosctset3);
462 writel(0x00000001, &axi_qos->qosreqctr);
463 writel(0x00002006, &axi_qos->qosthres0);
464 writel(0x00002001, &axi_qos->qosthres1);
465 writel(0x00000000, &axi_qos->qosthres2);
466 writel(0x00000001, &axi_qos->qosqon);
467
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]468 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]469 writel(0x00000000, &axi_qos->qosconf);
470 writel(0x00002003, &axi_qos->qosctset0);
471 writel(0x00002009, &axi_qos->qosctset1);
472 writel(0x00002003, &axi_qos->qosctset2);
473 writel(0x00002003, &axi_qos->qosctset3);
474 writel(0x00000001, &axi_qos->qosreqctr);
475 writel(0x00002006, &axi_qos->qosthres0);
476 writel(0x00002001, &axi_qos->qosthres1);
477 writel(0x00000000, &axi_qos->qosthres2);
478 writel(0x00000001, &axi_qos->qosqon);
479
480 /* QoS Register (MP-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]481 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]482 writel(0x00000000, &axi_qos->qosconf);
483 writel(0x00002007, &axi_qos->qosctset0);
484 writel(0x00000001, &axi_qos->qosreqctr);
485 writel(0x00002006, &axi_qos->qosthres0);
486 writel(0x00002001, &axi_qos->qosthres1);
487 writel(0x00000000, &axi_qos->qosthres2);
488 writel(0x00000001, &axi_qos->qosqon);
489
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]490 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]491 writel(0x00000001, &axi_qos->qosconf);
492 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]493 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]494 writel(0x00002006, &axi_qos->qosthres0);
495 writel(0x00002001, &axi_qos->qosthres1);
496 writel(0x00000000, &axi_qos->qosthres2);
497 writel(0x00000001, &axi_qos->qosqon);
498
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]499 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]500 writel(0x00000001, &axi_qos->qosconf);
501 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]502 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]503 writel(0x00002006, &axi_qos->qosthres0);
504 writel(0x00002001, &axi_qos->qosthres1);
505 writel(0x00000000, &axi_qos->qosthres2);
506 writel(0x00000001, &axi_qos->qosqon);
507
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]508 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]509 writel(0x00000001, &axi_qos->qosconf);
510 writel(0x00001FF0, &axi_qos->qosctset0);
511 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]512 writel(0x00002006, &axi_qos->qosthres0);
513 writel(0x00002001, &axi_qos->qosthres1);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]514 writel(0x00002001, &axi_qos->qosthres2);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]515 writel(0x00000001, &axi_qos->qosqon);
516
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]517 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]518 writel(0x00000001, &axi_qos->qosconf);
519 writel(0x00002001, &axi_qos->qosctset0);
520 writel(0x00002009, &axi_qos->qosctset1);
521 writel(0x00002003, &axi_qos->qosctset2);
522 writel(0x00002003, &axi_qos->qosctset3);
523 writel(0x00000001, &axi_qos->qosreqctr);
524 writel(0x00002006, &axi_qos->qosthres0);
525 writel(0x00002001, &axi_qos->qosthres1);
526 writel(0x00000000, &axi_qos->qosthres2);
527 writel(0x00000001, &axi_qos->qosqon);
528
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]529 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]530 writel(0x00000000, &axi_qos->qosconf);
531 writel(0x00002018, &axi_qos->qosctset0);
532 writel(0x00000001, &axi_qos->qosreqctr);
533 writel(0x00002006, &axi_qos->qosthres0);
534 writel(0x00002001, &axi_qos->qosthres1);
535 writel(0x00000000, &axi_qos->qosthres2);
536 writel(0x00000001, &axi_qos->qosqon);
537
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]538 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]539 writel(0x00000000, &axi_qos->qosconf);
540 writel(0x0000200D, &axi_qos->qosctset0);
541 writel(0x00000001, &axi_qos->qosreqctr);
542 writel(0x00002006, &axi_qos->qosthres0);
543 writel(0x00002001, &axi_qos->qosthres1);
544 writel(0x00000000, &axi_qos->qosthres2);
545 writel(0x00000001, &axi_qos->qosqon);
546
547 /* QoS Register (SYS-AXI256) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]548 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]549 writel(0x00000002, &axi_qos->qosconf);
550 writel(0x0000200F, &axi_qos->qosctset0);
551 writel(0x00002009, &axi_qos->qosctset1);
552 writel(0x00002003, &axi_qos->qosctset2);
553 writel(0x00002003, &axi_qos->qosctset3);
554 writel(0x00000001, &axi_qos->qosreqctr);
555 writel(0x00002006, &axi_qos->qosthres0);
556 writel(0x00002001, &axi_qos->qosthres1);
557 writel(0x00000000, &axi_qos->qosthres2);
558 writel(0x00000001, &axi_qos->qosqon);
559
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]560 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]561 writel(0x00000002, &axi_qos->qosconf);
562 writel(0x0000200F, &axi_qos->qosctset0);
563 writel(0x00002009, &axi_qos->qosctset1);
564 writel(0x00002003, &axi_qos->qosctset2);
565 writel(0x00002003, &axi_qos->qosctset3);
566 writel(0x00000001, &axi_qos->qosreqctr);
567 writel(0x00002006, &axi_qos->qosthres0);
568 writel(0x00002001, &axi_qos->qosthres1);
569 writel(0x00000000, &axi_qos->qosthres2);
570 writel(0x00000001, &axi_qos->qosqon);
571
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]572 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]573 writel(0x00000002, &axi_qos->qosconf);
574 writel(0x0000200F, &axi_qos->qosctset0);
575 writel(0x00002009, &axi_qos->qosctset1);
576 writel(0x00002003, &axi_qos->qosctset2);
577 writel(0x00002003, &axi_qos->qosctset3);
578 writel(0x00000001, &axi_qos->qosreqctr);
579 writel(0x00002006, &axi_qos->qosthres0);
580 writel(0x00002001, &axi_qos->qosthres1);
581 writel(0x00000000, &axi_qos->qosthres2);
582 writel(0x00000001, &axi_qos->qosqon);
583
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]584 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]585 writel(0x00000002, &axi_qos->qosconf);
586 writel(0x0000200F, &axi_qos->qosctset0);
587 writel(0x00002009, &axi_qos->qosctset1);
588 writel(0x00002003, &axi_qos->qosctset2);
589 writel(0x00002003, &axi_qos->qosctset3);
590 writel(0x00000001, &axi_qos->qosreqctr);
591 writel(0x00002006, &axi_qos->qosthres0);
592 writel(0x00002001, &axi_qos->qosthres1);
593 writel(0x00000000, &axi_qos->qosthres2);
594 writel(0x00000001, &axi_qos->qosqon);
595
596 /* QoS Register (CCI-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]597 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]598 writel(0x00000001, &axi_qos->qosconf);
599 writel(0x00002001, &axi_qos->qosctset0);
600 writel(0x00002009, &axi_qos->qosctset1);
601 writel(0x00002003, &axi_qos->qosctset2);
602 writel(0x00002003, &axi_qos->qosctset3);
603 writel(0x00000001, &axi_qos->qosreqctr);
604 writel(0x00002006, &axi_qos->qosthres0);
605 writel(0x00002001, &axi_qos->qosthres1);
606 writel(0x00000000, &axi_qos->qosthres2);
607 writel(0x00000001, &axi_qos->qosqon);
608
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]609 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]610 writel(0x00000002, &axi_qos->qosconf);
611 writel(0x0000200F, &axi_qos->qosctset0);
612 writel(0x00002009, &axi_qos->qosctset1);
613 writel(0x00002003, &axi_qos->qosctset2);
614 writel(0x00002003, &axi_qos->qosctset3);
615 writel(0x00000001, &axi_qos->qosreqctr);
616 writel(0x00002006, &axi_qos->qosthres0);
617 writel(0x00002001, &axi_qos->qosthres1);
618 writel(0x00000000, &axi_qos->qosthres2);
619 writel(0x00000001, &axi_qos->qosqon);
620
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]621 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]622 writel(0x00000001, &axi_qos->qosconf);
623 writel(0x00002001, &axi_qos->qosctset0);
624 writel(0x00002009, &axi_qos->qosctset1);
625 writel(0x00002003, &axi_qos->qosctset2);
626 writel(0x00002003, &axi_qos->qosctset3);
627 writel(0x00000001, &axi_qos->qosreqctr);
628 writel(0x00002006, &axi_qos->qosthres0);
629 writel(0x00002001, &axi_qos->qosthres1);
630 writel(0x00000000, &axi_qos->qosthres2);
631 writel(0x00000001, &axi_qos->qosqon);
632
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]633 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]634 writel(0x00000001, &axi_qos->qosconf);
635 writel(0x00002001, &axi_qos->qosctset0);
636 writel(0x00002009, &axi_qos->qosctset1);
637 writel(0x00002003, &axi_qos->qosctset2);
638 writel(0x00002003, &axi_qos->qosctset3);
639 writel(0x00000001, &axi_qos->qosreqctr);
640 writel(0x00002006, &axi_qos->qosthres0);
641 writel(0x00002001, &axi_qos->qosthres1);
642 writel(0x00000000, &axi_qos->qosthres2);
643 writel(0x00000001, &axi_qos->qosqon);
644
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]645 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]646 writel(0x00000001, &axi_qos->qosconf);
647 writel(0x00002001, &axi_qos->qosctset0);
648 writel(0x00002009, &axi_qos->qosctset1);
649 writel(0x00002003, &axi_qos->qosctset2);
650 writel(0x00002003, &axi_qos->qosctset3);
651 writel(0x00000001, &axi_qos->qosreqctr);
652 writel(0x00002006, &axi_qos->qosthres0);
653 writel(0x00002001, &axi_qos->qosthres1);
654 writel(0x00000000, &axi_qos->qosthres2);
655 writel(0x00000001, &axi_qos->qosqon);
656
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]657 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]658 writel(0x00000002, &axi_qos->qosconf);
659 writel(0x0000200F, &axi_qos->qosctset0);
660 writel(0x00002009, &axi_qos->qosctset1);
661 writel(0x00002003, &axi_qos->qosctset2);
662 writel(0x00002003, &axi_qos->qosctset3);
663 writel(0x00000001, &axi_qos->qosreqctr);
664 writel(0x00002006, &axi_qos->qosthres0);
665 writel(0x00002001, &axi_qos->qosthres1);
666 writel(0x00000000, &axi_qos->qosthres2);
667 writel(0x00000001, &axi_qos->qosqon);
668
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]669 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]670 writel(0x00000001, &axi_qos->qosconf);
671 writel(0x00002001, &axi_qos->qosctset0);
672 writel(0x00002009, &axi_qos->qosctset1);
673 writel(0x00002003, &axi_qos->qosctset2);
674 writel(0x00002003, &axi_qos->qosctset3);
675 writel(0x00000001, &axi_qos->qosreqctr);
676 writel(0x00002006, &axi_qos->qosthres0);
677 writel(0x00002001, &axi_qos->qosthres1);
678 writel(0x00000000, &axi_qos->qosthres2);
679 writel(0x00000001, &axi_qos->qosqon);
680
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]681 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]682 writel(0x00000001, &axi_qos->qosconf);
683 writel(0x00002001, &axi_qos->qosctset0);
684 writel(0x00002009, &axi_qos->qosctset1);
685 writel(0x00002003, &axi_qos->qosctset2);
686 writel(0x00002003, &axi_qos->qosctset3);
687 writel(0x00000001, &axi_qos->qosreqctr);
688 writel(0x00002006, &axi_qos->qosthres0);
689 writel(0x00002001, &axi_qos->qosthres1);
690 writel(0x00000000, &axi_qos->qosthres2);
691 writel(0x00000001, &axi_qos->qosqon);
692
693 /* QoS Register (Media-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]694 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]695 writel(0x00000001, &axi_qos->qosconf);
696 writel(0x00002018, &axi_qos->qosctset0);
697 writel(0x00000020, &axi_qos->qosreqctr);
698 writel(0x00002006, &axi_qos->qosthres0);
699 writel(0x00002001, &axi_qos->qosthres1);
700 writel(0x00000001, &axi_qos->qosthres2);
701 writel(0x00000001, &axi_qos->qosqon);
702
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]703 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]704 writel(0x00000001, &axi_qos->qosconf);
705 writel(0x00002018, &axi_qos->qosctset0);
706 writel(0x00000020, &axi_qos->qosreqctr);
707 writel(0x00002006, &axi_qos->qosthres0);
708 writel(0x00002001, &axi_qos->qosthres1);
709 writel(0x00000001, &axi_qos->qosthres2);
710 writel(0x00000001, &axi_qos->qosqon);
711
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]712 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]713 writel(0x00000001, &axi_qos->qosconf);
714 writel(0x00002018, &axi_qos->qosctset0);
715 writel(0x00000020, &axi_qos->qosreqctr);
716 writel(0x00002006, &axi_qos->qosthres0);
717 writel(0x00002001, &axi_qos->qosthres1);
718 writel(0x00000001, &axi_qos->qosthres2);
719 writel(0x00000001, &axi_qos->qosqon);
720
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]721 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]722 writel(0x00000001, &axi_qos->qosconf);
723 writel(0x00002018, &axi_qos->qosctset0);
724 writel(0x00000020, &axi_qos->qosreqctr);
725 writel(0x00002006, &axi_qos->qosthres0);
726 writel(0x00002001, &axi_qos->qosthres1);
727 writel(0x00000001, &axi_qos->qosthres2);
728 writel(0x00000001, &axi_qos->qosqon);
729
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]730 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]731 writel(0x00000001, &axi_qos->qosconf);
732 writel(0x00002018, &axi_qos->qosctset0);
733 writel(0x00000020, &axi_qos->qosreqctr);
734 writel(0x00002006, &axi_qos->qosthres0);
735 writel(0x00002001, &axi_qos->qosthres1);
736 writel(0x00000001, &axi_qos->qosthres2);
737 writel(0x00000001, &axi_qos->qosqon);
738
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]739 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]740 writel(0x00000001, &axi_qos->qosconf);
741 writel(0x00002018, &axi_qos->qosctset0);
742 writel(0x00000020, &axi_qos->qosreqctr);
743 writel(0x00002006, &axi_qos->qosthres0);
744 writel(0x00002001, &axi_qos->qosthres1);
745 writel(0x00000001, &axi_qos->qosthres2);
746 writel(0x00000001, &axi_qos->qosqon);
747
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]748 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]749 writel(0x00000001, &axi_qos->qosconf);
750 writel(0x00002018, &axi_qos->qosctset0);
751 writel(0x00000020, &axi_qos->qosreqctr);
752 writel(0x00002006, &axi_qos->qosthres0);
753 writel(0x00002001, &axi_qos->qosthres1);
754 writel(0x00000001, &axi_qos->qosthres2);
755 writel(0x00000001, &axi_qos->qosqon);
756
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]757 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]758 writel(0x00000001, &axi_qos->qosconf);
759 writel(0x00002018, &axi_qos->qosctset0);
760 writel(0x00000020, &axi_qos->qosreqctr);
761 writel(0x00002006, &axi_qos->qosthres0);
762 writel(0x00002001, &axi_qos->qosthres1);
763 writel(0x00000001, &axi_qos->qosthres2);
764 writel(0x00000001, &axi_qos->qosqon);
765
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]766 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]767 writel(0x00000001, &axi_qos->qosconf);
768 writel(0x00002018, &axi_qos->qosctset0);
769 writel(0x00000020, &axi_qos->qosreqctr);
770 writel(0x00002006, &axi_qos->qosthres0);
771 writel(0x00002001, &axi_qos->qosthres1);
772 writel(0x00000001, &axi_qos->qosthres2);
773 writel(0x00000001, &axi_qos->qosqon);
774
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]775 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]776 writel(0x00000001, &axi_qos->qosconf);
777 writel(0x00002018, &axi_qos->qosctset0);
778 writel(0x00000020, &axi_qos->qosreqctr);
779 writel(0x00002006, &axi_qos->qosthres0);
780 writel(0x00002001, &axi_qos->qosthres1);
781 writel(0x00000001, &axi_qos->qosthres2);
782 writel(0x00000001, &axi_qos->qosqon);
783
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]784 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]785 writel(0x00000001, &axi_qos->qosconf);
786 writel(0x00002018, &axi_qos->qosctset0);
787 writel(0x00000020, &axi_qos->qosreqctr);
788 writel(0x00002006, &axi_qos->qosthres0);
789 writel(0x00002001, &axi_qos->qosthres1);
790 writel(0x00000001, &axi_qos->qosthres2);
791 writel(0x00000001, &axi_qos->qosqon);
792
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]793 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]794 writel(0x00000001, &axi_qos->qosconf);
795 writel(0x00002018, &axi_qos->qosctset0);
796 writel(0x00000020, &axi_qos->qosreqctr);
797 writel(0x00002006, &axi_qos->qosthres0);
798 writel(0x00002001, &axi_qos->qosthres1);
799 writel(0x00000001, &axi_qos->qosthres2);
800 writel(0x00000001, &axi_qos->qosqon);
801
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]802 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]803 writel(0x00000001, &axi_qos->qosconf);
804 writel(0x00002018, &axi_qos->qosctset0);
805 writel(0x00000020, &axi_qos->qosreqctr);
806 writel(0x00002006, &axi_qos->qosthres0);
807 writel(0x00002001, &axi_qos->qosthres1);
808 writel(0x00000001, &axi_qos->qosthres2);
809 writel(0x00000001, &axi_qos->qosqon);
810
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]811 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]812 writel(0x00000001, &axi_qos->qosconf);
813 writel(0x00002018, &axi_qos->qosctset0);
814 writel(0x00000020, &axi_qos->qosreqctr);
815 writel(0x00002006, &axi_qos->qosthres0);
816 writel(0x00002001, &axi_qos->qosthres1);
817 writel(0x00000001, &axi_qos->qosthres2);
818 writel(0x00000001, &axi_qos->qosqon);
819
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]820 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]821 writel(0x00000001, &axi_qos->qosconf);
822 writel(0x00002018, &axi_qos->qosctset0);
823 writel(0x00000020, &axi_qos->qosreqctr);
824 writel(0x00002006, &axi_qos->qosthres0);
825 writel(0x00002001, &axi_qos->qosthres1);
826 writel(0x00000001, &axi_qos->qosthres2);
827 writel(0x00000001, &axi_qos->qosqon);
828
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]829 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]830 writel(0x00000001, &axi_qos->qosconf);
831 writel(0x00002018, &axi_qos->qosctset0);
832 writel(0x00000020, &axi_qos->qosreqctr);
833 writel(0x00002006, &axi_qos->qosthres0);
834 writel(0x00002001, &axi_qos->qosthres1);
835 writel(0x00000001, &axi_qos->qosthres2);
836 writel(0x00000001, &axi_qos->qosqon);
837
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]838 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]839 writel(0x00000001, &axi_qos->qosconf);
840 writel(0x0000200C, &axi_qos->qosctset0);
841 writel(0x00000020, &axi_qos->qosreqctr);
842 writel(0x00002006, &axi_qos->qosthres0);
843 writel(0x00002001, &axi_qos->qosthres1);
844 writel(0x00000001, &axi_qos->qosthres2);
845 writel(0x00000001, &axi_qos->qosqon);
846
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]847 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]848 writel(0x00000001, &axi_qos->qosconf);
849 writel(0x0000200C, &axi_qos->qosctset0);
850 writel(0x00000020, &axi_qos->qosreqctr);
851 writel(0x00002006, &axi_qos->qosthres0);
852 writel(0x00002001, &axi_qos->qosthres1);
853 writel(0x00000001, &axi_qos->qosthres2);
854 writel(0x00000001, &axi_qos->qosqon);
855
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]856 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]857 writel(0x00000001, &axi_qos->qosconf);
858 writel(0x0000200C, &axi_qos->qosctset0);
859 writel(0x00000020, &axi_qos->qosreqctr);
860 writel(0x00002006, &axi_qos->qosthres0);
861 writel(0x00002001, &axi_qos->qosthres1);
862 writel(0x00000001, &axi_qos->qosthres2);
863 writel(0x00000001, &axi_qos->qosqon);
864
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]865 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]866 writel(0x00000001, &axi_qos->qosconf);
867 writel(0x0000200C, &axi_qos->qosctset0);
868 writel(0x00000020, &axi_qos->qosreqctr);
869 writel(0x00002006, &axi_qos->qosthres0);
870 writel(0x00002001, &axi_qos->qosthres1);
871 writel(0x00000001, &axi_qos->qosthres2);
872 writel(0x00000001, &axi_qos->qosqon);
873
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]874 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]875 writel(0x00000001, &axi_qos->qosconf);
876 writel(0x0000200C, &axi_qos->qosctset0);
877 writel(0x00000020, &axi_qos->qosreqctr);
878 writel(0x00002006, &axi_qos->qosthres0);
879 writel(0x00002001, &axi_qos->qosthres1);
880 writel(0x00000001, &axi_qos->qosthres2);
881 writel(0x00000001, &axi_qos->qosqon);
882
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]883 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]884 writel(0x00000001, &axi_qos->qosconf);
885 writel(0x0000200C, &axi_qos->qosctset0);
886 writel(0x00000020, &axi_qos->qosreqctr);
887 writel(0x00002006, &axi_qos->qosthres0);
888 writel(0x00002001, &axi_qos->qosthres1);
889 writel(0x00000001, &axi_qos->qosthres2);
890 writel(0x00000001, &axi_qos->qosqon);
891
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]892 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]893 writel(0x00000001, &axi_qos->qosconf);
894 writel(0x0000200C, &axi_qos->qosctset0);
895 writel(0x00000020, &axi_qos->qosreqctr);
896 writel(0x00002006, &axi_qos->qosthres0);
897 writel(0x00002001, &axi_qos->qosthres1);
898 writel(0x00000001, &axi_qos->qosthres2);
899 writel(0x00000001, &axi_qos->qosqon);
900
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]901 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]902 writel(0x00000001, &axi_qos->qosconf);
903 writel(0x0000200C, &axi_qos->qosctset0);
904 writel(0x00000020, &axi_qos->qosreqctr);
905 writel(0x00002006, &axi_qos->qosthres0);
906 writel(0x00002001, &axi_qos->qosthres1);
907 writel(0x00000001, &axi_qos->qosthres2);
908 writel(0x00000001, &axi_qos->qosqon);
909
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]910 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]911 writel(0x00000001, &axi_qos->qosconf);
912 writel(0x0000200C, &axi_qos->qosctset0);
913 writel(0x00000020, &axi_qos->qosreqctr);
914 writel(0x00002006, &axi_qos->qosthres0);
915 writel(0x00002001, &axi_qos->qosthres1);
916 writel(0x00000001, &axi_qos->qosthres2);
917 writel(0x00000001, &axi_qos->qosqon);
918
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]919 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]920 writel(0x00000001, &axi_qos->qosconf);
921 writel(0x0000200C, &axi_qos->qosctset0);
922 writel(0x00000020, &axi_qos->qosreqctr);
923 writel(0x00002006, &axi_qos->qosthres0);
924 writel(0x00002001, &axi_qos->qosthres1);
925 writel(0x00000001, &axi_qos->qosthres2);
926 writel(0x00000001, &axi_qos->qosqon);
927
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]928 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]929 writel(0x00000001, &axi_qos->qosconf);
930 writel(0x0000200C, &axi_qos->qosctset0);
931 writel(0x00000020, &axi_qos->qosreqctr);
932 writel(0x00002006, &axi_qos->qosthres0);
933 writel(0x00002001, &axi_qos->qosthres1);
934 writel(0x00000001, &axi_qos->qosthres2);
935 writel(0x00000001, &axi_qos->qosqon);
936
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]937 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]938 writel(0x00000001, &axi_qos->qosconf);
939 writel(0x0000200C, &axi_qos->qosctset0);
940 writel(0x00000020, &axi_qos->qosreqctr);
941 writel(0x00002006, &axi_qos->qosthres0);
942 writel(0x00002001, &axi_qos->qosthres1);
943 writel(0x00000001, &axi_qos->qosthres2);
944 writel(0x00000001, &axi_qos->qosqon);
945
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]946 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]947 writel(0x00000001, &axi_qos->qosconf);
948 writel(0x0000200C, &axi_qos->qosctset0);
949 writel(0x00000020, &axi_qos->qosreqctr);
950 writel(0x00002006, &axi_qos->qosthres0);
951 writel(0x00002001, &axi_qos->qosthres1);
952 writel(0x00000001, &axi_qos->qosthres2);
953 writel(0x00000001, &axi_qos->qosqon);
954
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]955 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]956 writel(0x00000001, &axi_qos->qosconf);
957 writel(0x0000200C, &axi_qos->qosctset0);
958 writel(0x00000020, &axi_qos->qosreqctr);
959 writel(0x00002006, &axi_qos->qosthres0);
960 writel(0x00002001, &axi_qos->qosthres1);
961 writel(0x00000001, &axi_qos->qosthres2);
962 writel(0x00000001, &axi_qos->qosqon);
963
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]964 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]965 writel(0x00000001, &axi_qos->qosconf);
966 writel(0x0000200C, &axi_qos->qosctset0);
967 writel(0x00000020, &axi_qos->qosreqctr);
968 writel(0x00002006, &axi_qos->qosthres0);
969 writel(0x00002001, &axi_qos->qosthres1);
970 writel(0x00000001, &axi_qos->qosthres2);
971 writel(0x00000001, &axi_qos->qosqon);
972
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]973 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]974 writel(0x00000000, &axi_qos->qosconf);
975 writel(0x0000200C, &axi_qos->qosctset0);
976 writel(0x00000001, &axi_qos->qosreqctr);
977 writel(0x00002006, &axi_qos->qosthres0);
978 writel(0x00002001, &axi_qos->qosthres1);
979 writel(0x00000001, &axi_qos->qosthres2);
980 writel(0x00000001, &axi_qos->qosqon);
981
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]982 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]983 writel(0x00000000, &axi_qos->qosconf);
984 writel(0x0000200C, &axi_qos->qosctset0);
985 writel(0x00000001, &axi_qos->qosreqctr);
986 writel(0x00002006, &axi_qos->qosthres0);
987 writel(0x00002001, &axi_qos->qosthres1);
988 writel(0x00000001, &axi_qos->qosthres2);
989 writel(0x00000001, &axi_qos->qosqon);
990
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]991 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]992 writel(0x00000000, &axi_qos->qosconf);
993 writel(0x0000200C, &axi_qos->qosctset0);
994 writel(0x00000001, &axi_qos->qosreqctr);
995 writel(0x00002006, &axi_qos->qosthres0);
996 writel(0x00002001, &axi_qos->qosthres1);
997 writel(0x00000001, &axi_qos->qosthres2);
998 writel(0x00000001, &axi_qos->qosqon);
999
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1000 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1001 writel(0x00000000, &axi_qos->qosconf);
1002 writel(0x0000200C, &axi_qos->qosctset0);
1003 writel(0x00000001, &axi_qos->qosreqctr);
1004 writel(0x00002006, &axi_qos->qosthres0);
1005 writel(0x00002001, &axi_qos->qosthres1);
1006 writel(0x00000001, &axi_qos->qosthres2);
1007 writel(0x00000001, &axi_qos->qosqon);
1008
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1009 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1010 writel(0x00000000, &axi_qos->qosconf);
1011 writel(0x0000200C, &axi_qos->qosctset0);
1012 writel(0x00000001, &axi_qos->qosreqctr);
1013 writel(0x00002006, &axi_qos->qosthres0);
1014 writel(0x00002001, &axi_qos->qosthres1);
1015 writel(0x00000001, &axi_qos->qosthres2);
1016 writel(0x00000001, &axi_qos->qosqon);
1017
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1018 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1019 writel(0x00000000, &axi_qos->qosconf);
1020 writel(0x0000200C, &axi_qos->qosctset0);
1021 writel(0x00000001, &axi_qos->qosreqctr);
1022 writel(0x00002006, &axi_qos->qosthres0);
1023 writel(0x00002001, &axi_qos->qosthres1);
1024 writel(0x00000001, &axi_qos->qosthres2);
1025 writel(0x00000001, &axi_qos->qosqon);
1026
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1027 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1028 writel(0x00000000, &axi_qos->qosconf);
1029 writel(0x0000200C, &axi_qos->qosctset0);
1030 writel(0x00000001, &axi_qos->qosreqctr);
1031 writel(0x00002006, &axi_qos->qosthres0);
1032 writel(0x00002001, &axi_qos->qosthres1);
1033 writel(0x00000001, &axi_qos->qosthres2);
1034 writel(0x00000001, &axi_qos->qosqon);
1035
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1036 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1037 writel(0x00000000, &axi_qos->qosconf);
1038 writel(0x0000200C, &axi_qos->qosctset0);
1039 writel(0x00000001, &axi_qos->qosreqctr);
1040 writel(0x00002006, &axi_qos->qosthres0);
1041 writel(0x00002001, &axi_qos->qosthres1);
1042 writel(0x00000001, &axi_qos->qosthres2);
1043 writel(0x00000001, &axi_qos->qosqon);
1044
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1045 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1046 writel(0x00000001, &axi_qos->qosconf);
1047 writel(0x00002007, &axi_qos->qosctset0);
1048 writel(0x00000020, &axi_qos->qosreqctr);
1049 writel(0x00002006, &axi_qos->qosthres0);
1050 writel(0x00002001, &axi_qos->qosthres1);
1051 writel(0x00000001, &axi_qos->qosthres2);
1052 writel(0x00000001, &axi_qos->qosqon);
1053
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1054 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1055 writel(0x00000001, &axi_qos->qosconf);
1056 writel(0x00002007, &axi_qos->qosctset0);
1057 writel(0x00000020, &axi_qos->qosreqctr);
1058 writel(0x00002006, &axi_qos->qosthres0);
1059 writel(0x00002001, &axi_qos->qosthres1);
1060 writel(0x00000001, &axi_qos->qosthres2);
1061 writel(0x00000001, &axi_qos->qosqon);
1062
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1063 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1064 writel(0x00000001, &axi_qos->qosconf);
1065 writel(0x00002007, &axi_qos->qosctset0);
1066 writel(0x00000020, &axi_qos->qosreqctr);
1067 writel(0x00002006, &axi_qos->qosthres0);
1068 writel(0x00002001, &axi_qos->qosthres1);
1069 writel(0x00000001, &axi_qos->qosthres2);
1070 writel(0x00000001, &axi_qos->qosqon);
1071
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1072 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1073 writel(0x00000001, &axi_qos->qosconf);
1074 writel(0x00002007, &axi_qos->qosctset0);
1075 writel(0x00000020, &axi_qos->qosreqctr);
1076 writel(0x00002006, &axi_qos->qosthres0);
1077 writel(0x00002001, &axi_qos->qosthres1);
1078 writel(0x00000001, &axi_qos->qosthres2);
1079 writel(0x00000001, &axi_qos->qosqon);
1080
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1081 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1082 writel(0x00000001, &axi_qos->qosconf);
1083 writel(0x00002007, &axi_qos->qosctset0);
1084 writel(0x00000020, &axi_qos->qosreqctr);
1085 writel(0x00002006, &axi_qos->qosthres0);
1086 writel(0x00002001, &axi_qos->qosthres1);
1087 writel(0x00000001, &axi_qos->qosthres2);
1088 writel(0x00000001, &axi_qos->qosqon);
1089
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1090 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1091 writel(0x00000001, &axi_qos->qosconf);
1092 writel(0x00002007, &axi_qos->qosctset0);
1093 writel(0x00000020, &axi_qos->qosreqctr);
1094 writel(0x00002006, &axi_qos->qosthres0);
1095 writel(0x00002001, &axi_qos->qosthres1);
1096 writel(0x00000001, &axi_qos->qosthres2);
1097 writel(0x00000001, &axi_qos->qosqon);
1098
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1099 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1100 writel(0x00000001, &axi_qos->qosconf);
1101 writel(0x00002007, &axi_qos->qosctset0);
1102 writel(0x00000020, &axi_qos->qosreqctr);
1103 writel(0x00002006, &axi_qos->qosthres0);
1104 writel(0x00002001, &axi_qos->qosthres1);
1105 writel(0x00000001, &axi_qos->qosthres2);
1106 writel(0x00000001, &axi_qos->qosqon);
1107
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1108 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1109 writel(0x00000001, &axi_qos->qosconf);
1110 writel(0x00002007, &axi_qos->qosctset0);
1111 writel(0x00000020, &axi_qos->qosreqctr);
1112 writel(0x00002006, &axi_qos->qosthres0);
1113 writel(0x00002001, &axi_qos->qosthres1);
1114 writel(0x00000001, &axi_qos->qosthres2);
1115 writel(0x00000001, &axi_qos->qosqon);
1116
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1117 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1118 writel(0x00000001, &axi_qos->qosconf);
1119 writel(0x00002007, &axi_qos->qosctset0);
1120 writel(0x00000020, &axi_qos->qosreqctr);
1121 writel(0x00002006, &axi_qos->qosthres0);
1122 writel(0x00002001, &axi_qos->qosthres1);
1123 writel(0x00000001, &axi_qos->qosthres2);
1124 writel(0x00000001, &axi_qos->qosqon);
1125
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1126 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1127 writel(0x00000001, &axi_qos->qosconf);
1128 writel(0x00002007, &axi_qos->qosctset0);
1129 writel(0x00000020, &axi_qos->qosreqctr);
1130 writel(0x00002006, &axi_qos->qosthres0);
1131 writel(0x00002001, &axi_qos->qosthres1);
1132 writel(0x00000001, &axi_qos->qosthres2);
1133 writel(0x00000000, &axi_qos->qosqon);
1134}
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1135
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1136#if defined(CONFIG_QOS_PRI_MEDIA)
1137#define is_qos_pri_media() 1
1138#else
1139#define is_qos_pri_media() 0
1140#endif
1141
1142#if defined(CONFIG_QOS_PRI_NORMAL)
1143#define is_qos_pri_normal() 1
1144#else
1145#define is_qos_pri_normal() 0
1146#endif
1147
1148#if defined(CONFIG_QOS_PRI_GFX)
1149#define is_qos_pri_gfx() 1
1150#else
1151#define is_qos_pri_gfx() 0
1152#endif
1153
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1154/* QoS version 0.963 for ES2 */
1155static void qos_init_es2(void)
1156{
1157 int i;
1158 struct rcar_s3c *s3c;
1159 struct rcar_s3c_qos *s3c_qos;
1160 struct rcar_dbsc3_qos *qos_addr;
1161 struct rcar_mxi *mxi;
1162 struct rcar_mxi_qos *mxi_qos;
1163 struct rcar_axi_qos *axi_qos;
1164
1165 /* DBSC DBADJ2 */
1166 writel(0x20042004, DBSC3_0_DBADJ2);
1167
1168 /* S3C -QoS */
1169 s3c = (struct rcar_s3c *)S3C_BASE;
1170 writel(0x80000000, &s3c->s3cadsplcr);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1171 if (is_qos_pri_media()) {
1172 writel(0x1F060302, &s3c->s3crorr);
1173 writel(0x07070302, &s3c->s3cworr);
1174 } else if (is_qos_pri_normal()) {
1175 writel(0x1F060504, &s3c->s3crorr);
1176 writel(0x07070503, &s3c->s3cworr);
1177 } else if (is_qos_pri_gfx()) {
1178 writel(0x1F060606, &s3c->s3crorr);
1179 writel(0x07070606, &s3c->s3cworr);
1180 }
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1181 /* QoS Control Registers */
1182 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
1183 writel(0x00890089, &s3c_qos->s3cqos0);
1184 writel(0x20960010, &s3c_qos->s3cqos1);
1185 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1186 if (is_qos_pri_media())
1187 writel(0x20AA2300, &s3c_qos->s3cqos3);
1188 else if (is_qos_pri_normal())
1189 writel(0x20AA2200, &s3c_qos->s3cqos3);
1190 else if (is_qos_pri_gfx())
1191 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1192 writel(0x00002032, &s3c_qos->s3cqos4);
1193 writel(0x20960010, &s3c_qos->s3cqos5);
1194 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1195 if (is_qos_pri_media())
1196 writel(0x20AA2300, &s3c_qos->s3cqos7);
1197 else if (is_qos_pri_normal())
1198 writel(0x20AA2200, &s3c_qos->s3cqos7);
1199 else if (is_qos_pri_gfx())
1200 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1201 writel(0x00002032, &s3c_qos->s3cqos8);
1202
1203 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
1204 writel(0x00890089, &s3c_qos->s3cqos0);
1205 writel(0x20960010, &s3c_qos->s3cqos1);
1206 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1207 if (is_qos_pri_media())
1208 writel(0x20AA2300, &s3c_qos->s3cqos3);
1209 else if (is_qos_pri_normal())
1210 writel(0x20AA2200, &s3c_qos->s3cqos3);
1211 else if (is_qos_pri_gfx())
1212 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1213 writel(0x00002032, &s3c_qos->s3cqos4);
1214 writel(0x20960010, &s3c_qos->s3cqos5);
1215 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1216 if (is_qos_pri_media())
1217 writel(0x20AA2300, &s3c_qos->s3cqos7);
1218 else if (is_qos_pri_normal())
1219 writel(0x20AA2200, &s3c_qos->s3cqos7);
1220 else if (is_qos_pri_gfx())
1221 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1222 writel(0x00002032, &s3c_qos->s3cqos8);
1223
1224 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
1225 writel(0x80928092, &s3c_qos->s3cqos0);
1226 writel(0x20960020, &s3c_qos->s3cqos1);
1227 writel(0x20302030, &s3c_qos->s3cqos2);
1228 writel(0x20AA20DC, &s3c_qos->s3cqos3);
1229 writel(0x00002032, &s3c_qos->s3cqos4);
1230 writel(0x20960020, &s3c_qos->s3cqos5);
1231 writel(0x20302030, &s3c_qos->s3cqos6);
1232 writel(0x20AA20DC, &s3c_qos->s3cqos7);
1233 writel(0x00002032, &s3c_qos->s3cqos8);
1234
1235 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1236 writel(0x00828092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1237 writel(0x20960020, &s3c_qos->s3cqos1);
1238 writel(0x20302030, &s3c_qos->s3cqos2);
1239 writel(0x20AA20FA, &s3c_qos->s3cqos3);
1240 writel(0x00002032, &s3c_qos->s3cqos4);
1241 writel(0x20960020, &s3c_qos->s3cqos5);
1242 writel(0x20302030, &s3c_qos->s3cqos6);
1243 writel(0x20AA20FA, &s3c_qos->s3cqos7);
1244 writel(0x00002032, &s3c_qos->s3cqos8);
1245
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1246 writel(0x00310808, &s3c->s3carcr11);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1247
1248 /* DBSC -QoS */
1249 /* DBSC0 - Read */
1250 for (i = DBSC3_00; i < DBSC3_NR; i++) {
1251 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
1252 writel(0x00000002, &qos_addr->dblgcnt);
1253 writel(0x00002096, &qos_addr->dbtmval0);
1254 writel(0x00002064, &qos_addr->dbtmval1);
1255 writel(0x00002032, &qos_addr->dbtmval2);
1256 writel(0x00001FB0, &qos_addr->dbtmval3);
1257 writel(0x00000001, &qos_addr->dbrqctr);
1258 writel(0x00002078, &qos_addr->dbthres0);
1259 writel(0x0000204B, &qos_addr->dbthres1);
1260 writel(0x0000201E, &qos_addr->dbthres2);
1261 writel(0x00000001, &qos_addr->dblgqon);
1262 }
1263
1264 /* DBSC0 - Write */
1265 for (i = DBSC3_00; i < DBSC3_NR; i++) {
1266 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
1267 writel(0x00000002, &qos_addr->dblgcnt);
1268 writel(0x00002096, &qos_addr->dbtmval0);
1269 writel(0x00002064, &qos_addr->dbtmval1);
1270 writel(0x00002050, &qos_addr->dbtmval2);
1271 writel(0x0000203A, &qos_addr->dbtmval3);
1272 writel(0x00000001, &qos_addr->dbrqctr);
1273 writel(0x00002078, &qos_addr->dbthres0);
1274 writel(0x0000204B, &qos_addr->dbthres1);
1275 writel(0x0000203C, &qos_addr->dbthres2);
1276 writel(0x00000001, &qos_addr->dblgqon);
1277 }
1278
1279 /* MXI -QoS */
1280 /* Transaction Control (MXI) */
1281 mxi = (struct rcar_mxi *)MXI_BASE;
1282 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1283 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1284 writel(0x00B800C0, &mxi->mxsaar0);
1285 writel(0x02000800, &mxi->mxsaar1);
1286
1287 /* QoS Control (MXI) */
1288 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
1289 writel(0x0000000C, &mxi_qos->vspdu0);
1290 writel(0x0000000C, &mxi_qos->vspdu1);
1291 writel(0x0000000E, &mxi_qos->du0);
1292 writel(0x0000000E, &mxi_qos->du1);
1293
1294 /* AXI -QoS */
1295 /* Transaction Control (MXI) */
1296 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
1297 writel(0x00000002, &axi_qos->qosconf);
1298 writel(0x00002245, &axi_qos->qosctset0);
1299 writel(0x00002096, &axi_qos->qosctset1);
1300 writel(0x00002030, &axi_qos->qosctset2);
1301 writel(0x00002030, &axi_qos->qosctset3);
1302 writel(0x00000001, &axi_qos->qosreqctr);
1303 writel(0x00002064, &axi_qos->qosthres0);
1304 writel(0x00002004, &axi_qos->qosthres1);
1305 writel(0x00000000, &axi_qos->qosthres2);
1306 writel(0x00000001, &axi_qos->qosqon);
1307
1308 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
1309 writel(0x00000000, &axi_qos->qosconf);
1310 writel(0x000020A6, &axi_qos->qosctset0);
1311 writel(0x00000001, &axi_qos->qosreqctr);
1312 writel(0x00002064, &axi_qos->qosthres0);
1313 writel(0x00002004, &axi_qos->qosthres1);
1314 writel(0x00000000, &axi_qos->qosthres2);
1315 writel(0x00000001, &axi_qos->qosqon);
1316
1317 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
1318 writel(0x00000000, &axi_qos->qosconf);
1319 writel(0x000020A6, &axi_qos->qosctset0);
1320 writel(0x00000001, &axi_qos->qosreqctr);
1321 writel(0x00002064, &axi_qos->qosthres0);
1322 writel(0x00002004, &axi_qos->qosthres1);
1323 writel(0x00000000, &axi_qos->qosthres2);
1324 writel(0x00000001, &axi_qos->qosqon);
1325
1326 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
1327 writel(0x00000000, &axi_qos->qosconf);
1328 writel(0x00002021, &axi_qos->qosctset0);
1329 writel(0x00000001, &axi_qos->qosreqctr);
1330 writel(0x00002064, &axi_qos->qosthres0);
1331 writel(0x00002004, &axi_qos->qosthres1);
1332 writel(0x00000000, &axi_qos->qosthres2);
1333 writel(0x00000001, &axi_qos->qosqon);
1334
1335 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
1336 writel(0x00000000, &axi_qos->qosconf);
1337 writel(0x00002037, &axi_qos->qosctset0);
1338 writel(0x00000001, &axi_qos->qosreqctr);
1339 writel(0x00002064, &axi_qos->qosthres0);
1340 writel(0x00002004, &axi_qos->qosthres1);
1341 writel(0x00000000, &axi_qos->qosthres2);
1342 writel(0x00000001, &axi_qos->qosqon);
1343
1344 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
1345 writel(0x00000002, &axi_qos->qosconf);
1346 writel(0x00002245, &axi_qos->qosctset0);
1347 writel(0x00002096, &axi_qos->qosctset1);
1348 writel(0x00002030, &axi_qos->qosctset2);
1349 writel(0x00002030, &axi_qos->qosctset3);
1350 writel(0x00000001, &axi_qos->qosreqctr);
1351 writel(0x00002064, &axi_qos->qosthres0);
1352 writel(0x00002004, &axi_qos->qosthres1);
1353 writel(0x00000000, &axi_qos->qosthres2);
1354 writel(0x00000001, &axi_qos->qosqon);
1355
1356 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
1357 writel(0x00000002, &axi_qos->qosconf);
1358 writel(0x00002245, &axi_qos->qosctset0);
1359 writel(0x00002096, &axi_qos->qosctset1);
1360 writel(0x00002030, &axi_qos->qosctset2);
1361 writel(0x00002030, &axi_qos->qosctset3);
1362 writel(0x00000001, &axi_qos->qosreqctr);
1363 writel(0x00002064, &axi_qos->qosthres0);
1364 writel(0x00002004, &axi_qos->qosthres1);
1365 writel(0x00000000, &axi_qos->qosthres2);
1366 writel(0x00000001, &axi_qos->qosqon);
1367
1368 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
1369 writel(0x00000002, &axi_qos->qosconf);
1370 writel(0x00002245, &axi_qos->qosctset0);
1371 writel(0x00002096, &axi_qos->qosctset1);
1372 writel(0x00002030, &axi_qos->qosctset2);
1373 writel(0x00002030, &axi_qos->qosctset3);
1374 writel(0x00000001, &axi_qos->qosreqctr);
1375 writel(0x00002064, &axi_qos->qosthres0);
1376 writel(0x00002004, &axi_qos->qosthres1);
1377 writel(0x00000000, &axi_qos->qosthres2);
1378 writel(0x00000001, &axi_qos->qosqon);
1379
1380 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
1381 writel(0x00000000, &axi_qos->qosconf);
1382 writel(0x0000214C, &axi_qos->qosctset0);
1383 writel(0x00000001, &axi_qos->qosreqctr);
1384 writel(0x00002064, &axi_qos->qosthres0);
1385 writel(0x00002004, &axi_qos->qosthres1);
1386 writel(0x00000000, &axi_qos->qosthres2);
1387 writel(0x00000001, &axi_qos->qosqon);
1388
1389 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
1390 writel(0x00000001, &axi_qos->qosconf);
1391 writel(0x00002004, &axi_qos->qosctset0);
1392 writel(0x00002096, &axi_qos->qosctset1);
1393 writel(0x00002030, &axi_qos->qosctset2);
1394 writel(0x00002030, &axi_qos->qosctset3);
1395 writel(0x00000001, &axi_qos->qosreqctr);
1396 writel(0x00002064, &axi_qos->qosthres0);
1397 writel(0x00002004, &axi_qos->qosthres1);
1398 writel(0x00000000, &axi_qos->qosthres2);
1399 writel(0x00000001, &axi_qos->qosqon);
1400
1401 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
1402 writel(0x00000001, &axi_qos->qosconf);
1403 writel(0x00002004, &axi_qos->qosctset0);
1404 writel(0x00002096, &axi_qos->qosctset1);
1405 writel(0x00002030, &axi_qos->qosctset2);
1406 writel(0x00002030, &axi_qos->qosctset3);
1407 writel(0x00000001, &axi_qos->qosreqctr);
1408 writel(0x00002064, &axi_qos->qosthres0);
1409 writel(0x00002004, &axi_qos->qosthres1);
1410 writel(0x00000000, &axi_qos->qosthres2);
1411 writel(0x00000001, &axi_qos->qosqon);
1412
1413 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
1414 writel(0x00000001, &axi_qos->qosconf);
1415 writel(0x00002004, &axi_qos->qosctset0);
1416 writel(0x00002096, &axi_qos->qosctset1);
1417 writel(0x00002030, &axi_qos->qosctset2);
1418 writel(0x00002030, &axi_qos->qosctset3);
1419 writel(0x00000001, &axi_qos->qosreqctr);
1420 writel(0x00002064, &axi_qos->qosthres0);
1421 writel(0x00002004, &axi_qos->qosthres1);
1422 writel(0x00000000, &axi_qos->qosthres2);
1423 writel(0x00000001, &axi_qos->qosqon);
1424
1425 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
1426 writel(0x00000001, &axi_qos->qosconf);
1427 writel(0x00002004, &axi_qos->qosctset0);
1428 writel(0x00002096, &axi_qos->qosctset1);
1429 writel(0x00002030, &axi_qos->qosctset2);
1430 writel(0x00002030, &axi_qos->qosctset3);
1431 writel(0x00000001, &axi_qos->qosreqctr);
1432 writel(0x00002064, &axi_qos->qosthres0);
1433 writel(0x00002004, &axi_qos->qosthres1);
1434 writel(0x00000000, &axi_qos->qosthres2);
1435 writel(0x00000001, &axi_qos->qosqon);
1436
1437 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
1438 writel(0x00000001, &axi_qos->qosconf);
1439 writel(0x00002004, &axi_qos->qosctset0);
1440 writel(0x00002096, &axi_qos->qosctset1);
1441 writel(0x00002030, &axi_qos->qosctset2);
1442 writel(0x00002030, &axi_qos->qosctset3);
1443 writel(0x00000001, &axi_qos->qosreqctr);
1444 writel(0x00002064, &axi_qos->qosthres0);
1445 writel(0x00002004, &axi_qos->qosthres1);
1446 writel(0x00000000, &axi_qos->qosthres2);
1447 writel(0x00000001, &axi_qos->qosqon);
1448
1449 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
1450 writel(0x00000000, &axi_qos->qosconf);
1451 writel(0x00002021, &axi_qos->qosctset0);
1452 writel(0x00000001, &axi_qos->qosreqctr);
1453 writel(0x00002064, &axi_qos->qosthres0);
1454 writel(0x00002004, &axi_qos->qosthres1);
1455 writel(0x00000000, &axi_qos->qosthres2);
1456 writel(0x00000001, &axi_qos->qosqon);
1457
1458 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
1459 writel(0x00000000, &axi_qos->qosconf);
1460 writel(0x00002021, &axi_qos->qosctset0);
1461 writel(0x00000001, &axi_qos->qosreqctr);
1462 writel(0x00002064, &axi_qos->qosthres0);
1463 writel(0x00002004, &axi_qos->qosthres1);
1464 writel(0x00000000, &axi_qos->qosthres2);
1465 writel(0x00000001, &axi_qos->qosqon);
1466
1467 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
1468 writel(0x00000000, &axi_qos->qosconf);
1469 writel(0x0000214C, &axi_qos->qosctset0);
1470 writel(0x00000001, &axi_qos->qosreqctr);
1471 writel(0x00002064, &axi_qos->qosthres0);
1472 writel(0x00002004, &axi_qos->qosthres1);
1473 writel(0x00000000, &axi_qos->qosthres2);
1474 writel(0x00000001, &axi_qos->qosqon);
1475
1476 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
1477 writel(0x00000002, &axi_qos->qosconf);
1478 writel(0x00002245, &axi_qos->qosctset0);
1479 writel(0x00002096, &axi_qos->qosctset1);
1480 writel(0x00002030, &axi_qos->qosctset2);
1481 writel(0x00002030, &axi_qos->qosctset3);
1482 writel(0x00000001, &axi_qos->qosreqctr);
1483 writel(0x00002064, &axi_qos->qosthres0);
1484 writel(0x00002004, &axi_qos->qosthres1);
1485 writel(0x00000000, &axi_qos->qosthres2);
1486 writel(0x00000001, &axi_qos->qosqon);
1487
1488 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
1489 writel(0x00000000, &axi_qos->qosconf);
1490 writel(0x000020A6, &axi_qos->qosctset0);
1491 writel(0x00000001, &axi_qos->qosreqctr);
1492 writel(0x00002064, &axi_qos->qosthres0);
1493 writel(0x00002004, &axi_qos->qosthres1);
1494 writel(0x00000000, &axi_qos->qosthres2);
1495 writel(0x00000001, &axi_qos->qosqon);
1496
1497 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
1498 writel(0x00000000, &axi_qos->qosconf);
1499 writel(0x000020A6, &axi_qos->qosctset0);
1500 writel(0x00000001, &axi_qos->qosreqctr);
1501 writel(0x00002064, &axi_qos->qosthres0);
1502 writel(0x00002004, &axi_qos->qosthres1);
1503 writel(0x00000000, &axi_qos->qosthres2);
1504 writel(0x00000001, &axi_qos->qosqon);
1505
1506 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
1507 writel(0x00000000, &axi_qos->qosconf);
1508 writel(0x00002053, &axi_qos->qosctset0);
1509 writel(0x00000001, &axi_qos->qosreqctr);
1510 writel(0x00002064, &axi_qos->qosthres0);
1511 writel(0x00002004, &axi_qos->qosthres1);
1512 writel(0x00000000, &axi_qos->qosthres2);
1513 writel(0x00000001, &axi_qos->qosqon);
1514
1515 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
1516 writel(0x00000000, &axi_qos->qosconf);
1517 writel(0x00002053, &axi_qos->qosctset0);
1518 writel(0x00000001, &axi_qos->qosreqctr);
1519 writel(0x00002064, &axi_qos->qosthres0);
1520 writel(0x00002004, &axi_qos->qosthres1);
1521 writel(0x00000000, &axi_qos->qosthres2);
1522 writel(0x00000001, &axi_qos->qosqon);
1523
1524 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
1525 writel(0x00000000, &axi_qos->qosconf);
1526 writel(0x00002053, &axi_qos->qosctset0);
1527 writel(0x00000001, &axi_qos->qosreqctr);
1528 writel(0x00002064, &axi_qos->qosthres0);
1529 writel(0x00002004, &axi_qos->qosthres1);
1530 writel(0x00000000, &axi_qos->qosthres2);
1531 writel(0x00000001, &axi_qos->qosqon);
1532
1533 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
1534 writel(0x00000000, &axi_qos->qosconf);
1535 writel(0x0000214C, &axi_qos->qosctset0);
1536 writel(0x00000001, &axi_qos->qosreqctr);
1537 writel(0x00002064, &axi_qos->qosthres0);
1538 writel(0x00002004, &axi_qos->qosthres1);
1539 writel(0x00000000, &axi_qos->qosthres2);
1540 writel(0x00000001, &axi_qos->qosqon);
1541
1542 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
1543 writel(0x00000002, &axi_qos->qosconf);
1544 writel(0x00002245, &axi_qos->qosctset0);
1545 writel(0x00000001, &axi_qos->qosreqctr);
1546 writel(0x00002064, &axi_qos->qosthres0);
1547 writel(0x00002004, &axi_qos->qosthres1);
1548 writel(0x00000000, &axi_qos->qosthres2);
1549 writel(0x00000001, &axi_qos->qosqon);
1550
1551 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
1552 writel(0x00000000, &axi_qos->qosconf);
1553 writel(0x00002029, &axi_qos->qosctset0);
1554 writel(0x00000001, &axi_qos->qosreqctr);
1555 writel(0x00002064, &axi_qos->qosthres0);
1556 writel(0x00002004, &axi_qos->qosthres1);
1557 writel(0x00000000, &axi_qos->qosthres2);
1558 writel(0x00000001, &axi_qos->qosqon);
1559
1560 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
1561 writel(0x00000002, &axi_qos->qosconf);
1562 writel(0x00002245, &axi_qos->qosctset0);
1563 writel(0x00000001, &axi_qos->qosreqctr);
1564 writel(0x00002064, &axi_qos->qosthres0);
1565 writel(0x00002004, &axi_qos->qosthres1);
1566 writel(0x00000000, &axi_qos->qosthres2);
1567 writel(0x00000001, &axi_qos->qosqon);
1568
1569 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
1570 writel(0x00000000, &axi_qos->qosconf);
1571 writel(0x00002053, &axi_qos->qosctset0);
1572 writel(0x00000001, &axi_qos->qosreqctr);
1573 writel(0x00002064, &axi_qos->qosthres0);
1574 writel(0x00002004, &axi_qos->qosthres1);
1575 writel(0x00000000, &axi_qos->qosthres2);
1576 writel(0x00000001, &axi_qos->qosqon);
1577
1578 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
1579 writel(0x00000000, &axi_qos->qosconf);
1580 writel(0x000020A6, &axi_qos->qosctset0);
1581 writel(0x00000001, &axi_qos->qosreqctr);
1582 writel(0x00002064, &axi_qos->qosthres0);
1583 writel(0x00002004, &axi_qos->qosthres1);
1584 writel(0x00000000, &axi_qos->qosthres2);
1585 writel(0x00000001, &axi_qos->qosqon);
1586
1587 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
1588 writel(0x00000000, &axi_qos->qosconf);
1589 writel(0x00002053, &axi_qos->qosctset0);
1590 writel(0x00000001, &axi_qos->qosreqctr);
1591 writel(0x00002064, &axi_qos->qosthres0);
1592 writel(0x00002004, &axi_qos->qosthres1);
1593 writel(0x00000000, &axi_qos->qosthres2);
1594 writel(0x00000001, &axi_qos->qosqon);
1595
1596 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
1597 writel(0x00000002, &axi_qos->qosconf);
1598 writel(0x00002245, &axi_qos->qosctset0);
1599 writel(0x00000001, &axi_qos->qosreqctr);
1600 writel(0x00002064, &axi_qos->qosthres0);
1601 writel(0x00002004, &axi_qos->qosthres1);
1602 writel(0x00000000, &axi_qos->qosthres2);
1603 writel(0x00000001, &axi_qos->qosqon);
1604
1605 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
1606 writel(0x00000000, &axi_qos->qosconf);
1607 writel(0x00002053, &axi_qos->qosctset0);
1608 writel(0x00000001, &axi_qos->qosreqctr);
1609 writel(0x00002064, &axi_qos->qosthres0);
1610 writel(0x00002004, &axi_qos->qosthres1);
1611 writel(0x00000000, &axi_qos->qosthres2);
1612 writel(0x00000001, &axi_qos->qosqon);
1613
1614 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
1615 writel(0x00000000, &axi_qos->qosconf);
1616 writel(0x00002053, &axi_qos->qosctset0);
1617 writel(0x00000001, &axi_qos->qosreqctr);
1618 writel(0x00002064, &axi_qos->qosthres0);
1619 writel(0x00002004, &axi_qos->qosthres1);
1620 writel(0x00000000, &axi_qos->qosthres2);
1621 writel(0x00000001, &axi_qos->qosqon);
1622
1623 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
1624 writel(0x00000000, &axi_qos->qosconf);
1625 writel(0x0000214C, &axi_qos->qosctset0);
1626 writel(0x00000001, &axi_qos->qosreqctr);
1627 writel(0x00002064, &axi_qos->qosthres0);
1628 writel(0x00002004, &axi_qos->qosthres1);
1629 writel(0x00000000, &axi_qos->qosthres2);
1630 writel(0x00000001, &axi_qos->qosqon);
1631
1632 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
1633 writel(0x00000000, &axi_qos->qosconf);
1634 writel(0x0000214C, &axi_qos->qosctset0);
1635 writel(0x00000001, &axi_qos->qosreqctr);
1636 writel(0x00002064, &axi_qos->qosthres0);
1637 writel(0x00002004, &axi_qos->qosthres1);
1638 writel(0x00000000, &axi_qos->qosthres2);
1639 writel(0x00000001, &axi_qos->qosqon);
1640
1641 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
1642 writel(0x00000000, &axi_qos->qosconf);
1643 writel(0x000020A6, &axi_qos->qosctset0);
1644 writel(0x00000001, &axi_qos->qosreqctr);
1645 writel(0x00002064, &axi_qos->qosthres0);
1646 writel(0x00002004, &axi_qos->qosthres1);
1647 writel(0x00000000, &axi_qos->qosthres2);
1648 writel(0x00000001, &axi_qos->qosqon);
1649
1650 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
1651 writel(0x00000000, &axi_qos->qosconf);
1652 writel(0x00002053, &axi_qos->qosctset0);
1653 writel(0x00000001, &axi_qos->qosreqctr);
1654 writel(0x00002064, &axi_qos->qosthres0);
1655 writel(0x00002004, &axi_qos->qosthres1);
1656 writel(0x00000000, &axi_qos->qosthres2);
1657 writel(0x00000001, &axi_qos->qosqon);
1658
1659 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
1660 writel(0x00000000, &axi_qos->qosconf);
1661 writel(0x00002053, &axi_qos->qosctset0);
1662 writel(0x00000001, &axi_qos->qosreqctr);
1663 writel(0x00002064, &axi_qos->qosthres0);
1664 writel(0x00002004, &axi_qos->qosthres1);
1665 writel(0x00000000, &axi_qos->qosthres2);
1666 writel(0x00000001, &axi_qos->qosqon);
1667
1668 /* QoS Register (RT-AXI) */
1669 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1670 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1671 writel(0x00002053, &axi_qos->qosctset0);
1672 writel(0x00002096, &axi_qos->qosctset1);
1673 writel(0x00002030, &axi_qos->qosctset2);
1674 writel(0x00002030, &axi_qos->qosctset3);
1675 writel(0x00000001, &axi_qos->qosreqctr);
1676 writel(0x00002064, &axi_qos->qosthres0);
1677 writel(0x00002004, &axi_qos->qosthres1);
1678 writel(0x00000000, &axi_qos->qosthres2);
1679 writel(0x00000001, &axi_qos->qosqon);
1680
1681 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
1682 writel(0x00000000, &axi_qos->qosconf);
1683 writel(0x00002053, &axi_qos->qosctset0);
1684 writel(0x00002096, &axi_qos->qosctset1);
1685 writel(0x00002030, &axi_qos->qosctset2);
1686 writel(0x00002030, &axi_qos->qosctset3);
1687 writel(0x00000001, &axi_qos->qosreqctr);
1688 writel(0x00002064, &axi_qos->qosthres0);
1689 writel(0x00002004, &axi_qos->qosthres1);
1690 writel(0x00000000, &axi_qos->qosthres2);
1691 writel(0x00000001, &axi_qos->qosqon);
1692
1693 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
1694 writel(0x00000000, &axi_qos->qosconf);
1695 writel(0x00002299, &axi_qos->qosctset0);
1696 writel(0x00000001, &axi_qos->qosreqctr);
1697 writel(0x00002064, &axi_qos->qosthres0);
1698 writel(0x00002004, &axi_qos->qosthres1);
1699 writel(0x00000000, &axi_qos->qosthres2);
1700 writel(0x00000001, &axi_qos->qosqon);
1701
1702 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
1703 writel(0x00000000, &axi_qos->qosconf);
1704 writel(0x00002029, &axi_qos->qosctset0);
1705 writel(0x00000001, &axi_qos->qosreqctr);
1706 writel(0x00002064, &axi_qos->qosthres0);
1707 writel(0x00002004, &axi_qos->qosthres1);
1708 writel(0x00000000, &axi_qos->qosthres2);
1709 writel(0x00000001, &axi_qos->qosqon);
1710
1711 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
1712 writel(0x00000002, &axi_qos->qosconf);
1713 writel(0x00002245, &axi_qos->qosctset0);
1714 writel(0x00002096, &axi_qos->qosctset1);
1715 writel(0x00002030, &axi_qos->qosctset2);
1716 writel(0x00002030, &axi_qos->qosctset3);
1717 writel(0x00000001, &axi_qos->qosreqctr);
1718 writel(0x00002064, &axi_qos->qosthres0);
1719 writel(0x00002004, &axi_qos->qosthres1);
1720 writel(0x00000000, &axi_qos->qosthres2);
1721 writel(0x00000001, &axi_qos->qosqon);
1722
1723 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
1724 writel(0x00000000, &axi_qos->qosconf);
1725 writel(0x00002029, &axi_qos->qosctset0);
1726 writel(0x00002096, &axi_qos->qosctset1);
1727 writel(0x00002030, &axi_qos->qosctset2);
1728 writel(0x00002030, &axi_qos->qosctset3);
1729 writel(0x00000001, &axi_qos->qosreqctr);
1730 writel(0x00002064, &axi_qos->qosthres0);
1731 writel(0x00002004, &axi_qos->qosthres1);
1732 writel(0x00000000, &axi_qos->qosthres2);
1733 writel(0x00000001, &axi_qos->qosqon);
1734
1735 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
1736 writel(0x00000002, &axi_qos->qosconf);
1737 writel(0x00002245, &axi_qos->qosctset0);
1738 writel(0x00000001, &axi_qos->qosreqctr);
1739 writel(0x00002064, &axi_qos->qosthres0);
1740 writel(0x00002004, &axi_qos->qosthres1);
1741 writel(0x00000000, &axi_qos->qosthres2);
1742 writel(0x00000001, &axi_qos->qosqon);
1743
1744 /* QoS Register (MP-AXI) */
1745 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
1746 writel(0x00000000, &axi_qos->qosconf);
1747 writel(0x00002037, &axi_qos->qosctset0);
1748 writel(0x00000001, &axi_qos->qosreqctr);
1749 writel(0x00002064, &axi_qos->qosthres0);
1750 writel(0x00002004, &axi_qos->qosthres1);
1751 writel(0x00000000, &axi_qos->qosthres2);
1752 writel(0x00000001, &axi_qos->qosqon);
1753
1754 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
1755 writel(0x00000001, &axi_qos->qosconf);
1756 writel(0x00002014, &axi_qos->qosctset0);
1757 writel(0x00000040, &axi_qos->qosreqctr);
1758 writel(0x00002064, &axi_qos->qosthres0);
1759 writel(0x00002004, &axi_qos->qosthres1);
1760 writel(0x00000000, &axi_qos->qosthres2);
1761 writel(0x00000001, &axi_qos->qosqon);
1762
1763 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
1764 writel(0x00000001, &axi_qos->qosconf);
1765 writel(0x00002014, &axi_qos->qosctset0);
1766 writel(0x00000040, &axi_qos->qosreqctr);
1767 writel(0x00002064, &axi_qos->qosthres0);
1768 writel(0x00002004, &axi_qos->qosthres1);
1769 writel(0x00000000, &axi_qos->qosthres2);
1770 writel(0x00000001, &axi_qos->qosqon);
1771
1772 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
1773 writel(0x00000001, &axi_qos->qosconf);
1774 writel(0x00001FF0, &axi_qos->qosctset0);
1775 writel(0x00000020, &axi_qos->qosreqctr);
1776 writel(0x00002064, &axi_qos->qosthres0);
1777 writel(0x00002004, &axi_qos->qosthres1);
1778 writel(0x00002001, &axi_qos->qosthres2);
1779 writel(0x00000001, &axi_qos->qosqon);
1780
1781 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
1782 writel(0x00000001, &axi_qos->qosconf);
1783 writel(0x00002004, &axi_qos->qosctset0);
1784 writel(0x00002096, &axi_qos->qosctset1);
1785 writel(0x00002030, &axi_qos->qosctset2);
1786 writel(0x00002030, &axi_qos->qosctset3);
1787 writel(0x00000001, &axi_qos->qosreqctr);
1788 writel(0x00002064, &axi_qos->qosthres0);
1789 writel(0x00002004, &axi_qos->qosthres1);
1790 writel(0x00000000, &axi_qos->qosthres2);
1791 writel(0x00000001, &axi_qos->qosqon);
1792
1793 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
1794 writel(0x00000000, &axi_qos->qosconf);
1795 writel(0x00002053, &axi_qos->qosctset0);
1796 writel(0x00000001, &axi_qos->qosreqctr);
1797 writel(0x00002064, &axi_qos->qosthres0);
1798 writel(0x00002004, &axi_qos->qosthres1);
1799 writel(0x00000000, &axi_qos->qosthres2);
1800 writel(0x00000001, &axi_qos->qosqon);
1801
1802 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
1803 writel(0x00000000, &axi_qos->qosconf);
1804 writel(0x0000206E, &axi_qos->qosctset0);
1805 writel(0x00000001, &axi_qos->qosreqctr);
1806 writel(0x00002064, &axi_qos->qosthres0);
1807 writel(0x00002004, &axi_qos->qosthres1);
1808 writel(0x00000000, &axi_qos->qosthres2);
1809 writel(0x00000001, &axi_qos->qosqon);
1810
1811 /* QoS Register (SYS-AXI256) */
1812 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
1813 writel(0x00000002, &axi_qos->qosconf);
1814 writel(0x000020EB, &axi_qos->qosctset0);
1815 writel(0x00002096, &axi_qos->qosctset1);
1816 writel(0x00002030, &axi_qos->qosctset2);
1817 writel(0x00002030, &axi_qos->qosctset3);
1818 writel(0x00000001, &axi_qos->qosreqctr);
1819 writel(0x00002064, &axi_qos->qosthres0);
1820 writel(0x00002004, &axi_qos->qosthres1);
1821 writel(0x00000000, &axi_qos->qosthres2);
1822 writel(0x00000001, &axi_qos->qosqon);
1823
1824 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
1825 writel(0x00000002, &axi_qos->qosconf);
1826 writel(0x000020EB, &axi_qos->qosctset0);
1827 writel(0x00002096, &axi_qos->qosctset1);
1828 writel(0x00002030, &axi_qos->qosctset2);
1829 writel(0x00002030, &axi_qos->qosctset3);
1830 writel(0x00000001, &axi_qos->qosreqctr);
1831 writel(0x00002064, &axi_qos->qosthres0);
1832 writel(0x00002004, &axi_qos->qosthres1);
1833 writel(0x00000000, &axi_qos->qosthres2);
1834 writel(0x00000001, &axi_qos->qosqon);
1835
1836 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
1837 writel(0x00000002, &axi_qos->qosconf);
1838 writel(0x000020EB, &axi_qos->qosctset0);
1839 writel(0x00002096, &axi_qos->qosctset1);
1840 writel(0x00002030, &axi_qos->qosctset2);
1841 writel(0x00002030, &axi_qos->qosctset3);
1842 writel(0x00000001, &axi_qos->qosreqctr);
1843 writel(0x00002064, &axi_qos->qosthres0);
1844 writel(0x00002004, &axi_qos->qosthres1);
1845 writel(0x00000000, &axi_qos->qosthres2);
1846 writel(0x00000001, &axi_qos->qosqon);
1847
1848 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
1849 writel(0x00000002, &axi_qos->qosconf);
1850 writel(0x000020EB, &axi_qos->qosctset0);
1851 writel(0x00002096, &axi_qos->qosctset1);
1852 writel(0x00002030, &axi_qos->qosctset2);
1853 writel(0x00002030, &axi_qos->qosctset3);
1854 writel(0x00000001, &axi_qos->qosreqctr);
1855 writel(0x00002064, &axi_qos->qosthres0);
1856 writel(0x00002004, &axi_qos->qosthres1);
1857 writel(0x00000000, &axi_qos->qosthres2);
1858 writel(0x00000001, &axi_qos->qosqon);
1859
1860 /* QoS Register (CCI-AXI) */
1861 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
1862 writel(0x00000001, &axi_qos->qosconf);
1863 writel(0x00002004, &axi_qos->qosctset0);
1864 writel(0x00002096, &axi_qos->qosctset1);
1865 writel(0x00002030, &axi_qos->qosctset2);
1866 writel(0x00002030, &axi_qos->qosctset3);
1867 writel(0x00000001, &axi_qos->qosreqctr);
1868 writel(0x00002064, &axi_qos->qosthres0);
1869 writel(0x00002004, &axi_qos->qosthres1);
1870 writel(0x00000000, &axi_qos->qosthres2);
1871 writel(0x00000001, &axi_qos->qosqon);
1872
1873 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
1874 writel(0x00000002, &axi_qos->qosconf);
1875 writel(0x00002245, &axi_qos->qosctset0);
1876 writel(0x00002096, &axi_qos->qosctset1);
1877 writel(0x00002030, &axi_qos->qosctset2);
1878 writel(0x00002030, &axi_qos->qosctset3);
1879 writel(0x00000001, &axi_qos->qosreqctr);
1880 writel(0x00002064, &axi_qos->qosthres0);
1881 writel(0x00002004, &axi_qos->qosthres1);
1882 writel(0x00000000, &axi_qos->qosthres2);
1883 writel(0x00000001, &axi_qos->qosqon);
1884
1885 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
1886 writel(0x00000001, &axi_qos->qosconf);
1887 writel(0x00002004, &axi_qos->qosctset0);
1888 writel(0x00002096, &axi_qos->qosctset1);
1889 writel(0x00002030, &axi_qos->qosctset2);
1890 writel(0x00002030, &axi_qos->qosctset3);
1891 writel(0x00000001, &axi_qos->qosreqctr);
1892 writel(0x00002064, &axi_qos->qosthres0);
1893 writel(0x00002004, &axi_qos->qosthres1);
1894 writel(0x00000000, &axi_qos->qosthres2);
1895 writel(0x00000001, &axi_qos->qosqon);
1896
1897 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
1898 writel(0x00000001, &axi_qos->qosconf);
1899 writel(0x00002004, &axi_qos->qosctset0);
1900 writel(0x00002096, &axi_qos->qosctset1);
1901 writel(0x00002030, &axi_qos->qosctset2);
1902 writel(0x00002030, &axi_qos->qosctset3);
1903 writel(0x00000001, &axi_qos->qosreqctr);
1904 writel(0x00002064, &axi_qos->qosthres0);
1905 writel(0x00002004, &axi_qos->qosthres1);
1906 writel(0x00000000, &axi_qos->qosthres2);
1907 writel(0x00000001, &axi_qos->qosqon);
1908
1909 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
1910 writel(0x00000001, &axi_qos->qosconf);
1911 writel(0x00002004, &axi_qos->qosctset0);
1912 writel(0x00002096, &axi_qos->qosctset1);
1913 writel(0x00002030, &axi_qos->qosctset2);
1914 writel(0x00002030, &axi_qos->qosctset3);
1915 writel(0x00000001, &axi_qos->qosreqctr);
1916 writel(0x00002064, &axi_qos->qosthres0);
1917 writel(0x00002004, &axi_qos->qosthres1);
1918 writel(0x00000000, &axi_qos->qosthres2);
1919 writel(0x00000001, &axi_qos->qosqon);
1920
1921 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
1922 writel(0x00000002, &axi_qos->qosconf);
1923 writel(0x00002245, &axi_qos->qosctset0);
1924 writel(0x00002096, &axi_qos->qosctset1);
1925 writel(0x00002030, &axi_qos->qosctset2);
1926 writel(0x00002030, &axi_qos->qosctset3);
1927 writel(0x00000001, &axi_qos->qosreqctr);
1928 writel(0x00002064, &axi_qos->qosthres0);
1929 writel(0x00002004, &axi_qos->qosthres1);
1930 writel(0x00000000, &axi_qos->qosthres2);
1931 writel(0x00000001, &axi_qos->qosqon);
1932
1933 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
1934 writel(0x00000001, &axi_qos->qosconf);
1935 writel(0x00002004, &axi_qos->qosctset0);
1936 writel(0x00002096, &axi_qos->qosctset1);
1937 writel(0x00002030, &axi_qos->qosctset2);
1938 writel(0x00002030, &axi_qos->qosctset3);
1939 writel(0x00000001, &axi_qos->qosreqctr);
1940 writel(0x00002064, &axi_qos->qosthres0);
1941 writel(0x00002004, &axi_qos->qosthres1);
1942 writel(0x00000000, &axi_qos->qosthres2);
1943 writel(0x00000001, &axi_qos->qosqon);
1944
1945 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
1946 writel(0x00000001, &axi_qos->qosconf);
1947 writel(0x00002004, &axi_qos->qosctset0);
1948 writel(0x00002096, &axi_qos->qosctset1);
1949 writel(0x00002030, &axi_qos->qosctset2);
1950 writel(0x00002030, &axi_qos->qosctset3);
1951 writel(0x00000001, &axi_qos->qosreqctr);
1952 writel(0x00002064, &axi_qos->qosthres0);
1953 writel(0x00002004, &axi_qos->qosthres1);
1954 writel(0x00000000, &axi_qos->qosthres2);
1955 writel(0x00000001, &axi_qos->qosqon);
1956
1957 /* QoS Register (Media-AXI) */
1958 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
1959 writel(0x00000002, &axi_qos->qosconf);
1960 writel(0x000020dc, &axi_qos->qosctset0);
1961 writel(0x00002096, &axi_qos->qosctset1);
1962 writel(0x00002030, &axi_qos->qosctset2);
1963 writel(0x00002030, &axi_qos->qosctset3);
1964 writel(0x00000020, &axi_qos->qosreqctr);
1965 writel(0x000020AA, &axi_qos->qosthres0);
1966 writel(0x00002032, &axi_qos->qosthres1);
1967 writel(0x00000001, &axi_qos->qosthres2);
1968
1969 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
1970 writel(0x00000002, &axi_qos->qosconf);
1971 writel(0x000020dc, &axi_qos->qosctset0);
1972 writel(0x00002096, &axi_qos->qosctset1);
1973 writel(0x00002030, &axi_qos->qosctset2);
1974 writel(0x00002030, &axi_qos->qosctset3);
1975 writel(0x00000020, &axi_qos->qosreqctr);
1976 writel(0x000020AA, &axi_qos->qosthres0);
1977 writel(0x00002032, &axi_qos->qosthres1);
1978 writel(0x00000001, &axi_qos->qosthres2);
1979
1980 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
1981 writel(0x00000001, &axi_qos->qosconf);
1982 writel(0x00002190, &axi_qos->qosctset0);
1983 writel(0x00000020, &axi_qos->qosreqctr);
1984 writel(0x00002064, &axi_qos->qosthres0);
1985 writel(0x00002004, &axi_qos->qosthres1);
1986 writel(0x00000001, &axi_qos->qosthres2);
1987 writel(0x00000001, &axi_qos->qosqon);
1988
1989 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
1990 writel(0x00000001, &axi_qos->qosconf);
1991 writel(0x00002190, &axi_qos->qosctset0);
1992 writel(0x00000020, &axi_qos->qosreqctr);
1993 writel(0x00002004, &axi_qos->qosthres0);
1994 writel(0x00000001, &axi_qos->qosthres1);
1995 writel(0x00000001, &axi_qos->qosthres2);
1996 writel(0x00000001, &axi_qos->qosqon);
1997
1998 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
1999 writel(0x00000001, &axi_qos->qosconf);
2000 writel(0x00002190, &axi_qos->qosctset0);
2001 writel(0x00000020, &axi_qos->qosreqctr);
2002 writel(0x00002064, &axi_qos->qosthres0);
2003 writel(0x00002004, &axi_qos->qosthres1);
2004 writel(0x00000001, &axi_qos->qosthres2);
2005 writel(0x00000001, &axi_qos->qosqon);
2006
2007 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
2008 writel(0x00000001, &axi_qos->qosconf);
2009 writel(0x00002190, &axi_qos->qosctset0);
2010 writel(0x00000020, &axi_qos->qosreqctr);
2011 writel(0x00002004, &axi_qos->qosthres0);
2012 writel(0x00000001, &axi_qos->qosthres1);
2013 writel(0x00000001, &axi_qos->qosthres2);
2014 writel(0x00000001, &axi_qos->qosqon);
2015
2016 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
2017 writel(0x00000001, &axi_qos->qosconf);
2018 writel(0x00002190, &axi_qos->qosctset0);
2019 writel(0x00000020, &axi_qos->qosreqctr);
2020 writel(0x00002064, &axi_qos->qosthres0);
2021 writel(0x00002004, &axi_qos->qosthres1);
2022 writel(0x00000001, &axi_qos->qosthres2);
2023 writel(0x00000001, &axi_qos->qosqon);
2024
2025 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
2026 writel(0x00000001, &axi_qos->qosconf);
2027 writel(0x00002190, &axi_qos->qosctset0);
2028 writel(0x00000020, &axi_qos->qosreqctr);
2029 writel(0x00002004, &axi_qos->qosthres0);
2030 writel(0x00000001, &axi_qos->qosthres1);
2031 writel(0x00000001, &axi_qos->qosthres2);
2032 writel(0x00000001, &axi_qos->qosqon);
2033
2034 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
2035 writel(0x00000001, &axi_qos->qosconf);
2036 writel(0x00002190, &axi_qos->qosctset0);
2037 writel(0x00000020, &axi_qos->qosreqctr);
2038 writel(0x00002064, &axi_qos->qosthres0);
2039 writel(0x00002004, &axi_qos->qosthres1);
2040 writel(0x00000001, &axi_qos->qosthres2);
2041 writel(0x00000001, &axi_qos->qosqon);
2042
2043 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
2044 writel(0x00000001, &axi_qos->qosconf);
2045 writel(0x00002190, &axi_qos->qosctset0);
2046 writel(0x00000020, &axi_qos->qosreqctr);
2047 writel(0x00002004, &axi_qos->qosthres0);
2048 writel(0x00000001, &axi_qos->qosthres1);
2049 writel(0x00000001, &axi_qos->qosthres2);
2050 writel(0x00000001, &axi_qos->qosqon);
2051
2052 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
2053 writel(0x00000001, &axi_qos->qosconf);
2054 writel(0x00002190, &axi_qos->qosctset0);
2055 writel(0x00000020, &axi_qos->qosreqctr);
2056 writel(0x00002064, &axi_qos->qosthres0);
2057 writel(0x00002004, &axi_qos->qosthres1);
2058 writel(0x00000001, &axi_qos->qosthres2);
2059 writel(0x00000001, &axi_qos->qosqon);
2060
2061 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
2062 writel(0x00000001, &axi_qos->qosconf);
2063 writel(0x00002190, &axi_qos->qosctset0);
2064 writel(0x00000020, &axi_qos->qosreqctr);
2065 writel(0x00002004, &axi_qos->qosthres0);
2066 writel(0x00000001, &axi_qos->qosthres1);
2067 writel(0x00000001, &axi_qos->qosthres2);
2068 writel(0x00000001, &axi_qos->qosqon);
2069
2070 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
2071 writel(0x00000001, &axi_qos->qosconf);
2072 writel(0x00002190, &axi_qos->qosctset0);
2073 writel(0x00000020, &axi_qos->qosreqctr);
2074 writel(0x00002064, &axi_qos->qosthres0);
2075 writel(0x00002004, &axi_qos->qosthres1);
2076 writel(0x00000001, &axi_qos->qosthres2);
2077 writel(0x00000001, &axi_qos->qosqon);
2078
2079 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
2080 writel(0x00000001, &axi_qos->qosconf);
2081 writel(0x00002190, &axi_qos->qosctset0);
2082 writel(0x00000020, &axi_qos->qosreqctr);
2083 writel(0x00002004, &axi_qos->qosthres0);
2084 writel(0x00000001, &axi_qos->qosthres1);
2085 writel(0x00000001, &axi_qos->qosthres2);
2086 writel(0x00000001, &axi_qos->qosqon);
2087
2088 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
2089 writel(0x00000001, &axi_qos->qosconf);
2090 writel(0x00002190, &axi_qos->qosctset0);
2091 writel(0x00000020, &axi_qos->qosreqctr);
2092 writel(0x00002064, &axi_qos->qosthres0);
2093 writel(0x00002004, &axi_qos->qosthres1);
2094 writel(0x00000001, &axi_qos->qosthres2);
2095 writel(0x00000001, &axi_qos->qosqon);
2096
2097 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
2098 writel(0x00000001, &axi_qos->qosconf);
2099 writel(0x00002190, &axi_qos->qosctset0);
2100 writel(0x00000020, &axi_qos->qosreqctr);
2101 writel(0x00002004, &axi_qos->qosthres0);
2102 writel(0x00000001, &axi_qos->qosthres1);
2103 writel(0x00000001, &axi_qos->qosthres2);
2104 writel(0x00000001, &axi_qos->qosqon);
2105
2106 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
2107 writel(0x00000001, &axi_qos->qosconf);
2108 writel(0x00002190, &axi_qos->qosctset0);
2109 writel(0x00000020, &axi_qos->qosreqctr);
2110 writel(0x00002064, &axi_qos->qosthres0);
2111 writel(0x00002004, &axi_qos->qosthres1);
2112 writel(0x00000001, &axi_qos->qosthres2);
2113 writel(0x00000001, &axi_qos->qosqon);
2114
2115 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
2116 writel(0x00000001, &axi_qos->qosconf);
2117 writel(0x00002190, &axi_qos->qosctset0);
2118 writel(0x00000020, &axi_qos->qosreqctr);
2119 writel(0x00002004, &axi_qos->qosthres0);
2120 writel(0x00000001, &axi_qos->qosthres1);
2121 writel(0x00000001, &axi_qos->qosthres2);
2122 writel(0x00000001, &axi_qos->qosqon);
2123
2124 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
2125 writel(0x00000001, &axi_qos->qosconf);
2126 writel(0x00001FF0, &axi_qos->qosctset0);
2127 writel(0x00000020, &axi_qos->qosreqctr);
2128 writel(0x00002064, &axi_qos->qosthres0);
2129 writel(0x00002004, &axi_qos->qosthres1);
2130 writel(0x00002001, &axi_qos->qosthres2);
2131 writel(0x00000001, &axi_qos->qosqon);
2132
2133 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
2134 writel(0x00000001, &axi_qos->qosconf);
2135 writel(0x000020C8, &axi_qos->qosctset0);
2136 writel(0x00000020, &axi_qos->qosreqctr);
2137 writel(0x00002064, &axi_qos->qosthres0);
2138 writel(0x00002004, &axi_qos->qosthres1);
2139 writel(0x00000001, &axi_qos->qosthres2);
2140 writel(0x00000001, &axi_qos->qosqon);
2141
2142 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
2143 writel(0x00000001, &axi_qos->qosconf);
2144 writel(0x000020C8, &axi_qos->qosctset0);
2145 writel(0x00000020, &axi_qos->qosreqctr);
2146 writel(0x00002004, &axi_qos->qosthres0);
2147 writel(0x00000001, &axi_qos->qosthres1);
2148 writel(0x00000001, &axi_qos->qosthres2);
2149 writel(0x00000001, &axi_qos->qosqon);
2150
2151 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
2152 writel(0x00000001, &axi_qos->qosconf);
2153 writel(0x000020C8, &axi_qos->qosctset0);
2154 writel(0x00000020, &axi_qos->qosreqctr);
2155 writel(0x00002064, &axi_qos->qosthres0);
2156 writel(0x00002004, &axi_qos->qosthres1);
2157 writel(0x00000001, &axi_qos->qosthres2);
2158 writel(0x00000001, &axi_qos->qosqon);
2159
2160 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
2161 writel(0x00000001, &axi_qos->qosconf);
2162 writel(0x000020C8, &axi_qos->qosctset0);
2163 writel(0x00000020, &axi_qos->qosreqctr);
2164 writel(0x00002004, &axi_qos->qosthres0);
2165 writel(0x00000001, &axi_qos->qosthres1);
2166 writel(0x00000001, &axi_qos->qosthres2);
2167 writel(0x00000001, &axi_qos->qosqon);
2168
2169 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
2170 writel(0x00000001, &axi_qos->qosconf);
2171 writel(0x000020C8, &axi_qos->qosctset0);
2172 writel(0x00000020, &axi_qos->qosreqctr);
2173 writel(0x00002064, &axi_qos->qosthres0);
2174 writel(0x00002004, &axi_qos->qosthres1);
2175 writel(0x00000001, &axi_qos->qosthres2);
2176 writel(0x00000001, &axi_qos->qosqon);
2177
2178 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
2179 writel(0x00000001, &axi_qos->qosconf);
2180 writel(0x000020C8, &axi_qos->qosctset0);
2181 writel(0x00000020, &axi_qos->qosreqctr);
2182 writel(0x00002064, &axi_qos->qosthres0);
2183 writel(0x00002004, &axi_qos->qosthres1);
2184 writel(0x00000001, &axi_qos->qosthres2);
2185 writel(0x00000001, &axi_qos->qosqon);
2186
2187 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
2188 writel(0x00000001, &axi_qos->qosconf);
2189 writel(0x000020C8, &axi_qos->qosctset0);
2190 writel(0x00000020, &axi_qos->qosreqctr);
2191 writel(0x00002064, &axi_qos->qosthres0);
2192 writel(0x00002004, &axi_qos->qosthres1);
2193 writel(0x00000001, &axi_qos->qosthres2);
2194 writel(0x00000001, &axi_qos->qosqon);
2195
2196 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
2197 writel(0x00000001, &axi_qos->qosconf);
2198 writel(0x000020C8, &axi_qos->qosctset0);
2199 writel(0x00000020, &axi_qos->qosreqctr);
2200 writel(0x00002004, &axi_qos->qosthres0);
2201 writel(0x00000001, &axi_qos->qosthres1);
2202 writel(0x00000001, &axi_qos->qosthres2);
2203 writel(0x00000001, &axi_qos->qosqon);
2204
2205 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
2206 writel(0x00000001, &axi_qos->qosconf);
2207 writel(0x000020C8, &axi_qos->qosctset0);
2208 writel(0x00000020, &axi_qos->qosreqctr);
2209 writel(0x00002064, &axi_qos->qosthres0);
2210 writel(0x00002004, &axi_qos->qosthres1);
2211 writel(0x00000001, &axi_qos->qosthres2);
2212 writel(0x00000001, &axi_qos->qosqon);
2213
2214 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
2215 writel(0x00000001, &axi_qos->qosconf);
2216 writel(0x000020C8, &axi_qos->qosctset0);
2217 writel(0x00000020, &axi_qos->qosreqctr);
2218 writel(0x00002004, &axi_qos->qosthres0);
2219 writel(0x00000001, &axi_qos->qosthres1);
2220 writel(0x00000001, &axi_qos->qosthres2);
2221 writel(0x00000001, &axi_qos->qosqon);
2222
2223 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
2224 writel(0x00000001, &axi_qos->qosconf);
2225 writel(0x000020C8, &axi_qos->qosctset0);
2226 writel(0x00000020, &axi_qos->qosreqctr);
2227 writel(0x00002064, &axi_qos->qosthres0);
2228 writel(0x00002004, &axi_qos->qosthres1);
2229 writel(0x00000001, &axi_qos->qosthres2);
2230 writel(0x00000001, &axi_qos->qosqon);
2231
2232 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
2233 writel(0x00000001, &axi_qos->qosconf);
2234 writel(0x000020C8, &axi_qos->qosctset0);
2235 writel(0x00000020, &axi_qos->qosreqctr);
2236 writel(0x00002004, &axi_qos->qosthres0);
2237 writel(0x00000001, &axi_qos->qosthres1);
2238 writel(0x00000001, &axi_qos->qosthres2);
2239 writel(0x00000001, &axi_qos->qosqon);
2240
2241 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
2242 writel(0x00000001, &axi_qos->qosconf);
2243 writel(0x000020C8, &axi_qos->qosctset0);
2244 writel(0x00000020, &axi_qos->qosreqctr);
2245 writel(0x00002064, &axi_qos->qosthres0);
2246 writel(0x00002004, &axi_qos->qosthres1);
2247 writel(0x00000001, &axi_qos->qosthres2);
2248 writel(0x00000001, &axi_qos->qosqon);
2249
2250 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
2251 writel(0x00000001, &axi_qos->qosconf);
2252 writel(0x000020C8, &axi_qos->qosctset0);
2253 writel(0x00000020, &axi_qos->qosreqctr);
2254 writel(0x00002004, &axi_qos->qosthres0);
2255 writel(0x00000001, &axi_qos->qosthres1);
2256 writel(0x00000001, &axi_qos->qosthres2);
2257 writel(0x00000001, &axi_qos->qosqon);
2258
2259 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
2260 writel(0x00000003, &axi_qos->qosconf);
2261 writel(0x000020C8, &axi_qos->qosctset0);
2262 writel(0x00000001, &axi_qos->qosreqctr);
2263 writel(0x00002064, &axi_qos->qosthres0);
2264 writel(0x00002004, &axi_qos->qosthres1);
2265 writel(0x00000001, &axi_qos->qosthres2);
2266 writel(0x00000001, &axi_qos->qosqon);
2267
2268 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
2269 writel(0x00000003, &axi_qos->qosconf);
2270 writel(0x000020C8, &axi_qos->qosctset0);
2271 writel(0x00000001, &axi_qos->qosreqctr);
2272 writel(0x00000001, &axi_qos->qosthres0);
2273 writel(0x00000001, &axi_qos->qosthres1);
2274 writel(0x00000001, &axi_qos->qosthres2);
2275 writel(0x00000001, &axi_qos->qosqon);
2276
2277 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
2278 writel(0x00000003, &axi_qos->qosconf);
2279 writel(0x000020C8, &axi_qos->qosctset0);
2280 writel(0x00000001, &axi_qos->qosreqctr);
2281 writel(0x00002064, &axi_qos->qosthres0);
2282 writel(0x00002004, &axi_qos->qosthres1);
2283 writel(0x00000001, &axi_qos->qosthres2);
2284 writel(0x00000001, &axi_qos->qosqon);
2285
2286 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
2287 writel(0x00000003, &axi_qos->qosconf);
2288 writel(0x000020C8, &axi_qos->qosctset0);
2289 writel(0x00000001, &axi_qos->qosreqctr);
2290 writel(0x00000001, &axi_qos->qosthres0);
2291 writel(0x00000001, &axi_qos->qosthres1);
2292 writel(0x00000001, &axi_qos->qosthres2);
2293 writel(0x00000001, &axi_qos->qosqon);
2294
2295 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
2296 writel(0x00000003, &axi_qos->qosconf);
2297 writel(0x00002063, &axi_qos->qosctset0);
2298 writel(0x00000001, &axi_qos->qosreqctr);
2299 writel(0x00002064, &axi_qos->qosthres0);
2300 writel(0x00002004, &axi_qos->qosthres1);
2301 writel(0x00000001, &axi_qos->qosthres2);
2302 writel(0x00000001, &axi_qos->qosqon);
2303
2304 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
2305 writel(0x00000003, &axi_qos->qosconf);
2306 writel(0x00002063, &axi_qos->qosctset0);
2307 writel(0x00000001, &axi_qos->qosreqctr);
2308 writel(0x00000001, &axi_qos->qosthres0);
2309 writel(0x00000001, &axi_qos->qosthres1);
2310 writel(0x00000001, &axi_qos->qosthres2);
2311 writel(0x00000001, &axi_qos->qosqon);
2312
2313 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
2314 writel(0x00000003, &axi_qos->qosconf);
2315 writel(0x00002063, &axi_qos->qosctset0);
2316 writel(0x00000001, &axi_qos->qosreqctr);
2317 writel(0x00002064, &axi_qos->qosthres0);
2318 writel(0x00002004, &axi_qos->qosthres1);
2319 writel(0x00000001, &axi_qos->qosthres2);
2320 writel(0x00000001, &axi_qos->qosqon);
2321
2322 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
2323 writel(0x00000003, &axi_qos->qosconf);
2324 writel(0x00002063, &axi_qos->qosctset0);
2325 writel(0x00000001, &axi_qos->qosreqctr);
2326 writel(0x00000001, &axi_qos->qosthres0);
2327 writel(0x00000001, &axi_qos->qosthres1);
2328 writel(0x00000001, &axi_qos->qosthres2);
2329 writel(0x00000001, &axi_qos->qosqon);
2330
2331 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
2332 writel(0x00000001, &axi_qos->qosconf);
2333 writel(0x00002073, &axi_qos->qosctset0);
2334 writel(0x00000020, &axi_qos->qosreqctr);
2335 writel(0x00002064, &axi_qos->qosthres0);
2336 writel(0x00002004, &axi_qos->qosthres1);
2337 writel(0x00000001, &axi_qos->qosthres2);
2338 writel(0x00000001, &axi_qos->qosqon);
2339
2340 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
2341 writel(0x00000001, &axi_qos->qosconf);
2342 writel(0x00002073, &axi_qos->qosctset0);
2343 writel(0x00000020, &axi_qos->qosreqctr);
2344 writel(0x00002004, &axi_qos->qosthres0);
2345 writel(0x00000001, &axi_qos->qosthres1);
2346 writel(0x00000001, &axi_qos->qosthres2);
2347 writel(0x00000001, &axi_qos->qosqon);
2348
2349 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
2350 writel(0x00000001, &axi_qos->qosconf);
2351 writel(0x00002073, &axi_qos->qosctset0);
2352 writel(0x00000020, &axi_qos->qosreqctr);
2353 writel(0x00002064, &axi_qos->qosthres0);
2354 writel(0x00002004, &axi_qos->qosthres1);
2355 writel(0x00000001, &axi_qos->qosthres2);
2356 writel(0x00000001, &axi_qos->qosqon);
2357
2358 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
2359 writel(0x00000001, &axi_qos->qosconf);
2360 writel(0x00002073, &axi_qos->qosctset0);
2361 writel(0x00000020, &axi_qos->qosreqctr);
2362 writel(0x00002004, &axi_qos->qosthres0);
2363 writel(0x00000001, &axi_qos->qosthres1);
2364 writel(0x00000001, &axi_qos->qosthres2);
2365 writel(0x00000001, &axi_qos->qosqon);
2366
2367 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
2368 writel(0x00000001, &axi_qos->qosconf);
2369 writel(0x00002073, &axi_qos->qosctset0);
2370 writel(0x00000020, &axi_qos->qosreqctr);
2371 writel(0x00002064, &axi_qos->qosthres0);
2372 writel(0x00002004, &axi_qos->qosthres1);
2373 writel(0x00000001, &axi_qos->qosthres2);
2374 writel(0x00000001, &axi_qos->qosqon);
2375
2376 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
2377 writel(0x00000001, &axi_qos->qosconf);
2378 writel(0x00002073, &axi_qos->qosctset0);
2379 writel(0x00000020, &axi_qos->qosreqctr);
2380 writel(0x00002064, &axi_qos->qosthres0);
2381 writel(0x00002004, &axi_qos->qosthres1);
2382 writel(0x00000001, &axi_qos->qosthres2);
2383 writel(0x00000001, &axi_qos->qosqon);
2384
2385 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
2386 writel(0x00000001, &axi_qos->qosconf);
2387 writel(0x00002073, &axi_qos->qosctset0);
2388 writel(0x00000020, &axi_qos->qosreqctr);
2389 writel(0x00002004, &axi_qos->qosthres0);
2390 writel(0x00000001, &axi_qos->qosthres1);
2391 writel(0x00000001, &axi_qos->qosthres2);
2392 writel(0x00000001, &axi_qos->qosqon);
2393
2394 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
2395 writel(0x00000001, &axi_qos->qosconf);
2396 writel(0x00002073, &axi_qos->qosctset0);
2397 writel(0x00000020, &axi_qos->qosreqctr);
2398 writel(0x00002064, &axi_qos->qosthres0);
2399 writel(0x00002004, &axi_qos->qosthres1);
2400 writel(0x00000001, &axi_qos->qosthres2);
2401 writel(0x00000001, &axi_qos->qosqon);
2402
2403 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
2404 writel(0x00000001, &axi_qos->qosconf);
2405 writel(0x00002073, &axi_qos->qosctset0);
2406 writel(0x00000020, &axi_qos->qosreqctr);
2407 writel(0x00002004, &axi_qos->qosthres0);
2408 writel(0x00000001, &axi_qos->qosthres1);
2409 writel(0x00000001, &axi_qos->qosthres2);
2410 writel(0x00000001, &axi_qos->qosqon);
2411
2412 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
2413 writel(0x00000001, &axi_qos->qosconf);
2414 writel(0x00002073, &axi_qos->qosctset0);
2415 writel(0x00000020, &axi_qos->qosreqctr);
2416 writel(0x00002064, &axi_qos->qosthres0);
2417 writel(0x00002004, &axi_qos->qosthres1);
2418 writel(0x00000001, &axi_qos->qosthres2);
2419 writel(0x00000001, &axi_qos->qosqon);
2420}
2421
2422void qos_init(void)
2423{
2424 if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
2425 qos_init_es2();
2426 else
2427 qos_init_es1();
2428}
Nobuhiro Iwamatsufb6f6002014-10-31 16:16:26 +0900[diff] [blame]2429#else /* CONFIG_RMOBILE_EXTRAM_BOOT */
2430void qos_init(void)
2431{
2432}
2433#endif /* CONFIG_RMOBILE_EXTRAM_BOOT */