blob: 37a0be932e4d893e1c189228ed90dac1a99ef123 [file] [log] [blame]
Lokesh Vutlaacf15002018-04-26 18:21:26 +05301if CPU_V7A
Hans de Goedeea624e12014-11-14 09:34:30 +01002
3config CPU_V7_HAS_NONSEC
4 bool
5
6config CPU_V7_HAS_VIRT
7 bool
8
Masahiro Yamada217f92b2016-08-30 16:22:22 +09009config ARCH_SUPPORT_PSCI
10 bool
11
Hans de Goedeea624e12014-11-14 09:34:30 +010012config ARMV7_NONSEC
Masahiro Yamadaab650062016-08-12 10:26:50 +090013 bool "Enable support for booting in non-secure mode" if EXPERT
Hans de Goedeea624e12014-11-14 09:34:30 +010014 depends on CPU_V7_HAS_NONSEC
15 default y
16 ---help---
17 Say Y here to enable support for booting in non-secure / SVC mode.
18
Hans de Goede8bc347e2014-11-14 09:34:31 +010019config ARMV7_BOOT_SEC_DEFAULT
Masahiro Yamadaab650062016-08-12 10:26:50 +090020 bool "Boot in secure mode by default" if EXPERT
Hans de Goede8bc347e2014-11-14 09:34:31 +010021 depends on ARMV7_NONSEC
Jan Kiszkaa8f2d012015-04-21 07:18:39 +020022 default y if TEGRA
Hans de Goede8bc347e2014-11-14 09:34:31 +010023 ---help---
24 Say Y here to boot in secure mode by default even if non-secure mode
25 is supported. This option is useful to boot kernels which do not
26 suppport booting in non-secure mode. Only set this if you need it.
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -040027 This can be overridden at run-time by setting the bootm_boot_mode env.
Hans de Goede8bc347e2014-11-14 09:34:31 +010028 variable to "sec" or "nonsec".
29
Hans de Goedeea624e12014-11-14 09:34:30 +010030config ARMV7_VIRT
Masahiro Yamadaab650062016-08-12 10:26:50 +090031 bool "Enable support for hardware virtualization" if EXPERT
Hans de Goedeea624e12014-11-14 09:34:30 +010032 depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
33 default y
34 ---help---
35 Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
36
Masahiro Yamada217f92b2016-08-30 16:22:22 +090037config ARMV7_PSCI
38 bool "Enable PSCI support" if EXPERT
39 depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
40 default y
41 help
42 Say Y here to enable PSCI support.
43
Masahiro Yamada15446982016-08-30 16:22:23 +090044config ARMV7_PSCI_NR_CPUS
45 int "Maximum supported CPUs for PSCI"
46 depends on ARMV7_NONSEC
47 default 4
48 help
49 The maximum number of CPUs supported in the PSCI firmware.
50 It is no problem to set a larger value than the number of
51 CPUs in the actual hardware implementation.
52
Alexander Grafd990f5c2016-03-16 15:41:21 +010053config ARMV7_LPAE
Masahiro Yamadaab650062016-08-12 10:26:50 +090054 bool "Use LPAE page table format" if EXPERT
Lokesh Vutlaacf15002018-04-26 18:21:26 +053055 depends on CPU_V7A
Alexander Grafd990f5c2016-03-16 15:41:21 +010056 default n
57 ---help---
58 Say Y here to use the long descriptor page table format. This is
59 required if U-Boot runs in HYP mode.
60
Hans de Goedeea624e12014-11-14 09:34:30 +010061endif