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Kyle Moffett01baa052011-02-23 06:40:38 +00001/*
2 * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
3 * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
4 * known as 2.6.38-rc5). The source file copyrights are as follows:
5 *
6 * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 *
8 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
9 * and Paul Mackerras.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 */
16
17#include <ppc_asm.tmpl>
18#include <ppc_defs.h>
19#include <config.h>
20
21/*
22 * Extended precision shifts.
23 *
24 * Updated to be valid for shift counts from 0 to 63 inclusive.
25 * -- Gabriel
26 *
27 * R3/R4 has 64 bit value
28 * R5 has shift count
29 * result in R3/R4
30 *
31 * ashrdi3: arithmetic right shift (sign propagation)
32 * lshrdi3: logical right shift
33 * ashldi3: left shift
34 */
35 .globl __ashldi3
36__ashldi3:
37 subfic r6,r5,32
38 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
39 addi r7,r5,32 # could be xori, or addi with -32
40 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
41 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
42 or r3,r3,r6 # MSW |= t1
43 slw r4,r4,r5 # LSW = LSW << count
44 or r3,r3,r7 # MSW |= t2
45 blr