Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 2 | /* |
Marcel Ziswiler | 842ddf8 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 3 | * Copyright (c) 2016-2020 Toradex |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 401d1c4 | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 7 | #include <asm/global_data.h> |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 8 | #include "tdx-cfg-block.h" |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 9 | #include "tdx-eeprom.h" |
| 10 | |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 11 | #include <command.h> |
Simon Glass | 90526e9 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 12 | #include <asm/cache.h> |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 13 | |
Marcel Ziswiler | 4adc9fc | 2019-04-09 17:25:32 +0200 | [diff] [blame] | 14 | #if defined(CONFIG_TARGET_APALIS_IMX6) || \ |
Marcel Ziswiler | 9d63c7d | 2019-07-12 12:35:08 +0200 | [diff] [blame] | 15 | defined(CONFIG_TARGET_APALIS_IMX8) || \ |
Marcel Ziswiler | 842ddf8 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 16 | defined(CONFIG_TARGET_APALIS_IMX8X) || \ |
Marcel Ziswiler | 4adc9fc | 2019-04-09 17:25:32 +0200 | [diff] [blame] | 17 | defined(CONFIG_TARGET_COLIBRI_IMX6) || \ |
Marcel Ziswiler | c0c3978 | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 18 | defined(CONFIG_TARGET_COLIBRI_IMX8X) || \ |
| 19 | defined(CONFIG_TARGET_VERDIN_IMX8MM) || \ |
Marcel Ziswiler | a5b5ad4 | 2020-10-28 11:58:08 +0200 | [diff] [blame] | 20 | defined(CONFIG_TARGET_VERDIN_IMX8MN) || \ |
| 21 | defined(CONFIG_TARGET_VERDIN_IMX8MP) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 22 | #include <asm/arch/sys_proto.h> |
| 23 | #else |
| 24 | #define is_cpu_type(cpu) (0) |
| 25 | #endif |
| 26 | #if defined(CONFIG_CPU_PXA27X) |
| 27 | #include <asm/arch-pxa/pxa.h> |
| 28 | #else |
| 29 | #define cpu_is_pxa27x(cpu) (0) |
| 30 | #endif |
| 31 | #include <cli.h> |
| 32 | #include <console.h> |
Simon Glass | 7b51b57 | 2019-08-01 09:46:52 -0600 | [diff] [blame] | 33 | #include <env.h> |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 34 | #include <flash.h> |
| 35 | #include <malloc.h> |
| 36 | #include <mmc.h> |
| 37 | #include <nand.h> |
Simon Glass | c62db35 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 38 | #include <asm/mach-types.h> |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 39 | |
| 40 | DECLARE_GLOBAL_DATA_PTR; |
| 41 | |
| 42 | #define TAG_VALID 0xcf01 |
| 43 | #define TAG_MAC 0x0000 |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 44 | #define TAG_CAR_SERIAL 0x0021 |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 45 | #define TAG_HW 0x0008 |
| 46 | #define TAG_INVALID 0xffff |
| 47 | |
| 48 | #define TAG_FLAG_VALID 0x1 |
| 49 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 50 | #define TDX_EEPROM_ID_MODULE 0 |
| 51 | #define TDX_EEPROM_ID_CARRIER 1 |
| 52 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 53 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 54 | #define TDX_CFG_BLOCK_MAX_SIZE 512 |
| 55 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 56 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
| 57 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 58 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 59 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM) |
| 60 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 61 | #else |
| 62 | #error Toradex config block location not set |
| 63 | #endif |
| 64 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 65 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 66 | #define TDX_CFG_BLOCK_EXTRA_MAX_SIZE 64 |
| 67 | #endif |
| 68 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 69 | struct toradex_tag { |
| 70 | u32 len:14; |
| 71 | u32 flags:2; |
| 72 | u32 id:16; |
| 73 | }; |
| 74 | |
| 75 | bool valid_cfgblock; |
| 76 | struct toradex_hw tdx_hw_tag; |
| 77 | struct toradex_eth_addr tdx_eth_addr; |
| 78 | u32 tdx_serial; |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 79 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 80 | u32 tdx_car_serial; |
| 81 | bool valid_cfgblock_carrier; |
| 82 | struct toradex_hw tdx_car_hw_tag; |
| 83 | #endif |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 84 | |
| 85 | const char * const toradex_modules[] = { |
| 86 | [0] = "UNKNOWN MODULE", |
| 87 | [1] = "Colibri PXA270 312MHz", |
| 88 | [2] = "Colibri PXA270 520MHz", |
| 89 | [3] = "Colibri PXA320 806MHz", |
| 90 | [4] = "Colibri PXA300 208MHz", |
| 91 | [5] = "Colibri PXA310 624MHz", |
| 92 | [6] = "Colibri PXA320 806MHz IT", |
| 93 | [7] = "Colibri PXA300 208MHz XT", |
| 94 | [8] = "Colibri PXA270 312MHz", |
| 95 | [9] = "Colibri PXA270 520MHz", |
| 96 | [10] = "Colibri VF50 128MB", /* not currently on sale */ |
| 97 | [11] = "Colibri VF61 256MB", |
| 98 | [12] = "Colibri VF61 256MB IT", |
| 99 | [13] = "Colibri VF50 128MB IT", |
| 100 | [14] = "Colibri iMX6 Solo 256MB", |
| 101 | [15] = "Colibri iMX6 DualLite 512MB", |
| 102 | [16] = "Colibri iMX6 Solo 256MB IT", |
| 103 | [17] = "Colibri iMX6 DualLite 512MB IT", |
| 104 | [18] = "UNKNOWN MODULE", |
| 105 | [19] = "UNKNOWN MODULE", |
| 106 | [20] = "Colibri T20 256MB", |
| 107 | [21] = "Colibri T20 512MB", |
| 108 | [22] = "Colibri T20 512MB IT", |
| 109 | [23] = "Colibri T30 1GB", |
| 110 | [24] = "Colibri T20 256MB IT", |
| 111 | [25] = "Apalis T30 2GB", |
| 112 | [26] = "Apalis T30 1GB", |
| 113 | [27] = "Apalis iMX6 Quad 1GB", |
| 114 | [28] = "Apalis iMX6 Quad 2GB IT", |
| 115 | [29] = "Apalis iMX6 Dual 512MB", |
| 116 | [30] = "Colibri T30 1GB IT", |
| 117 | [31] = "Apalis T30 1GB IT", |
| 118 | [32] = "Colibri iMX7 Solo 256MB", |
| 119 | [33] = "Colibri iMX7 Dual 512MB", |
| 120 | [34] = "Apalis TK1 2GB", |
| 121 | [35] = "Apalis iMX6 Dual 1GB IT", |
Stefan Agner | d826b87 | 2018-05-30 19:01:47 +0200 | [diff] [blame] | 122 | [36] = "Colibri iMX6ULL 256MB", |
Marcel Ziswiler | 4adc9fc | 2019-04-09 17:25:32 +0200 | [diff] [blame] | 123 | [37] = "Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT", |
| 124 | [38] = "Colibri iMX8 QuadXPlus 2GB Wi-Fi / BT IT", |
Stefan Agner | d826b87 | 2018-05-30 19:01:47 +0200 | [diff] [blame] | 125 | [39] = "Colibri iMX7 Dual 1GB (eMMC)", |
Marcel Ziswiler | 4adc9fc | 2019-04-09 17:25:32 +0200 | [diff] [blame] | 126 | [40] = "Colibri iMX6ULL 512MB Wi-Fi / BT IT", |
Stefan Agner | d826b87 | 2018-05-30 19:01:47 +0200 | [diff] [blame] | 127 | [41] = "Colibri iMX7 Dual 512MB EPDC", |
| 128 | [42] = "Apalis TK1 4GB", |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 129 | [43] = "Colibri T20 512MB IT SETEK", |
| 130 | [44] = "Colibri iMX6ULL 512MB IT", |
| 131 | [45] = "Colibri iMX6ULL 512MB Wi-Fi / Bluetooth", |
Marcel Ziswiler | 6988a3a | 2019-04-09 17:25:33 +0200 | [diff] [blame] | 132 | [46] = "Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT", |
| 133 | [47] = "Apalis iMX8 QuadMax 4GB IT", |
| 134 | [48] = "Apalis iMX8 QuadPlus 2GB Wi-Fi / BT", |
| 135 | [49] = "Apalis iMX8 QuadPlus 2GB", |
| 136 | [50] = "Colibri iMX8 QuadXPlus 2GB IT", |
| 137 | [51] = "Colibri iMX8 DualX 1GB Wi-Fi / Bluetooth", |
| 138 | [52] = "Colibri iMX8 DualX 1GB", |
Marcel Ziswiler | 842ddf8 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 139 | [53] = "Apalis iMX8 QuadXPlus 2GB ECC IT", |
| 140 | [54] = "Apalis iMX8 DualXPlus 1GB", |
Marcel Ziswiler | c0c3978 | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 141 | [55] = "Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT", |
Marcel Ziswiler | a5b5ad4 | 2020-10-28 11:58:08 +0200 | [diff] [blame] | 142 | [56] = "Verdin iMX8M Nano Quad 1GB Wi-Fi / BT", /* not currently on sale */ |
Marcel Ziswiler | c0c3978 | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 143 | [57] = "Verdin iMX8M Mini DualLite 1GB", |
Marcel Ziswiler | a5b5ad4 | 2020-10-28 11:58:08 +0200 | [diff] [blame] | 144 | [58] = "Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT", |
| 145 | [59] = "Verdin iMX8M Mini Quad 2GB IT", |
| 146 | [60] = "Verdin iMX8M Mini DualLite 1GB WB IT", |
| 147 | [61] = "Verdin iMX8M Plus Quad 2GB", |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 148 | }; |
| 149 | |
Igor Opaniuk | 26921f5 | 2020-07-15 13:30:54 +0300 | [diff] [blame] | 150 | const char * const toradex_carrier_boards[] = { |
| 151 | [0] = "UNKNOWN CARRIER BOARD", |
| 152 | [155] = "Dahlia", |
| 153 | [156] = "Verdin Development Board", |
| 154 | }; |
| 155 | |
| 156 | const char * const toradex_display_adapters[] = { |
| 157 | [0] = "UNKNOWN DISPLAY ADAPTER", |
| 158 | [157] = "Verdin DSI to HDMI Adapter", |
| 159 | [159] = "Verdin DSI to LVDS Adapter", |
| 160 | }; |
| 161 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 162 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC |
| 163 | static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) |
| 164 | { |
| 165 | struct mmc *mmc; |
| 166 | int dev = CONFIG_TDX_CFG_BLOCK_DEV; |
| 167 | int offset = CONFIG_TDX_CFG_BLOCK_OFFSET; |
| 168 | uint part = CONFIG_TDX_CFG_BLOCK_PART; |
| 169 | uint blk_start; |
| 170 | int ret = 0; |
| 171 | |
| 172 | /* Read production parameter config block from eMMC */ |
| 173 | mmc = find_mmc_device(dev); |
| 174 | if (!mmc) { |
| 175 | puts("No MMC card found\n"); |
| 176 | ret = -ENODEV; |
| 177 | goto out; |
| 178 | } |
Stefan Agner | 42a4f18 | 2019-07-12 12:35:05 +0200 | [diff] [blame] | 179 | if (mmc_init(mmc)) { |
| 180 | puts("MMC init failed\n"); |
| 181 | return -EINVAL; |
| 182 | } |
Simon Glass | 0e513e7 | 2017-04-23 20:02:11 -0600 | [diff] [blame] | 183 | if (part != mmc_get_blk_desc(mmc)->hwpart) { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 184 | if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) { |
| 185 | puts("MMC partition switch failed\n"); |
| 186 | ret = -ENODEV; |
| 187 | goto out; |
| 188 | } |
| 189 | } |
| 190 | if (offset < 0) |
| 191 | offset += mmc->capacity; |
| 192 | blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len; |
| 193 | |
| 194 | if (!write) { |
| 195 | /* Careful reads a whole block of 512 bytes into config_block */ |
| 196 | if (blk_dread(mmc_get_blk_desc(mmc), blk_start, 1, |
| 197 | (unsigned char *)config_block) != 1) { |
| 198 | ret = -EIO; |
| 199 | goto out; |
| 200 | } |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 201 | } else { |
| 202 | /* Just writing one 512 byte block */ |
| 203 | if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1, |
| 204 | (unsigned char *)config_block) != 1) { |
| 205 | ret = -EIO; |
| 206 | goto out; |
| 207 | } |
| 208 | } |
| 209 | |
| 210 | out: |
| 211 | /* Switch back to regular eMMC user partition */ |
| 212 | blk_select_hwpart_devnum(IF_TYPE_MMC, 0, 0); |
| 213 | |
| 214 | return ret; |
| 215 | } |
| 216 | #endif |
| 217 | |
| 218 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NAND |
| 219 | static int read_tdx_cfg_block_from_nand(unsigned char *config_block) |
| 220 | { |
| 221 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
Stefan Agner | bc53fb1 | 2018-08-06 09:19:18 +0200 | [diff] [blame] | 222 | struct mtd_info *mtd = get_nand_dev_by_index(0); |
| 223 | |
| 224 | if (!mtd) |
| 225 | return -ENODEV; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 226 | |
| 227 | /* Read production parameter config block from NAND page */ |
Stefan Agner | bc53fb1 | 2018-08-06 09:19:18 +0200 | [diff] [blame] | 228 | return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET, |
Grygorii Strashko | bf264cd | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 229 | &size, NULL, TDX_CFG_BLOCK_MAX_SIZE, |
| 230 | config_block); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 231 | } |
| 232 | |
| 233 | static int write_tdx_cfg_block_to_nand(unsigned char *config_block) |
| 234 | { |
| 235 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 236 | |
| 237 | /* Write production parameter config block to NAND page */ |
Grygorii Strashko | bf264cd | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 238 | return nand_write_skip_bad(get_nand_dev_by_index(0), |
| 239 | CONFIG_TDX_CFG_BLOCK_OFFSET, |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 240 | &size, NULL, TDX_CFG_BLOCK_MAX_SIZE, |
| 241 | config_block, WITH_WR_VERIFY); |
| 242 | } |
| 243 | #endif |
| 244 | |
| 245 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR |
| 246 | static int read_tdx_cfg_block_from_nor(unsigned char *config_block) |
| 247 | { |
| 248 | /* Read production parameter config block from NOR flash */ |
| 249 | memcpy(config_block, (void *)CONFIG_TDX_CFG_BLOCK_OFFSET, |
| 250 | TDX_CFG_BLOCK_MAX_SIZE); |
| 251 | return 0; |
| 252 | } |
| 253 | |
| 254 | static int write_tdx_cfg_block_to_nor(unsigned char *config_block) |
| 255 | { |
| 256 | /* Write production parameter config block to NOR flash */ |
| 257 | return flash_write((void *)config_block, CONFIG_TDX_CFG_BLOCK_OFFSET, |
| 258 | TDX_CFG_BLOCK_MAX_SIZE); |
| 259 | } |
| 260 | #endif |
| 261 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 262 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM |
| 263 | static int read_tdx_cfg_block_from_eeprom(unsigned char *config_block) |
| 264 | { |
| 265 | return read_tdx_eeprom_data(TDX_EEPROM_ID_MODULE, 0x0, config_block, |
| 266 | TDX_CFG_BLOCK_MAX_SIZE); |
| 267 | } |
| 268 | |
| 269 | static int write_tdx_cfg_block_to_eeprom(unsigned char *config_block) |
| 270 | { |
| 271 | return write_tdx_eeprom_data(TDX_EEPROM_ID_MODULE, 0x0, config_block, |
| 272 | TDX_CFG_BLOCK_MAX_SIZE); |
| 273 | } |
| 274 | #endif |
| 275 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 276 | int read_tdx_cfg_block(void) |
| 277 | { |
| 278 | int ret = 0; |
| 279 | u8 *config_block = NULL; |
| 280 | struct toradex_tag *tag; |
| 281 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 282 | int offset; |
| 283 | |
| 284 | /* Allocate RAM area for config block */ |
| 285 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 286 | if (!config_block) { |
| 287 | printf("Not enough malloc space available!\n"); |
| 288 | return -ENOMEM; |
| 289 | } |
| 290 | |
| 291 | memset(config_block, 0, size); |
| 292 | |
| 293 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 294 | ret = tdx_cfg_block_mmc_storage(config_block, 0); |
| 295 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 296 | ret = read_tdx_cfg_block_from_nand(config_block); |
| 297 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 298 | ret = read_tdx_cfg_block_from_nor(config_block); |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 299 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM) |
| 300 | ret = read_tdx_cfg_block_from_eeprom(config_block); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 301 | #else |
| 302 | ret = -EINVAL; |
| 303 | #endif |
| 304 | if (ret) |
| 305 | goto out; |
| 306 | |
| 307 | /* Expect a valid tag first */ |
| 308 | tag = (struct toradex_tag *)config_block; |
| 309 | if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) { |
| 310 | valid_cfgblock = false; |
| 311 | ret = -EINVAL; |
| 312 | goto out; |
| 313 | } |
| 314 | valid_cfgblock = true; |
| 315 | offset = 4; |
| 316 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 317 | /* |
| 318 | * check if there is enough space for storing tag and value of the |
| 319 | * biggest element |
| 320 | */ |
| 321 | while (offset + sizeof(struct toradex_tag) + |
| 322 | sizeof(struct toradex_hw) < TDX_CFG_BLOCK_MAX_SIZE) { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 323 | tag = (struct toradex_tag *)(config_block + offset); |
| 324 | offset += 4; |
| 325 | if (tag->id == TAG_INVALID) |
| 326 | break; |
| 327 | |
| 328 | if (tag->flags == TAG_FLAG_VALID) { |
| 329 | switch (tag->id) { |
| 330 | case TAG_MAC: |
| 331 | memcpy(&tdx_eth_addr, config_block + offset, |
| 332 | 6); |
| 333 | |
| 334 | /* NIC part of MAC address is serial number */ |
| 335 | tdx_serial = ntohl(tdx_eth_addr.nic) >> 8; |
| 336 | break; |
| 337 | case TAG_HW: |
| 338 | memcpy(&tdx_hw_tag, config_block + offset, 8); |
| 339 | break; |
| 340 | } |
| 341 | } |
| 342 | |
| 343 | /* Get to next tag according to current tags length */ |
| 344 | offset += tag->len * 4; |
| 345 | } |
| 346 | |
| 347 | /* Cap product id to avoid issues with a yet unknown one */ |
Marcel Ziswiler | ccdd371 | 2019-03-25 17:18:29 +0100 | [diff] [blame] | 348 | if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) / |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 349 | sizeof(toradex_modules[0]))) |
| 350 | tdx_hw_tag.prodid = 0; |
| 351 | |
| 352 | out: |
| 353 | free(config_block); |
| 354 | return ret; |
| 355 | } |
| 356 | |
| 357 | static int get_cfgblock_interactive(void) |
| 358 | { |
| 359 | char message[CONFIG_SYS_CBSIZE]; |
| 360 | char *soc; |
| 361 | char it = 'n'; |
Marcel Ziswiler | d1aa1444 | 2019-07-12 12:35:06 +0200 | [diff] [blame] | 362 | char wb = 'n'; |
Marcel Ziswiler | c0c3978 | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 363 | int len = 0; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 364 | |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 365 | /* Unknown module by default */ |
| 366 | tdx_hw_tag.prodid = 0; |
| 367 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 368 | if (cpu_is_pxa27x()) |
| 369 | sprintf(message, "Is the module the 312 MHz version? [y/N] "); |
Marcel Ziswiler | c0c3978 | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 370 | else |
Denys Drozdov | ab98ebf | 2021-10-06 18:55:33 +0200 | [diff] [blame^] | 371 | sprintf(message, "Is the module an IT version? [y/N] "); |
| 372 | |
| 373 | len = cli_readline(message); |
| 374 | it = console_buffer[0]; |
Marcel Ziswiler | c0c3978 | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 375 | |
Marcel Ziswiler | d1aa1444 | 2019-07-12 12:35:06 +0200 | [diff] [blame] | 376 | #if defined(CONFIG_TARGET_APALIS_IMX8) || \ |
Marcel Ziswiler | 842ddf8 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 377 | defined(CONFIG_TARGET_APALIS_IMX8X) || \ |
Marcel Ziswiler | d1aa1444 | 2019-07-12 12:35:06 +0200 | [diff] [blame] | 378 | defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \ |
Marcel Ziswiler | a5b5ad4 | 2020-10-28 11:58:08 +0200 | [diff] [blame] | 379 | defined(CONFIG_TARGET_COLIBRI_IMX8X) || \ |
| 380 | defined(CONFIG_TARGET_VERDIN_IMX8MM) || \ |
| 381 | defined(CONFIG_TARGET_VERDIN_IMX8MP) |
Marcel Ziswiler | d1aa1444 | 2019-07-12 12:35:06 +0200 | [diff] [blame] | 382 | sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] "); |
| 383 | len = cli_readline(message); |
| 384 | wb = console_buffer[0]; |
| 385 | #endif |
| 386 | |
Simon Glass | 00caae6 | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 387 | soc = env_get("soc"); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 388 | if (!strcmp("mx6", soc)) { |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 389 | #ifdef CONFIG_TARGET_APALIS_IMX6 |
| 390 | if (it == 'y' || it == 'Y') { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 391 | if (is_cpu_type(MXC_CPU_MX6Q)) |
| 392 | tdx_hw_tag.prodid = APALIS_IMX6Q_IT; |
| 393 | else |
| 394 | tdx_hw_tag.prodid = APALIS_IMX6D_IT; |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 395 | } else { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 396 | if (is_cpu_type(MXC_CPU_MX6Q)) |
| 397 | tdx_hw_tag.prodid = APALIS_IMX6Q; |
| 398 | else |
| 399 | tdx_hw_tag.prodid = APALIS_IMX6D; |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 400 | } |
| 401 | #elif CONFIG_TARGET_COLIBRI_IMX6 |
| 402 | if (it == 'y' || it == 'Y') { |
| 403 | if (is_cpu_type(MXC_CPU_MX6DL)) |
| 404 | tdx_hw_tag.prodid = COLIBRI_IMX6DL_IT; |
| 405 | else if (is_cpu_type(MXC_CPU_MX6SOLO)) |
| 406 | tdx_hw_tag.prodid = COLIBRI_IMX6S_IT; |
| 407 | } else { |
| 408 | if (is_cpu_type(MXC_CPU_MX6DL)) |
| 409 | tdx_hw_tag.prodid = COLIBRI_IMX6DL; |
| 410 | else if (is_cpu_type(MXC_CPU_MX6SOLO)) |
| 411 | tdx_hw_tag.prodid = COLIBRI_IMX6S; |
| 412 | } |
| 413 | #elif CONFIG_TARGET_COLIBRI_IMX6ULL |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 414 | if (it == 'y' || it == 'Y') { |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 415 | if (wb == 'y' || wb == 'Y') |
| 416 | tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT; |
| 417 | else |
| 418 | tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT; |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 419 | } else { |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 420 | if (wb == 'y' || wb == 'Y') |
| 421 | tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT; |
| 422 | else |
| 423 | tdx_hw_tag.prodid = COLIBRI_IMX6ULL; |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 424 | } |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 425 | #endif |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 426 | } else if (!strcmp("imx7d", soc)) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 427 | tdx_hw_tag.prodid = COLIBRI_IMX7D; |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 428 | else if (!strcmp("imx7s", soc)) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 429 | tdx_hw_tag.prodid = COLIBRI_IMX7S; |
Marcel Ziswiler | 9d63c7d | 2019-07-12 12:35:08 +0200 | [diff] [blame] | 430 | else if (is_cpu_type(MXC_CPU_IMX8QM)) { |
| 431 | if (it == 'y' || it == 'Y') { |
| 432 | if (wb == 'y' || wb == 'Y') |
| 433 | tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; |
| 434 | else |
| 435 | tdx_hw_tag.prodid = APALIS_IMX8QM_IT; |
| 436 | } else { |
| 437 | if (wb == 'y' || wb == 'Y') |
| 438 | tdx_hw_tag.prodid = APALIS_IMX8QP_WIFI_BT; |
| 439 | else |
| 440 | tdx_hw_tag.prodid = APALIS_IMX8QP; |
| 441 | } |
| 442 | } else if (is_cpu_type(MXC_CPU_IMX8QXP)) { |
Marcel Ziswiler | 842ddf8 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 443 | #ifdef CONFIG_TARGET_APALIS_IMX8X |
| 444 | if (it == 'y' || it == 'Y' || wb == 'y' || wb == 'Y') { |
| 445 | tdx_hw_tag.prodid = APALIS_IMX8QXP_WIFI_BT_IT; |
| 446 | } else { |
| 447 | if (gd->ram_size == 0x40000000) |
| 448 | tdx_hw_tag.prodid = APALIS_IMX8DXP; |
| 449 | else |
| 450 | tdx_hw_tag.prodid = APALIS_IMX8QXP; |
| 451 | } |
| 452 | #elif CONFIG_TARGET_COLIBRI_IMX8X |
Marcel Ziswiler | 6c297ee | 2019-07-12 12:35:07 +0200 | [diff] [blame] | 453 | if (it == 'y' || it == 'Y') { |
| 454 | if (wb == 'y' || wb == 'Y') |
| 455 | tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT; |
| 456 | else |
| 457 | tdx_hw_tag.prodid = COLIBRI_IMX8QXP_IT; |
| 458 | } else { |
| 459 | if (wb == 'y' || wb == 'Y') |
| 460 | tdx_hw_tag.prodid = COLIBRI_IMX8DX_WIFI_BT; |
| 461 | else |
| 462 | tdx_hw_tag.prodid = COLIBRI_IMX8DX; |
| 463 | } |
Marcel Ziswiler | 842ddf8 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 464 | #endif |
Marcel Ziswiler | 2a1a255 | 2020-10-28 11:58:15 +0200 | [diff] [blame] | 465 | } else if (is_cpu_type(MXC_CPU_IMX8MMDL)) { |
| 466 | if (wb == 'y' || wb == 'Y') |
| 467 | tdx_hw_tag.prodid = VERDIN_IMX8MMDL_WIFI_BT_IT; |
| 468 | else |
| 469 | tdx_hw_tag.prodid = VERDIN_IMX8MMDL; |
Marcel Ziswiler | a5b5ad4 | 2020-10-28 11:58:08 +0200 | [diff] [blame] | 470 | } else if (is_cpu_type(MXC_CPU_IMX8MM)) { |
Marcel Ziswiler | 2a1a255 | 2020-10-28 11:58:15 +0200 | [diff] [blame] | 471 | if (wb == 'y' || wb == 'Y') |
| 472 | tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT; |
| 473 | else |
| 474 | tdx_hw_tag.prodid = VERDIN_IMX8MMQ_IT; |
Marcel Ziswiler | a5b5ad4 | 2020-10-28 11:58:08 +0200 | [diff] [blame] | 475 | } else if (is_cpu_type(MXC_CPU_IMX8MN)) { |
| 476 | tdx_hw_tag.prodid = VERDIN_IMX8MNQ_WIFI_BT; |
| 477 | } else if (is_cpu_type(MXC_CPU_IMX8MP)) { |
| 478 | if (wb == 'y' || wb == 'Y') |
| 479 | tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT; |
| 480 | else |
| 481 | tdx_hw_tag.prodid = VERDIN_IMX8MPQ; |
Marcel Ziswiler | 6c297ee | 2019-07-12 12:35:07 +0200 | [diff] [blame] | 482 | } else if (!strcmp("tegra20", soc)) { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 483 | if (it == 'y' || it == 'Y') |
| 484 | if (gd->ram_size == 0x10000000) |
| 485 | tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT; |
| 486 | else |
| 487 | tdx_hw_tag.prodid = COLIBRI_T20_512MB_IT; |
| 488 | else |
| 489 | if (gd->ram_size == 0x10000000) |
| 490 | tdx_hw_tag.prodid = COLIBRI_T20_256MB; |
| 491 | else |
| 492 | tdx_hw_tag.prodid = COLIBRI_T20_512MB; |
| 493 | } else if (cpu_is_pxa27x()) { |
| 494 | if (it == 'y' || it == 'Y') |
| 495 | tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ; |
| 496 | else |
| 497 | tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ; |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 498 | } |
Tom Rini | 5f588f8 | 2021-08-30 09:16:32 -0400 | [diff] [blame] | 499 | #if defined(CONFIG_TARGET_APALIS_T30) || defined(CONFIG_TARGET_COLIBRI_T30) |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 500 | else if (!strcmp("tegra30", soc)) { |
Tom Rini | 5f588f8 | 2021-08-30 09:16:32 -0400 | [diff] [blame] | 501 | #ifdef CONFIG_TARGET_APALIS_T30 |
| 502 | if (it == 'y' || it == 'Y') |
| 503 | tdx_hw_tag.prodid = APALIS_T30_IT; |
| 504 | else |
| 505 | if (gd->ram_size == 0x40000000) |
| 506 | tdx_hw_tag.prodid = APALIS_T30_1GB; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 507 | else |
Tom Rini | 5f588f8 | 2021-08-30 09:16:32 -0400 | [diff] [blame] | 508 | tdx_hw_tag.prodid = APALIS_T30_2GB; |
| 509 | #else |
| 510 | if (it == 'y' || it == 'Y') |
| 511 | tdx_hw_tag.prodid = COLIBRI_T30_IT; |
| 512 | else |
| 513 | tdx_hw_tag.prodid = COLIBRI_T30; |
| 514 | #endif |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 515 | } |
Tom Rini | 5f588f8 | 2021-08-30 09:16:32 -0400 | [diff] [blame] | 516 | #endif /* CONFIG_TARGET_APALIS_T30 || CONFIG_TARGET_COLIBRI_T30 */ |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 517 | else if (!strcmp("tegra124", soc)) { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 518 | tdx_hw_tag.prodid = APALIS_TK1_2GB; |
| 519 | } else if (!strcmp("vf500", soc)) { |
| 520 | if (it == 'y' || it == 'Y') |
| 521 | tdx_hw_tag.prodid = COLIBRI_VF50_IT; |
| 522 | else |
| 523 | tdx_hw_tag.prodid = COLIBRI_VF50; |
| 524 | } else if (!strcmp("vf610", soc)) { |
| 525 | if (it == 'y' || it == 'Y') |
| 526 | tdx_hw_tag.prodid = COLIBRI_VF61_IT; |
| 527 | else |
| 528 | tdx_hw_tag.prodid = COLIBRI_VF61; |
Stefan Agner | 89315f3 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 529 | } |
| 530 | |
| 531 | if (!tdx_hw_tag.prodid) { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 532 | printf("Module type not detectable due to unknown SoC\n"); |
| 533 | return -1; |
| 534 | } |
| 535 | |
| 536 | while (len < 4) { |
| 537 | sprintf(message, "Enter the module version (e.g. V1.1B): V"); |
| 538 | len = cli_readline(message); |
| 539 | } |
| 540 | |
| 541 | tdx_hw_tag.ver_major = console_buffer[0] - '0'; |
| 542 | tdx_hw_tag.ver_minor = console_buffer[2] - '0'; |
| 543 | tdx_hw_tag.ver_assembly = console_buffer[3] - 'A'; |
| 544 | |
Gerard Salvatella | 08f8055 | 2019-04-09 17:24:07 +0200 | [diff] [blame] | 545 | if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 546 | tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ - |
| 547 | COLIBRI_PXA270_V1_312MHZ); |
| 548 | |
| 549 | while (len < 8) { |
| 550 | sprintf(message, "Enter module serial number: "); |
| 551 | len = cli_readline(message); |
| 552 | } |
| 553 | |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 554 | tdx_serial = dectoul(console_buffer, NULL); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 555 | |
| 556 | return 0; |
| 557 | } |
| 558 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 559 | static int get_cfgblock_barcode(char *barcode, struct toradex_hw *tag, |
| 560 | u32 *serial) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 561 | { |
Denys Drozdov | fd90aca | 2021-04-07 15:28:24 +0300 | [diff] [blame] | 562 | char revision[3] = {barcode[6], barcode[7], '\0'}; |
| 563 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 564 | if (strlen(barcode) < 16) { |
| 565 | printf("Argument too short, barcode is 16 chars long\n"); |
| 566 | return -1; |
| 567 | } |
| 568 | |
| 569 | /* Get hardware information from the first 8 digits */ |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 570 | tag->ver_major = barcode[4] - '0'; |
| 571 | tag->ver_minor = barcode[5] - '0'; |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 572 | tag->ver_assembly = dectoul(revision, NULL); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 573 | |
| 574 | barcode[4] = '\0'; |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 575 | tag->prodid = dectoul(barcode, NULL); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 576 | |
| 577 | /* Parse second part of the barcode (serial number */ |
| 578 | barcode += 8; |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 579 | *serial = dectoul(barcode, NULL); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 584 | static int write_tag(u8 *config_block, int *offset, int tag_id, |
| 585 | u8 *tag_data, size_t tag_data_size) |
| 586 | { |
| 587 | struct toradex_tag *tag; |
| 588 | |
| 589 | if (!offset || !config_block) |
| 590 | return -EINVAL; |
| 591 | |
| 592 | tag = (struct toradex_tag *)(config_block + *offset); |
| 593 | tag->id = tag_id; |
| 594 | tag->flags = TAG_FLAG_VALID; |
| 595 | /* len is provided as number of 32bit values after the tag */ |
| 596 | tag->len = (tag_data_size + sizeof(u32) - 1) / sizeof(u32); |
| 597 | *offset += sizeof(struct toradex_tag); |
| 598 | if (tag_data && tag_data_size) { |
| 599 | memcpy(config_block + *offset, tag_data, |
| 600 | tag_data_size); |
| 601 | *offset += tag_data_size; |
| 602 | } |
| 603 | |
| 604 | return 0; |
| 605 | } |
| 606 | |
| 607 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 608 | int read_tdx_cfg_block_carrier(void) |
| 609 | { |
| 610 | int ret = 0; |
| 611 | u8 *config_block = NULL; |
| 612 | struct toradex_tag *tag; |
| 613 | size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE; |
| 614 | int offset; |
| 615 | |
| 616 | /* Allocate RAM area for carrier config block */ |
| 617 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 618 | if (!config_block) { |
| 619 | printf("Not enough malloc space available!\n"); |
| 620 | return -ENOMEM; |
| 621 | } |
| 622 | |
| 623 | memset(config_block, 0, size); |
| 624 | |
| 625 | ret = read_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block, |
| 626 | size); |
| 627 | if (ret) |
| 628 | return ret; |
| 629 | |
| 630 | /* Expect a valid tag first */ |
| 631 | tag = (struct toradex_tag *)config_block; |
| 632 | if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) { |
| 633 | valid_cfgblock_carrier = false; |
| 634 | ret = -EINVAL; |
| 635 | goto out; |
| 636 | } |
| 637 | valid_cfgblock_carrier = true; |
| 638 | offset = 4; |
| 639 | |
| 640 | while (offset + sizeof(struct toradex_tag) + |
| 641 | sizeof(struct toradex_hw) < TDX_CFG_BLOCK_MAX_SIZE) { |
| 642 | tag = (struct toradex_tag *)(config_block + offset); |
| 643 | offset += 4; |
| 644 | if (tag->id == TAG_INVALID) |
| 645 | break; |
| 646 | |
| 647 | if (tag->flags == TAG_FLAG_VALID) { |
| 648 | switch (tag->id) { |
| 649 | case TAG_CAR_SERIAL: |
| 650 | memcpy(&tdx_car_serial, config_block + offset, |
| 651 | sizeof(tdx_car_serial)); |
| 652 | break; |
| 653 | case TAG_HW: |
| 654 | memcpy(&tdx_car_hw_tag, config_block + |
| 655 | offset, 8); |
| 656 | break; |
| 657 | } |
| 658 | } |
| 659 | |
| 660 | /* Get to next tag according to current tags length */ |
| 661 | offset += tag->len * 4; |
| 662 | } |
| 663 | out: |
| 664 | free(config_block); |
| 665 | return ret; |
| 666 | } |
| 667 | |
Igor Opaniuk | db4ab6d | 2020-07-15 13:30:56 +0300 | [diff] [blame] | 668 | int check_pid8_sanity(char *pid8) |
| 669 | { |
| 670 | char s_carrierid_verdin_dev[5]; |
| 671 | char s_carrierid_dahlia[5]; |
| 672 | |
| 673 | sprintf(s_carrierid_verdin_dev, "0%d", VERDIN_DEVELOPMENT_BOARD); |
| 674 | sprintf(s_carrierid_dahlia, "0%d", DAHLIA); |
| 675 | |
| 676 | /* sane value check, first 4 chars which represent carrier id */ |
| 677 | if (!strncmp(pid8, s_carrierid_verdin_dev, 4)) |
| 678 | return 0; |
| 679 | |
| 680 | if (!strncmp(pid8, s_carrierid_dahlia, 4)) |
| 681 | return 0; |
| 682 | |
| 683 | return -EINVAL; |
| 684 | } |
| 685 | |
| 686 | int try_migrate_tdx_cfg_block_carrier(void) |
| 687 | { |
| 688 | char pid8[8]; |
| 689 | int offset = 0; |
| 690 | int ret = CMD_RET_SUCCESS; |
| 691 | size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE; |
| 692 | u8 *config_block; |
| 693 | |
| 694 | memset(pid8, 0x0, 8); |
| 695 | ret = read_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, (u8 *)pid8, 8); |
| 696 | if (ret) |
| 697 | return ret; |
| 698 | |
| 699 | if (check_pid8_sanity(pid8)) |
| 700 | return -EINVAL; |
| 701 | |
| 702 | /* Allocate RAM area for config block */ |
| 703 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 704 | if (!config_block) { |
| 705 | printf("Not enough malloc space available!\n"); |
| 706 | return CMD_RET_FAILURE; |
| 707 | } |
| 708 | |
| 709 | memset(config_block, 0xff, size); |
| 710 | /* we try parse PID8 concatenating zeroed serial number */ |
| 711 | tdx_car_hw_tag.ver_major = pid8[4] - '0'; |
| 712 | tdx_car_hw_tag.ver_minor = pid8[5] - '0'; |
| 713 | tdx_car_hw_tag.ver_assembly = pid8[7] - '0'; |
| 714 | |
| 715 | pid8[4] = '\0'; |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 716 | tdx_car_hw_tag.prodid = dectoul(pid8, NULL); |
Igor Opaniuk | db4ab6d | 2020-07-15 13:30:56 +0300 | [diff] [blame] | 717 | |
| 718 | /* Valid Tag */ |
| 719 | write_tag(config_block, &offset, TAG_VALID, NULL, 0); |
| 720 | |
| 721 | /* Product Tag */ |
| 722 | write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_car_hw_tag, |
| 723 | sizeof(tdx_car_hw_tag)); |
| 724 | |
| 725 | /* Serial Tag */ |
| 726 | write_tag(config_block, &offset, TAG_CAR_SERIAL, (u8 *)&tdx_car_serial, |
| 727 | sizeof(tdx_car_serial)); |
| 728 | |
| 729 | memset(config_block + offset, 0, 32 - offset); |
| 730 | ret = write_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block, |
| 731 | size); |
| 732 | if (ret) { |
| 733 | printf("Failed to write Toradex Extra config block: %d\n", |
| 734 | ret); |
| 735 | ret = CMD_RET_FAILURE; |
| 736 | goto out; |
| 737 | } |
| 738 | |
| 739 | printf("Successfully migrated to Toradex Config Block from PID8\n"); |
| 740 | |
| 741 | out: |
| 742 | free(config_block); |
| 743 | return ret; |
| 744 | } |
| 745 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 746 | static int get_cfgblock_carrier_interactive(void) |
| 747 | { |
| 748 | char message[CONFIG_SYS_CBSIZE]; |
| 749 | int len; |
| 750 | |
| 751 | printf("Supported carrier boards:\n"); |
| 752 | printf("CARRIER BOARD NAME\t\t [ID]\n"); |
| 753 | for (int i = 0; i < sizeof(toradex_carrier_boards) / |
| 754 | sizeof(toradex_carrier_boards[0]); i++) |
| 755 | if (toradex_carrier_boards[i]) |
| 756 | printf("%s \t\t [%d]\n", toradex_carrier_boards[i], i); |
| 757 | |
| 758 | sprintf(message, "Choose your carrier board (provide ID): "); |
| 759 | len = cli_readline(message); |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 760 | tdx_car_hw_tag.prodid = dectoul(console_buffer, NULL); |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 761 | |
| 762 | do { |
| 763 | sprintf(message, "Enter carrier board version (e.g. V1.1B): V"); |
| 764 | len = cli_readline(message); |
| 765 | } while (len < 4); |
| 766 | |
| 767 | tdx_car_hw_tag.ver_major = console_buffer[0] - '0'; |
| 768 | tdx_car_hw_tag.ver_minor = console_buffer[2] - '0'; |
| 769 | tdx_car_hw_tag.ver_assembly = console_buffer[3] - 'A'; |
| 770 | |
| 771 | while (len < 8) { |
| 772 | sprintf(message, "Enter carrier board serial number: "); |
| 773 | len = cli_readline(message); |
| 774 | } |
| 775 | |
Simon Glass | 0b1284e | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 776 | tdx_car_serial = dectoul(console_buffer, NULL); |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 777 | |
| 778 | return 0; |
| 779 | } |
| 780 | |
| 781 | static int do_cfgblock_carrier_create(struct cmd_tbl *cmdtp, int flag, int argc, |
| 782 | char * const argv[]) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 783 | { |
| 784 | u8 *config_block; |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 785 | size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 786 | int offset = 0; |
| 787 | int ret = CMD_RET_SUCCESS; |
| 788 | int err; |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 789 | int force_overwrite = 0; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 790 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 791 | if (argc >= 3) { |
| 792 | if (argv[2][0] == '-' && argv[2][1] == 'y') |
| 793 | force_overwrite = 1; |
| 794 | } |
| 795 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 796 | /* Allocate RAM area for config block */ |
| 797 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 798 | if (!config_block) { |
| 799 | printf("Not enough malloc space available!\n"); |
| 800 | return CMD_RET_FAILURE; |
| 801 | } |
| 802 | |
| 803 | memset(config_block, 0xff, size); |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 804 | read_tdx_cfg_block_carrier(); |
| 805 | if (valid_cfgblock_carrier && !force_overwrite) { |
| 806 | char message[CONFIG_SYS_CBSIZE]; |
| 807 | |
| 808 | sprintf(message, "A valid Toradex Carrier config block is present, still recreate? [y/N] "); |
| 809 | |
| 810 | if (!cli_readline(message)) |
| 811 | goto out; |
| 812 | |
| 813 | if (console_buffer[0] != 'y' && |
| 814 | console_buffer[0] != 'Y') |
| 815 | goto out; |
| 816 | } |
| 817 | |
| 818 | if (argc < 3 || (force_overwrite && argc < 4)) { |
| 819 | err = get_cfgblock_carrier_interactive(); |
| 820 | } else { |
| 821 | if (force_overwrite) |
| 822 | err = get_cfgblock_barcode(argv[3], &tdx_car_hw_tag, |
| 823 | &tdx_car_serial); |
| 824 | else |
| 825 | err = get_cfgblock_barcode(argv[2], &tdx_car_hw_tag, |
| 826 | &tdx_car_serial); |
| 827 | } |
| 828 | |
| 829 | if (err) { |
| 830 | ret = CMD_RET_FAILURE; |
| 831 | goto out; |
| 832 | } |
| 833 | |
| 834 | /* Valid Tag */ |
| 835 | write_tag(config_block, &offset, TAG_VALID, NULL, 0); |
| 836 | |
| 837 | /* Product Tag */ |
| 838 | write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_car_hw_tag, |
| 839 | sizeof(tdx_car_hw_tag)); |
| 840 | |
| 841 | /* Serial Tag */ |
| 842 | write_tag(config_block, &offset, TAG_CAR_SERIAL, (u8 *)&tdx_car_serial, |
| 843 | sizeof(tdx_car_serial)); |
| 844 | |
| 845 | memset(config_block + offset, 0, 32 - offset); |
| 846 | err = write_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block, |
| 847 | size); |
| 848 | if (err) { |
| 849 | printf("Failed to write Toradex Extra config block: %d\n", |
| 850 | ret); |
| 851 | ret = CMD_RET_FAILURE; |
| 852 | goto out; |
| 853 | } |
| 854 | |
| 855 | printf("Toradex Extra config block successfully written\n"); |
| 856 | |
| 857 | out: |
| 858 | free(config_block); |
| 859 | return ret; |
| 860 | } |
| 861 | |
| 862 | #endif /* CONFIG_TDX_CFG_BLOCK_EXTRA */ |
| 863 | |
| 864 | static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc, |
| 865 | char * const argv[]) |
| 866 | { |
| 867 | u8 *config_block; |
| 868 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 869 | int offset = 0; |
| 870 | int ret = CMD_RET_SUCCESS; |
| 871 | int err; |
| 872 | int force_overwrite = 0; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 873 | |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 874 | if (argc >= 3) { |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 875 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 876 | if (!strcmp(argv[2], "carrier")) |
| 877 | return do_cfgblock_carrier_create(cmdtp, flag, |
| 878 | --argc, ++argv); |
| 879 | #endif /* CONFIG_TDX_CFG_BLOCK_EXTRA */ |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 880 | if (argv[2][0] == '-' && argv[2][1] == 'y') |
| 881 | force_overwrite = 1; |
| 882 | } |
| 883 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 884 | /* Allocate RAM area for config block */ |
| 885 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 886 | if (!config_block) { |
| 887 | printf("Not enough malloc space available!\n"); |
| 888 | return CMD_RET_FAILURE; |
| 889 | } |
| 890 | |
| 891 | memset(config_block, 0xff, size); |
| 892 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 893 | read_tdx_cfg_block(); |
| 894 | if (valid_cfgblock) { |
| 895 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 896 | /* |
| 897 | * On NAND devices, recreation is only allowed if the page is |
| 898 | * empty (config block invalid...) |
| 899 | */ |
Marcel Ziswiler | 9d364eb | 2019-07-12 12:35:09 +0200 | [diff] [blame] | 900 | printf("NAND erase block %d need to be erased before creating a Toradex config block\n", |
Grygorii Strashko | bf264cd | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 901 | CONFIG_TDX_CFG_BLOCK_OFFSET / |
| 902 | get_nand_dev_by_index(0)->erasesize); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 903 | goto out; |
| 904 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 905 | /* |
| 906 | * On NOR devices, recreation is only allowed if the sector is |
| 907 | * empty and write protection is off (config block invalid...) |
| 908 | */ |
Marcel Ziswiler | 9d364eb | 2019-07-12 12:35:09 +0200 | [diff] [blame] | 909 | printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n", |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 910 | CONFIG_TDX_CFG_BLOCK_OFFSET); |
| 911 | goto out; |
| 912 | #else |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 913 | if (!force_overwrite) { |
| 914 | char message[CONFIG_SYS_CBSIZE]; |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 915 | |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 916 | sprintf(message, |
| 917 | "A valid Toradex config block is present, still recreate? [y/N] "); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 918 | |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 919 | if (!cli_readline(message)) |
| 920 | goto out; |
| 921 | |
| 922 | if (console_buffer[0] != 'y' && |
| 923 | console_buffer[0] != 'Y') |
| 924 | goto out; |
| 925 | } |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 926 | #endif |
| 927 | } |
| 928 | |
| 929 | /* Parse new Toradex config block data... */ |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 930 | if (argc < 3 || (force_overwrite && argc < 4)) { |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 931 | err = get_cfgblock_interactive(); |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 932 | } else { |
| 933 | if (force_overwrite) |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 934 | err = get_cfgblock_barcode(argv[3], &tdx_hw_tag, |
| 935 | &tdx_serial); |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 936 | else |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 937 | err = get_cfgblock_barcode(argv[2], &tdx_hw_tag, |
| 938 | &tdx_serial); |
Dominik Sliwa | 587b13c | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 939 | } |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 940 | if (err) { |
| 941 | ret = CMD_RET_FAILURE; |
| 942 | goto out; |
| 943 | } |
| 944 | |
| 945 | /* Convert serial number to MAC address (the storage format) */ |
| 946 | tdx_eth_addr.oui = htonl(0x00142dUL << 8); |
| 947 | tdx_eth_addr.nic = htonl(tdx_serial << 8); |
| 948 | |
| 949 | /* Valid Tag */ |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 950 | write_tag(config_block, &offset, TAG_VALID, NULL, 0); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 951 | |
| 952 | /* Product Tag */ |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 953 | write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_hw_tag, |
| 954 | sizeof(tdx_hw_tag)); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 955 | |
| 956 | /* MAC Tag */ |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 957 | write_tag(config_block, &offset, TAG_MAC, (u8 *)&tdx_eth_addr, |
| 958 | sizeof(tdx_eth_addr)); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 959 | |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 960 | memset(config_block + offset, 0, 32 - offset); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 961 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 962 | err = tdx_cfg_block_mmc_storage(config_block, 1); |
| 963 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 964 | err = write_tdx_cfg_block_to_nand(config_block); |
| 965 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 966 | err = write_tdx_cfg_block_to_nor(config_block); |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 967 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM) |
| 968 | err = write_tdx_cfg_block_to_eeprom(config_block); |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 969 | #else |
| 970 | err = -EINVAL; |
| 971 | #endif |
| 972 | if (err) { |
| 973 | printf("Failed to write Toradex config block: %d\n", ret); |
| 974 | ret = CMD_RET_FAILURE; |
| 975 | goto out; |
| 976 | } |
| 977 | |
| 978 | printf("Toradex config block successfully written\n"); |
| 979 | |
| 980 | out: |
| 981 | free(config_block); |
| 982 | return ret; |
| 983 | } |
| 984 | |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 985 | static int do_cfgblock(struct cmd_tbl *cmdtp, int flag, int argc, |
| 986 | char *const argv[]) |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 987 | { |
| 988 | int ret; |
| 989 | |
| 990 | if (argc < 2) |
| 991 | return CMD_RET_USAGE; |
| 992 | |
| 993 | if (!strcmp(argv[1], "create")) { |
| 994 | return do_cfgblock_create(cmdtp, flag, argc, argv); |
| 995 | } else if (!strcmp(argv[1], "reload")) { |
| 996 | ret = read_tdx_cfg_block(); |
| 997 | if (ret) { |
| 998 | printf("Failed to reload Toradex config block: %d\n", |
| 999 | ret); |
| 1000 | return CMD_RET_FAILURE; |
| 1001 | } |
| 1002 | return CMD_RET_SUCCESS; |
| 1003 | } |
| 1004 | |
| 1005 | return CMD_RET_USAGE; |
| 1006 | } |
| 1007 | |
Igor Opaniuk | 0c6b558 | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 1008 | U_BOOT_CMD( |
| 1009 | cfgblock, 5, 0, do_cfgblock, |
| 1010 | "Toradex config block handling commands", |
| 1011 | "create [-y] [barcode] - (Re-)create Toradex config block\n" |
| 1012 | "create carrier [-y] [barcode] - (Re-)create Toradex Carrier config block\n" |
| 1013 | "cfgblock reload - Reload Toradex config block from flash" |
Marcel Ziswiler | a2777ec | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 1014 | ); |