blob: 4566c091b7729352debdd1ecf313d7206597fbc7 [file] [log] [blame]
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +02001/*
2 * (C) Copyright 2016
3 * Mario Six, Guntermann & Drunck GmbH, six@gdsys.de
4 *
5 * based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
6 *
7 * Copyright 2010 eXMeritus, A Boeing Company
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#include <common.h>
13#include <dm.h>
14#include <asm/gpio.h>
15#include <mapmem.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19struct ccsr_gpio {
20 u32 gpdir;
21 u32 gpodr;
22 u32 gpdat;
23 u32 gpier;
24 u32 gpimr;
25 u32 gpicr;
26};
27
28struct mpc85xx_gpio_data {
29 /* The bank's register base in memory */
30 struct ccsr_gpio __iomem *base;
31 /* The address of the registers; used to identify the bank */
32 ulong addr;
33 /* The GPIO count of the bank */
34 uint gpio_count;
35 /* The GPDAT register cannot be used to determine the value of output
36 * pins on MPC8572/MPC8536, so we shadow it and use the shadowed value
Mario Sixaadc5e62018-01-15 11:07:46 +010037 * for output pins
38 */
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020039 u32 dat_shadow;
40};
41
Mario Sixaadc5e62018-01-15 11:07:46 +010042inline u32 gpio_mask(uint gpio)
43{
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020044 return (1U << (31 - (gpio)));
45}
46
47static inline u32 mpc85xx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
48{
49 return in_be32(&base->gpdat) & mask;
50}
51
52static inline u32 mpc85xx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
53{
54 return in_be32(&base->gpdir) & mask;
55}
56
57static inline void mpc85xx_gpio_set_in(struct ccsr_gpio *base, u32 gpios)
58{
59 clrbits_be32(&base->gpdat, gpios);
60 /* GPDIR register 0 -> input */
61 clrbits_be32(&base->gpdir, gpios);
62}
63
64static inline void mpc85xx_gpio_set_low(struct ccsr_gpio *base, u32 gpios)
65{
66 clrbits_be32(&base->gpdat, gpios);
67 /* GPDIR register 1 -> output */
68 setbits_be32(&base->gpdir, gpios);
69}
70
71static inline void mpc85xx_gpio_set_high(struct ccsr_gpio *base, u32 gpios)
72{
73 setbits_be32(&base->gpdat, gpios);
74 /* GPDIR register 1 -> output */
75 setbits_be32(&base->gpdir, gpios);
76}
77
mario.six@gdsys.cc51781782016-05-25 15:15:22 +020078static inline int mpc85xx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
79{
80 return in_be32(&base->gpodr) & mask;
81}
82
83static inline void mpc85xx_gpio_open_drain_on(struct ccsr_gpio *base, u32
84 gpios)
85{
86 /* GPODR register 1 -> open drain on */
87 setbits_be32(&base->gpodr, gpios);
88}
89
90static inline void mpc85xx_gpio_open_drain_off(struct ccsr_gpio *base,
91 u32 gpios)
92{
93 /* GPODR register 0 -> open drain off (actively driven) */
94 clrbits_be32(&base->gpodr, gpios);
95}
96
Mario Sixaadc5e62018-01-15 11:07:46 +010097static int mpc85xx_gpio_direction_input(struct udevice *dev, uint gpio)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020098{
99 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
100
101 mpc85xx_gpio_set_in(data->base, gpio_mask(gpio));
102 return 0;
103}
104
Mario Sixaadc5e62018-01-15 11:07:46 +0100105static int mpc85xx_gpio_set_value(struct udevice *dev, uint gpio, int value)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200106{
107 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
108
109 if (value) {
110 data->dat_shadow |= gpio_mask(gpio);
111 mpc85xx_gpio_set_high(data->base, gpio_mask(gpio));
112 } else {
113 data->dat_shadow &= ~gpio_mask(gpio);
114 mpc85xx_gpio_set_low(data->base, gpio_mask(gpio));
115 }
116 return 0;
117}
118
Mario Sixaadc5e62018-01-15 11:07:46 +0100119static int mpc85xx_gpio_direction_output(struct udevice *dev, uint gpio,
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200120 int value)
121{
122 return mpc85xx_gpio_set_value(dev, gpio, value);
123}
124
Mario Sixaadc5e62018-01-15 11:07:46 +0100125static int mpc85xx_gpio_get_value(struct udevice *dev, uint gpio)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200126{
127 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
128
129 if (!!mpc85xx_gpio_get_dir(data->base, gpio_mask(gpio))) {
130 /* Output -> use shadowed value */
131 return !!(data->dat_shadow & gpio_mask(gpio));
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200132 }
Mario Sixaadc5e62018-01-15 11:07:46 +0100133
134 /* Input -> read value from GPDAT register */
135 return !!mpc85xx_gpio_get_val(data->base, gpio_mask(gpio));
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200136}
137
Mario Sixaadc5e62018-01-15 11:07:46 +0100138static int mpc85xx_gpio_get_open_drain(struct udevice *dev, uint gpio)
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200139{
140 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
141
142 return !!mpc85xx_gpio_open_drain_val(data->base, gpio_mask(gpio));
143}
144
Mario Sixaadc5e62018-01-15 11:07:46 +0100145static int mpc85xx_gpio_set_open_drain(struct udevice *dev, uint gpio,
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200146 int value)
147{
148 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
149
Mario Sixaadc5e62018-01-15 11:07:46 +0100150 if (value)
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200151 mpc85xx_gpio_open_drain_on(data->base, gpio_mask(gpio));
Mario Sixaadc5e62018-01-15 11:07:46 +0100152 else
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200153 mpc85xx_gpio_open_drain_off(data->base, gpio_mask(gpio));
Mario Sixaadc5e62018-01-15 11:07:46 +0100154
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200155 return 0;
156}
157
Mario Sixaadc5e62018-01-15 11:07:46 +0100158static int mpc85xx_gpio_get_function(struct udevice *dev, uint gpio)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200159{
160 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
161 int dir;
162
163 dir = !!mpc85xx_gpio_get_dir(data->base, gpio_mask(gpio));
164 return dir ? GPIOF_OUTPUT : GPIOF_INPUT;
165}
166
Hamish Martin4b689f02016-06-14 10:17:05 +1200167#if CONFIG_IS_ENABLED(OF_CONTROL)
Mario Sixaadc5e62018-01-15 11:07:46 +0100168static int mpc85xx_gpio_ofdata_to_platdata(struct udevice *dev)
169{
Hamish Martin4b689f02016-06-14 10:17:05 +1200170 struct mpc85xx_gpio_plat *plat = dev_get_platdata(dev);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200171 fdt_addr_t addr;
172 fdt_size_t size;
173
Simon Glasse160f7d2017-01-17 16:52:55 -0700174 addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob,
Mario Sixaadc5e62018-01-15 11:07:46 +0100175 dev_of_offset(dev),
176 "reg", 0, &size, false);
Hamish Martin4b689f02016-06-14 10:17:05 +1200177 plat->addr = addr;
178 plat->size = size;
Simon Glasse160f7d2017-01-17 16:52:55 -0700179 plat->ngpios = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
180 "ngpios", 32);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200181
Hamish Martin4b689f02016-06-14 10:17:05 +1200182 return 0;
183}
184#endif
185
186static int mpc85xx_gpio_platdata_to_priv(struct udevice *dev)
187{
188 struct mpc85xx_gpio_data *priv = dev_get_priv(dev);
189 struct mpc85xx_gpio_plat *plat = dev_get_platdata(dev);
190 unsigned long size = plat->size;
191
192 if (size == 0)
193 size = 0x100;
194
195 priv->addr = plat->addr;
196 priv->base = map_sysmem(CONFIG_SYS_IMMR + plat->addr, size);
197
198 if (!priv->base)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200199 return -ENOMEM;
200
Hamish Martin4b689f02016-06-14 10:17:05 +1200201 priv->gpio_count = plat->ngpios;
202 priv->dat_shadow = 0;
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200203
204 return 0;
205}
206
207static int mpc85xx_gpio_probe(struct udevice *dev)
208{
209 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
210 struct mpc85xx_gpio_data *data = dev_get_priv(dev);
211 char name[32], *str;
212
Hamish Martin4b689f02016-06-14 10:17:05 +1200213 mpc85xx_gpio_platdata_to_priv(dev);
214
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200215 snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
216 str = strdup(name);
217
218 if (!str)
219 return -ENOMEM;
220
221 uc_priv->bank_name = str;
222 uc_priv->gpio_count = data->gpio_count;
223
224 return 0;
225}
226
227static const struct dm_gpio_ops gpio_mpc85xx_ops = {
228 .direction_input = mpc85xx_gpio_direction_input,
229 .direction_output = mpc85xx_gpio_direction_output,
230 .get_value = mpc85xx_gpio_get_value,
231 .set_value = mpc85xx_gpio_set_value,
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200232 .get_open_drain = mpc85xx_gpio_get_open_drain,
233 .set_open_drain = mpc85xx_gpio_set_open_drain,
Mario Sixaadc5e62018-01-15 11:07:46 +0100234 .get_function = mpc85xx_gpio_get_function,
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200235};
236
237static const struct udevice_id mpc85xx_gpio_ids[] = {
238 { .compatible = "fsl,pq3-gpio" },
239 { /* sentinel */ }
240};
241
242U_BOOT_DRIVER(gpio_mpc85xx) = {
243 .name = "gpio_mpc85xx",
244 .id = UCLASS_GPIO,
245 .ops = &gpio_mpc85xx_ops,
Hamish Martin4b689f02016-06-14 10:17:05 +1200246#if CONFIG_IS_ENABLED(OF_CONTROL)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200247 .ofdata_to_platdata = mpc85xx_gpio_ofdata_to_platdata,
Hamish Martin4b689f02016-06-14 10:17:05 +1200248 .platdata_auto_alloc_size = sizeof(struct mpc85xx_gpio_plat),
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200249 .of_match = mpc85xx_gpio_ids,
Hamish Martin4b689f02016-06-14 10:17:05 +1200250#endif
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200251 .probe = mpc85xx_gpio_probe,
252 .priv_auto_alloc_size = sizeof(struct mpc85xx_gpio_data),
253};