Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Google, Inc |
| 3 | * |
| 4 | * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
| 13 | * Copyright (C) 2005-2009 coresystems GmbH |
| 14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
| 15 | * |
| 16 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
| 17 | * |
| 18 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 19 | * David Mosberger-Tang |
| 20 | * |
| 21 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
| 22 | |
| 23 | * SPDX-License-Identifier: GPL-2.0 |
| 24 | */ |
| 25 | |
| 26 | #include <common.h> |
| 27 | #include <bios_emul.h> |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 28 | #include <dm.h> |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 29 | #include <errno.h> |
| 30 | #include <malloc.h> |
| 31 | #include <pci.h> |
| 32 | #include <pci_rom.h> |
| 33 | #include <vbe.h> |
| 34 | #include <video_fb.h> |
Bin Meng | a452002 | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 35 | #include <linux/screen_info.h> |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 36 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 37 | __weak bool board_should_run_oprom(struct udevice *dev) |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 38 | { |
| 39 | return true; |
| 40 | } |
| 41 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 42 | static bool should_load_oprom(struct udevice *dev) |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 43 | { |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 44 | if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM)) |
| 45 | return 1; |
| 46 | if (board_should_run_oprom(dev)) |
| 47 | return 1; |
| 48 | |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | __weak uint32_t board_map_oprom_vendev(uint32_t vendev) |
| 53 | { |
| 54 | return vendev; |
| 55 | } |
| 56 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 57 | static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 58 | { |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 59 | struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 60 | struct pci_rom_header *rom_header; |
| 61 | struct pci_rom_data *rom_data; |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 62 | u16 rom_vendor, rom_device; |
Bin Meng | d57c2f2 | 2015-04-24 15:48:03 +0800 | [diff] [blame] | 63 | u32 rom_class; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 64 | u32 vendev; |
| 65 | u32 mapped_vendev; |
| 66 | u32 rom_address; |
| 67 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 68 | vendev = pplat->vendor << 16 | pplat->device; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 69 | mapped_vendev = board_map_oprom_vendev(vendev); |
| 70 | if (vendev != mapped_vendev) |
| 71 | debug("Device ID mapped to %#08x\n", mapped_vendev); |
| 72 | |
Bin Meng | 786a08e | 2015-07-06 16:31:33 +0800 | [diff] [blame] | 73 | #ifdef CONFIG_VGA_BIOS_ADDR |
| 74 | rom_address = CONFIG_VGA_BIOS_ADDR; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 75 | #else |
Simon Glass | 4a2708a | 2015-01-14 21:37:04 -0700 | [diff] [blame] | 76 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 77 | dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 78 | if (rom_address == 0x00000000 || rom_address == 0xffffffff) { |
| 79 | debug("%s: rom_address=%x\n", __func__, rom_address); |
| 80 | return -ENOENT; |
| 81 | } |
| 82 | |
| 83 | /* Enable expansion ROM address decoding. */ |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 84 | dm_pci_write_config32(dev, PCI_ROM_ADDRESS, |
| 85 | rom_address | PCI_ROM_ADDRESS_ENABLE); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 86 | #endif |
| 87 | debug("Option ROM address %x\n", rom_address); |
Minghuan Lian | ef2d17f | 2015-01-22 13:21:55 +0800 | [diff] [blame] | 88 | rom_header = (struct pci_rom_header *)(unsigned long)rom_address; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 89 | |
| 90 | debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n", |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 91 | le16_to_cpu(rom_header->signature), |
| 92 | rom_header->size * 512, le16_to_cpu(rom_header->data)); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 93 | |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 94 | if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) { |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 95 | printf("Incorrect expansion ROM header signature %04x\n", |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 96 | le16_to_cpu(rom_header->signature)); |
Bin Meng | f110da9 | 2015-07-08 13:06:41 +0800 | [diff] [blame] | 97 | #ifndef CONFIG_VGA_BIOS_ADDR |
| 98 | /* Disable expansion ROM address decoding */ |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 99 | dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address); |
Bin Meng | f110da9 | 2015-07-08 13:06:41 +0800 | [diff] [blame] | 100 | #endif |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 101 | return -EINVAL; |
| 102 | } |
| 103 | |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 104 | rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data)); |
| 105 | rom_vendor = le16_to_cpu(rom_data->vendor); |
| 106 | rom_device = le16_to_cpu(rom_data->device); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 107 | |
| 108 | debug("PCI ROM image, vendor ID %04x, device ID %04x,\n", |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 109 | rom_vendor, rom_device); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 110 | |
| 111 | /* If the device id is mapped, a mismatch is expected */ |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 112 | if ((pplat->vendor != rom_vendor || pplat->device != rom_device) && |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 113 | (vendev == mapped_vendev)) { |
| 114 | printf("ID mismatch: vendor ID %04x, device ID %04x\n", |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 115 | rom_vendor, rom_device); |
Simon Glass | c5caba0 | 2014-12-29 19:32:27 -0700 | [diff] [blame] | 116 | /* Continue anyway */ |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 117 | } |
| 118 | |
Bin Meng | d57c2f2 | 2015-04-24 15:48:03 +0800 | [diff] [blame] | 119 | rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo; |
| 120 | debug("PCI ROM image, Class Code %06x, Code Type %02x\n", |
| 121 | rom_class, rom_data->type); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 122 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 123 | if (pplat->class != rom_class) { |
Bin Meng | d57c2f2 | 2015-04-24 15:48:03 +0800 | [diff] [blame] | 124 | debug("Class Code mismatch ROM %06x, dev %06x\n", |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 125 | rom_class, pplat->class); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 126 | } |
| 127 | *hdrp = rom_header; |
| 128 | |
| 129 | return 0; |
| 130 | } |
| 131 | |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 132 | /** |
| 133 | * pci_rom_load() - Load a ROM image and return a pointer to it |
| 134 | * |
| 135 | * @rom_header: Pointer to ROM image |
| 136 | * @ram_headerp: Returns a pointer to the image in RAM |
| 137 | * @allocedp: Returns true if @ram_headerp was allocated and needs |
| 138 | * to be freed |
| 139 | * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of |
| 140 | * the error state. Even if this function returns an error, it may have |
| 141 | * allocated memory. |
| 142 | */ |
| 143 | static int pci_rom_load(struct pci_rom_header *rom_header, |
| 144 | struct pci_rom_header **ram_headerp, bool *allocedp) |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 145 | { |
| 146 | struct pci_rom_data *rom_data; |
| 147 | unsigned int rom_size; |
| 148 | unsigned int image_size = 0; |
| 149 | void *target; |
| 150 | |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 151 | *allocedp = false; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 152 | do { |
| 153 | /* Get next image, until we see an x86 version */ |
| 154 | rom_header = (struct pci_rom_header *)((void *)rom_header + |
| 155 | image_size); |
| 156 | |
| 157 | rom_data = (struct pci_rom_data *)((void *)rom_header + |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 158 | le16_to_cpu(rom_header->data)); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 159 | |
Simon Glass | 4030524 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 160 | image_size = le16_to_cpu(rom_data->ilen) * 512; |
| 161 | } while ((rom_data->type != 0) && (rom_data->indicator == 0)); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 162 | |
| 163 | if (rom_data->type != 0) |
| 164 | return -EACCES; |
| 165 | |
| 166 | rom_size = rom_header->size * 512; |
| 167 | |
Simon Glass | bdc88d4 | 2014-12-29 19:32:24 -0700 | [diff] [blame] | 168 | #ifdef PCI_VGA_RAM_IMAGE_START |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 169 | target = (void *)PCI_VGA_RAM_IMAGE_START; |
Simon Glass | bdc88d4 | 2014-12-29 19:32:24 -0700 | [diff] [blame] | 170 | #else |
| 171 | target = (void *)malloc(rom_size); |
| 172 | if (!target) |
| 173 | return -ENOMEM; |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 174 | *allocedp = true; |
Simon Glass | bdc88d4 | 2014-12-29 19:32:24 -0700 | [diff] [blame] | 175 | #endif |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 176 | if (target != rom_header) { |
Simon Glass | fba7eac | 2015-01-01 16:18:01 -0700 | [diff] [blame] | 177 | ulong start = get_timer(0); |
| 178 | |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 179 | debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n", |
| 180 | rom_header, target, rom_size); |
| 181 | memcpy(target, rom_header, rom_size); |
| 182 | if (memcmp(target, rom_header, rom_size)) { |
| 183 | printf("VGA ROM copy failed\n"); |
| 184 | return -EFAULT; |
| 185 | } |
Simon Glass | fba7eac | 2015-01-01 16:18:01 -0700 | [diff] [blame] | 186 | debug("Copy took %lums\n", get_timer(start)); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 187 | } |
| 188 | *ram_headerp = target; |
| 189 | |
| 190 | return 0; |
| 191 | } |
| 192 | |
Bin Meng | 153e1dd | 2015-08-13 00:29:16 -0700 | [diff] [blame] | 193 | struct vbe_mode_info mode_info; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 194 | |
| 195 | int vbe_get_video_info(struct graphic_device *gdev) |
| 196 | { |
| 197 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
| 198 | struct vesa_mode_info *vesa = &mode_info.vesa; |
| 199 | |
| 200 | gdev->winSizeX = vesa->x_resolution; |
| 201 | gdev->winSizeY = vesa->y_resolution; |
| 202 | |
| 203 | gdev->plnSizeX = vesa->x_resolution; |
| 204 | gdev->plnSizeY = vesa->y_resolution; |
| 205 | |
| 206 | gdev->gdfBytesPP = vesa->bits_per_pixel / 8; |
| 207 | |
| 208 | switch (vesa->bits_per_pixel) { |
Jian Luo | 0e98a14 | 2015-07-06 16:31:29 +0800 | [diff] [blame] | 209 | case 32: |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 210 | case 24: |
| 211 | gdev->gdfIndex = GDF_32BIT_X888RGB; |
| 212 | break; |
| 213 | case 16: |
| 214 | gdev->gdfIndex = GDF_16BIT_565RGB; |
| 215 | break; |
| 216 | default: |
| 217 | gdev->gdfIndex = GDF__8BIT_INDEX; |
| 218 | break; |
| 219 | } |
| 220 | |
| 221 | gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS; |
| 222 | gdev->pciBase = vesa->phys_base_ptr; |
| 223 | |
| 224 | gdev->frameAdrs = vesa->phys_base_ptr; |
| 225 | gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution; |
| 226 | |
| 227 | gdev->vprBase = vesa->phys_base_ptr; |
| 228 | gdev->cprBase = vesa->phys_base_ptr; |
| 229 | |
Simon Glass | 23609c7 | 2015-01-01 16:18:00 -0700 | [diff] [blame] | 230 | return gdev->winSizeX ? 0 : -ENOSYS; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 231 | #else |
| 232 | return -ENOSYS; |
| 233 | #endif |
| 234 | } |
| 235 | |
Bin Meng | a452002 | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 236 | void setup_video(struct screen_info *screen_info) |
| 237 | { |
Bin Meng | a452002 | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 238 | struct vesa_mode_info *vesa = &mode_info.vesa; |
| 239 | |
Bin Meng | 1e7a047 | 2015-07-30 03:49:13 -0700 | [diff] [blame] | 240 | /* Sanity test on VESA parameters */ |
| 241 | if (!vesa->x_resolution || !vesa->y_resolution) |
| 242 | return; |
| 243 | |
Bin Meng | a452002 | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 244 | screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB; |
| 245 | |
| 246 | screen_info->lfb_width = vesa->x_resolution; |
| 247 | screen_info->lfb_height = vesa->y_resolution; |
| 248 | screen_info->lfb_depth = vesa->bits_per_pixel; |
| 249 | screen_info->lfb_linelength = vesa->bytes_per_scanline; |
| 250 | screen_info->lfb_base = vesa->phys_base_ptr; |
| 251 | screen_info->lfb_size = |
| 252 | ALIGN(screen_info->lfb_linelength * screen_info->lfb_height, |
| 253 | 65536); |
| 254 | screen_info->lfb_size >>= 16; |
| 255 | screen_info->red_size = vesa->red_mask_size; |
| 256 | screen_info->red_pos = vesa->red_mask_pos; |
| 257 | screen_info->green_size = vesa->green_mask_size; |
| 258 | screen_info->green_pos = vesa->green_mask_pos; |
| 259 | screen_info->blue_size = vesa->blue_mask_size; |
| 260 | screen_info->blue_pos = vesa->blue_mask_pos; |
| 261 | screen_info->rsvd_size = vesa->reserved_mask_size; |
| 262 | screen_info->rsvd_pos = vesa->reserved_mask_pos; |
Bin Meng | a452002 | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 263 | } |
| 264 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 265 | int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), |
| 266 | int exec_method) |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 267 | { |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 268 | struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); |
Tom Rini | 55616b8 | 2016-01-16 14:50:26 +0000 | [diff] [blame] | 269 | struct pci_rom_header *rom, *ram = NULL; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 270 | int vesa_mode = -1; |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 271 | bool emulate, alloced; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 272 | int ret; |
| 273 | |
| 274 | /* Only execute VGA ROMs */ |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 275 | if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) { |
| 276 | debug("%s: Class %#x, should be %#x\n", __func__, pplat->class, |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 277 | PCI_CLASS_DISPLAY_VGA); |
| 278 | return -ENODEV; |
| 279 | } |
| 280 | |
| 281 | if (!should_load_oprom(dev)) |
| 282 | return -ENXIO; |
| 283 | |
Simon Glass | 3f4e1e8 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 284 | ret = pci_rom_probe(dev, &rom); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 285 | if (ret) |
| 286 | return ret; |
| 287 | |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 288 | ret = pci_rom_load(rom, &ram, &alloced); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 289 | if (ret) |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 290 | goto err; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 291 | |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 292 | if (!board_should_run_oprom(dev)) { |
| 293 | ret = -ENXIO; |
| 294 | goto err; |
| 295 | } |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 296 | |
| 297 | #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \ |
| 298 | defined(CONFIG_FRAMEBUFFER_VESA_MODE) |
| 299 | vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE; |
| 300 | #endif |
Simon Glass | 9a99caf | 2015-01-01 16:18:05 -0700 | [diff] [blame] | 301 | debug("Selected vesa mode %#x\n", vesa_mode); |
Simon Glass | bc17d8f | 2015-01-27 22:13:34 -0700 | [diff] [blame] | 302 | |
| 303 | if (exec_method & PCI_ROM_USE_NATIVE) { |
| 304 | #ifdef CONFIG_X86 |
| 305 | emulate = false; |
| 306 | #else |
| 307 | if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { |
| 308 | printf("BIOS native execution is only available on x86\n"); |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 309 | ret = -ENOSYS; |
| 310 | goto err; |
Simon Glass | bc17d8f | 2015-01-27 22:13:34 -0700 | [diff] [blame] | 311 | } |
| 312 | emulate = true; |
| 313 | #endif |
| 314 | } else { |
| 315 | #ifdef CONFIG_BIOSEMU |
| 316 | emulate = true; |
| 317 | #else |
| 318 | if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { |
| 319 | printf("BIOS emulation not available - see CONFIG_BIOSEMU\n"); |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 320 | ret = -ENOSYS; |
| 321 | goto err; |
Simon Glass | bc17d8f | 2015-01-27 22:13:34 -0700 | [diff] [blame] | 322 | } |
| 323 | emulate = false; |
| 324 | #endif |
| 325 | } |
| 326 | |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 327 | if (emulate) { |
| 328 | #ifdef CONFIG_BIOSEMU |
| 329 | BE_VGAInfo *info; |
| 330 | |
Simon Glass | 7282672 | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 331 | ret = biosemu_setup(dev, &info); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 332 | if (ret) |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 333 | goto err; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 334 | biosemu_set_interrupt_handler(0x15, int15_handler); |
Simon Glass | 7282672 | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 335 | ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, |
| 336 | true, vesa_mode, &mode_info); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 337 | if (ret) |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 338 | goto err; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 339 | #endif |
| 340 | } else { |
| 341 | #ifdef CONFIG_X86 |
| 342 | bios_set_interrupt_handler(0x15, int15_handler); |
| 343 | |
Simon Glass | 8beb0bd | 2015-11-29 13:17:58 -0700 | [diff] [blame] | 344 | bios_run_on_x86(dev, (unsigned long)ram, vesa_mode, |
| 345 | &mode_info); |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 346 | #endif |
| 347 | } |
Simon Glass | 9a99caf | 2015-01-01 16:18:05 -0700 | [diff] [blame] | 348 | debug("Final vesa mode %#x\n", mode_info.video_mode); |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 349 | ret = 0; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 350 | |
Simon Glass | d830b15 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 351 | err: |
| 352 | if (alloced) |
| 353 | free(ram); |
| 354 | return ret; |
Simon Glass | 6854f87 | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 355 | } |