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Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +02001/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * (C) Copyright 2009
8 * Frederik Kriewitz <frederik@kriewitz.eu>
9 *
10 * Configuration settings for the DevKit8000 board.
11 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020012 * SPDX-License-Identifier: GPL-2.0+
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020017
18/* High Level Configuration Options */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020019#define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */
Simon Schwarz2d52a9a2012-03-15 04:01:40 +000020#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
Marek Vasut308252a2012-07-21 05:02:23 +000021
Simon Schwarz5183b7e2011-12-05 23:16:28 +000022/*
23 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
24 * 64 bytes before this address should be set aside for u-boot.img's
25 * header. That is 0x800FFFC0--0x80100000 should not be used for any
26 * other needs.
27 */
28#define CONFIG_SYS_TEXT_BASE 0x80100000
Thomas Weber66fca012010-10-18 15:38:15 +020029
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010030#define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
31#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
32
33#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
34#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Vaibhav Hiremathcae377b2010-06-07 15:20:34 -040035
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010036#define CONFIG_NAND
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010037
38/* Physical Memory Map */
39#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010040
Anthoine Bourgeoisa91ef4a2015-01-02 00:35:43 +010041#include <configs/ti_omap3_common.h>
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010042
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020043/* Display CPU and Board information */
44#define CONFIG_DISPLAY_CPUINFO 1
45#define CONFIG_DISPLAY_BOARDINFO 1
46
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020047#define CONFIG_MISC_INIT_R
48
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020049#define CONFIG_REVISION_TAG 1
50
51/* Size of malloc() pool */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040052#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020053 /* Sector */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010054#undef CONFIG_SYS_MALLOC_LEN
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040055#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020056
57/* Hardware drivers */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020058/* DM9000 */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020059#define CONFIG_NET_RETRY_COUNT 20
60#define CONFIG_DRIVER_DM9000 1
61#define CONFIG_DM9000_BASE 0x2c000000
62#define DM9000_IO CONFIG_DM9000_BASE
63#define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
64#define CONFIG_DM9000_USE_16BIT 1
65#define CONFIG_DM9000_NO_SROM 1
66#undef CONFIG_DM9000_DEBUG
67
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010068/* SPI */
69#undef CONFIG_SPI
70#undef CONFIG_OMAP3_SPI
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020071
72/* I2C */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010073#undef CONFIG_SYS_I2C_OMAP24XX
Heiko Schocher6789e842013-10-22 11:03:18 +020074#define CONFIG_SYS_I2C_OMAP34XX
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020075
76/* TWL4030 */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020077#define CONFIG_TWL4030_LED 1
78
79/* Board NAND Info */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020080#define MTDIDS_DEFAULT "nand0=nand"
81#define MTDPARTS_DEFAULT "mtdparts=nand:" \
82 "512k(x-loader)," \
83 "1920k(u-boot)," \
84 "128k(u-boot-env)," \
85 "4m(kernel)," \
86 "-(fs)"
87
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020088#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
89 /* to access nand */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020090#define CONFIG_JFFS2_NAND
91/* nand device jffs2 lives on */
92#define CONFIG_JFFS2_DEV "nand0"
93/* start of jffs2 partition */
94#define CONFIG_JFFS2_PART_OFFSET 0x680000
95#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
96 /* partition */
97
98/* commands to include */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020099#define CONFIG_CMD_DHCP /* DHCP support */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200100#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200101#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
102
103#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
104#undef CONFIG_CMD_IMI /* iminfo */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +0100105#undef CONFIG_CMD_SPI
106#undef CONFIG_CMD_GPIO
107#undef CONFIG_CMD_ASKENV
108#undef CONFIG_CMD_BOOTZ
109#undef CONFIG_SUPPORT_RAW_INITRD
110#undef CONFIG_FAT_WRITE
111#undef CONFIG_CMD_EXT4
112#undef CONFIG_CMD_FS_GENERIC
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200113
114/* BOOTP/DHCP options */
115#define CONFIG_BOOTP_SUBNETMASK
116#define CONFIG_BOOTP_GATEWAY
117#define CONFIG_BOOTP_HOSTNAME
118#define CONFIG_BOOTP_NISDOMAIN
119#define CONFIG_BOOTP_BOOTPATH
120#define CONFIG_BOOTP_BOOTFILESIZE
121#define CONFIG_BOOTP_DNS
122#define CONFIG_BOOTP_DNS2
123#define CONFIG_BOOTP_SEND_HOSTNAME
124#define CONFIG_BOOTP_NTPSERVER
125#define CONFIG_BOOTP_TIMEOFFSET
126#undef CONFIG_BOOTP_VENDOREX
127
128/* Environment information */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200129#define CONFIG_EXTRA_ENV_SETTINGS \
130 "loadaddr=0x82000000\0" \
Thomas Weber2d76da22011-09-18 22:43:58 +0000131 "console=ttyO2,115200n8\0" \
Tom Rinif4085012011-09-03 21:52:45 -0400132 "mmcdev=0\0" \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200133 "vram=12M\0" \
134 "dvimode=1024x768MR-16@60\0" \
135 "defaultdisplay=dvi\0" \
136 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
137 "kernelopts=rw\0" \
138 "commonargs=" \
139 "setenv bootargs console=${console} " \
140 "vram=${vram} " \
141 "omapfb.mode=dvi:${dvimode} " \
142 "omapdss.def_disp=${defaultdisplay}\0" \
143 "mmcargs=" \
144 "run commonargs; " \
145 "setenv bootargs ${bootargs} " \
146 "root=/dev/mmcblk0p2 " \
Andreas Bießmannb72db202012-08-30 23:53:32 +0000147 "rootwait " \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200148 "${kernelopts}\0" \
149 "nandargs=" \
150 "run commonargs; " \
151 "setenv bootargs ${bootargs} " \
152 "omapfb.mode=dvi:${dvimode} " \
153 "omapdss.def_disp=${defaultdisplay} " \
154 "root=/dev/mtdblock4 " \
155 "rootfstype=jffs2 " \
156 "${kernelopts}\0" \
157 "netargs=" \
158 "run commonargs; " \
159 "setenv bootargs ${bootargs} " \
160 "root=/dev/nfs " \
161 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
162 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
163 "${kernelopts} " \
164 "dnsip1=${dnsip} " \
165 "dnsip2=${dnsip2}\0" \
Tom Rinif4085012011-09-03 21:52:45 -0400166 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200167 "bootscript=echo Running bootscript from mmc ...; " \
168 "source ${loadaddr}\0" \
Tom Rinif4085012011-09-03 21:52:45 -0400169 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200170 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
171 "mmcboot=echo Booting from mmc ...; " \
172 "run mmcargs; " \
173 "bootm ${loadaddr}\0" \
174 "nandboot=echo Booting from nand ...; " \
175 "run nandargs; " \
176 "nand read ${loadaddr} 280000 400000; " \
177 "bootm ${loadaddr}\0" \
178 "netboot=echo Booting from network ...; " \
179 "dhcp ${loadaddr}; " \
180 "run netargs; " \
181 "bootm ${loadaddr}\0" \
Andrew Bradford66968112012-10-01 05:06:52 +0000182 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200183 "if run loadbootscript; then " \
184 "run bootscript; " \
185 "else " \
186 "if run loaduimage; then " \
187 "run mmcboot; " \
188 "else run nandboot; " \
189 "fi; " \
190 "fi; " \
191 "else run nandboot; fi\0"
192
193
194#define CONFIG_BOOTCOMMAND "run autoboot"
195
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200196/* Boot Argument Buffer Size */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200197#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
198#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
199 0x01000000) /* 16MB */
200
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200201/* NAND and environment organization */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200202#define CONFIG_ENV_IS_IN_NAND 1
203#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
204
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400205#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200206
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400207/* SRAM config */
208#define CONFIG_SYS_SRAM_START 0x40200000
209#define CONFIG_SYS_SRAM_SIZE 0x10000
210
211/* Defines for SPL */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +0100212#undef CONFIG_SPL_MTD_SUPPORT
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400213
Anthoine Bourgeoisa91ef4a2015-01-02 00:35:43 +0100214#undef CONFIG_SPL_TEXT_BASE
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400215#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Anthoine Bourgeois875e4152015-01-02 00:35:42 +0100216#undef CONFIG_SPL_STACK
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400217#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
218
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400219/* NAND boot config */
pekon guptab80a6602014-05-06 00:46:19 +0530220#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
Tom Rinic471ccb2011-11-09 16:40:04 -0500221#define CONFIG_SYS_NAND_5_ADDR_CYCLE
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400222#define CONFIG_SYS_NAND_PAGE_COUNT 64
223#define CONFIG_SYS_NAND_PAGE_SIZE 2048
224#define CONFIG_SYS_NAND_OOBSIZE 64
225#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
226#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
227#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
228 10, 11, 12, 13}
229
230#define CONFIG_SYS_NAND_ECCSIZE 512
231#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3f719062013-11-18 19:03:01 +0530232#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400233
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400234#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
235#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
236
Simon Schwarzd38bc972012-03-15 04:01:35 +0000237/* SPL OS boot options */
Simon Schwarzd38bc972012-03-15 04:01:35 +0000238#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
239#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
240 0x400000)
241#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
Tom Rinib6144df2013-06-07 14:16:43 -0400242
Anthoine Bourgeois875e4152015-01-02 00:35:42 +0100243#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
244#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
245#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
Tom Rinib6144df2013-06-07 14:16:43 -0400246#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
247#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */
248#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
249
Anthoine Bourgeoisa91ef4a2015-01-02 00:35:43 +0100250#undef CONFIG_SYS_SPL_ARGS_ADDR
Simon Schwarzd38bc972012-03-15 04:01:35 +0000251#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
252
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200253#endif /* __CONFIG_H */