Jagan Teki | a8a8fc9 | 2015-06-27 00:51:33 +0530 | [diff] [blame^] | 1 | Zynq SPI controller Device Tree Bindings |
| 2 | ---------------------------------------- |
| 3 | |
| 4 | Required properties: |
| 5 | - compatible : Should be "xlnx,spi-zynq". |
| 6 | - reg : Physical base address and size of SPI registers map. |
| 7 | - status : Status will be disabled in dtsi and enabled in required dts. |
| 8 | - interrupt-parent : Must be core interrupt controller. |
| 9 | - interrupts : Property with a value describing the interrupt |
| 10 | number. |
| 11 | - clocks : Clock phandles (see clock bindings for details). |
| 12 | - clock-names : List of input clock names - "ref_clk", "pclk" |
| 13 | (See clock bindings for details). |
| 14 | |
| 15 | Example: |
| 16 | |
| 17 | spi@e0006000 { |
| 18 | compatible = "xlnx,zynq-spi"; |
| 19 | reg = <0xe0006000 0x1000>; |
| 20 | status = "disabled"; |
| 21 | interrupt-parent = <&intc>; |
| 22 | interrupts = <0 26 4>; |
| 23 | clocks = <&clkc 25>, <&clkc 34>; |
| 24 | clock-names = "ref_clk", "pclk"; |
| 25 | #address-cells = <1>; |
| 26 | #size-cells = <0>; |
| 27 | } ; |