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Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright : STMicroelectronics 2018
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01004 */
5
6/ {
7 aliases {
8 gpio0 = &gpioa;
9 gpio1 = &gpiob;
10 gpio2 = &gpioc;
11 gpio3 = &gpiod;
12 gpio4 = &gpioe;
13 gpio5 = &gpiof;
14 gpio6 = &gpiog;
15 gpio7 = &gpioh;
16 gpio8 = &gpioi;
17 gpio9 = &gpioj;
18 gpio10 = &gpiok;
19 gpio25 = &gpioz;
Patrick Delaunay1258e462019-04-12 14:38:28 +020020 pinctrl0 = &pinctrl;
21 pinctrl1 = &pinctrl_z;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010022 };
23
Patrick Delaunay35a54d42019-07-11 11:15:28 +020024 clocks {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010025 u-boot,dm-pre-reloc;
26 };
27
Patrick Delaunay35a54d42019-07-11 11:15:28 +020028 reboot {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010029 u-boot,dm-pre-reloc;
30 };
31
32 soc {
33 u-boot,dm-pre-reloc;
Patrick Delaunaye16750f2018-03-20 11:45:14 +010034 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010035};
36
Patrick Delaunaybfe1f082019-02-27 17:01:27 +010037&bsec {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020038 u-boot,dm-pre-proper;
39};
40
41&clk_csi {
Patrick Delaunaybfe1f082019-02-27 17:01:27 +010042 u-boot,dm-pre-reloc;
43};
44
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010045&clk_hsi {
46 u-boot,dm-pre-reloc;
47};
48
49&clk_hse {
50 u-boot,dm-pre-reloc;
51};
52
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010053&clk_lsi {
54 u-boot,dm-pre-reloc;
55};
56
Patrick Delaunay35a54d42019-07-11 11:15:28 +020057&clk_lse {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010058 u-boot,dm-pre-reloc;
59};
60
61&gpioa {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010062 u-boot,dm-pre-reloc;
63};
64
65&gpiob {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010066 u-boot,dm-pre-reloc;
67};
68
69&gpioc {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010070 u-boot,dm-pre-reloc;
71};
72
73&gpiod {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010074 u-boot,dm-pre-reloc;
75};
76
77&gpioe {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010078 u-boot,dm-pre-reloc;
79};
80
81&gpiof {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010082 u-boot,dm-pre-reloc;
83};
84
85&gpiog {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010086 u-boot,dm-pre-reloc;
87};
88
89&gpioh {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010090 u-boot,dm-pre-reloc;
91};
92
93&gpioi {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010094 u-boot,dm-pre-reloc;
95};
96
97&gpioj {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010098 u-boot,dm-pre-reloc;
99};
100
101&gpiok {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100102 u-boot,dm-pre-reloc;
103};
104
105&gpioz {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100106 u-boot,dm-pre-reloc;
107};
Patrice Chotard75500a42019-04-30 17:26:21 +0200108
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200109&pinctrl {
Patrice Chotard75500a42019-04-30 17:26:21 +0200110 u-boot,dm-pre-reloc;
111};
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200112
113&pinctrl_z {
114 u-boot,dm-pre-reloc;
115};
116
117&pwr {
118 u-boot,dm-pre-reloc;
119};
120
121&rcc {
122 u-boot,dm-pre-reloc;
123};
124
125&sdmmc1 {
126 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
127};
128
129&sdmmc2 {
130 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
131};
132
133&sdmmc3 {
134 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
135};
136
137&usbotg_hs {
138 compatible = "st,stm32mp1-hsotg", "snps,dwc2";
139};