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Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +02001/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25#include <config.h>
Prafulla Wadaskarbeeb2582010-09-30 19:33:19 +053026#include <common.h>
Lei Wena7efd712011-10-18 20:11:42 +053027#include <asm/io.h>
28#include <asm/arch/cpu.h>
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020029#include <asm/arch/kirkwood.h>
30
Prafulla Wadaskarbeeb2582010-09-30 19:33:19 +053031DECLARE_GLOBAL_DATA_PTR;
32
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020033#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + (x * 0x08))
34#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08))
35/*
36 * kw_sdram_bar - reads SDRAM Base Address Register
37 */
38u32 kw_sdram_bar(enum memory_bank bank)
39{
40 u32 result = 0;
41 u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
42
43 if ((!enable) || (bank > BANK3))
44 return 0;
45
46 result = readl(KW_REG_CPUCS_WIN_BAR(bank));
47 return result;
48}
49
50/*
51 * kw_sdram_bs - reads SDRAM Bank size
52 */
53u32 kw_sdram_bs(enum memory_bank bank)
54{
55 u32 result = 0;
56 u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
57
58 if ((!enable) || (bank > BANK3))
59 return 0;
60 result = 0xff000000 & readl(KW_REG_CPUCS_WIN_SZ(bank));
61 result += 0x01000000;
62 return result;
63}
Prafulla Wadaskarbeeb2582010-09-30 19:33:19 +053064
65#ifndef CONFIG_SYS_BOARD_DRAM_INIT
66int dram_init(void)
67{
68 int i;
69
70 gd->ram_size = 0;
71 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
72 gd->bd->bi_dram[i].start = kw_sdram_bar(i);
73 gd->bd->bi_dram[i].size = kw_sdram_bs(i);
74 /*
75 * It is assumed that all memory banks are consecutive
76 * and without gaps.
77 * If the gap is found, ram_size will be reported for
78 * consecutive memory only
79 */
80 if (gd->bd->bi_dram[i].start != gd->ram_size)
81 break;
82
83 gd->ram_size += gd->bd->bi_dram[i].size;
84
85 }
Tanmay Upadhyay28e57102010-10-28 20:06:22 +053086
87 for (; i < CONFIG_NR_DRAM_BANKS; i++) {
88 /* If above loop terminated prematurely, we need to set
89 * remaining banks' start address & size as 0. Otherwise other
90 * u-boot functions and Linux kernel gets wrong values which
91 * could result in crash */
92 gd->bd->bi_dram[i].start = 0;
93 gd->bd->bi_dram[i].size = 0;
94 }
95
Prafulla Wadaskarbeeb2582010-09-30 19:33:19 +053096 return 0;
97}
98
99/*
100 * If this function is not defined here,
101 * board.c alters dram bank zero configuration defined above.
102 */
103void dram_init_banksize(void)
104{
105 dram_init();
106}
107#endif /* CONFIG_SYS_BOARD_DRAM_INIT */