blob: 45b9649336dbccc571fe9e5d2b25ddd9d9dea504 [file] [log] [blame]
Horatiu Vulturc75c9082019-01-12 18:57:00 +01001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 Microsemi Coprporation
4 */
5
6#include <common.h>
7#include <asm/io.h>
8#include <spi.h>
Simon Glasscd93d622020-05-10 11:40:13 -06009#include <linux/bitops.h>
Horatiu Vulturc75c9082019-01-12 18:57:00 +010010
11void external_cs_manage(struct udevice *dev, bool enable)
12{
13 u32 cs = spi_chip_select(dev);
14 /* IF_SI0_OWNER, select the owner of the SI interface
15 * Encoding: 0: SI Slave
16 * 1: SI Boot Master
17 * 2: SI Master Controller
18 */
19 if (!enable) {
20 writel(ICPU_SW_MODE_SW_PIN_CTRL_MODE |
21 ICPU_SW_MODE_SW_SPI_CS(BIT(cs)),
22 BASE_CFG + ICPU_SW_MODE);
23 clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
24 ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
25 ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
26 } else {
27 writel(0, BASE_CFG + ICPU_SW_MODE);
28 clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
29 ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
30 ICPU_GENERAL_CTRL_IF_SI_OWNER(1));
31 }
32}