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Heiko Schocher3b5df502015-06-29 09:10:48 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * (C) Copyright 2010
7 * Achim Ehrlich <aehrlich@taskit.de>
8 * taskit GmbH <www.taskit.de>
9 *
10 * (C) Copyright 2012
11 * Markus Hubig <mhubig@imko.de>
12 * IMKO GmbH <www.imko.de>
13 *
14 * (C) Copyright 2014
15 * Heiko Schocher <hs@denx.de>
16 * DENX Software Engineering GmbH
17 *
18 * Configuation settings for the smartweb.
19 *
20 * SPDX-License-Identifier: GPL-2.0+
21 */
22
23#ifndef __CONFIG_H
24#define __CONFIG_H
25
26/*
27 * SoC must be defined first, before hardware.h is included.
28 * In this case SoC is defined in boards.cfg.
29 */
30#include <asm/hardware.h>
Heiko Schochere8b81ee2015-09-08 11:52:52 +020031#include <linux/sizes.h>
Heiko Schocher3b5df502015-06-29 09:10:48 +020032
33/*
34 * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
35 * program. Since the linker has to swallow that define, we must use a pure
36 * hex number here!
37 */
38#define CONFIG_SYS_TEXT_BASE 0x23000000
39
40/* ARM asynchronous clock */
41#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
42#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
43
44/* misc settings */
45#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
46#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
47#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
Heiko Schocher13ee7892016-05-25 07:23:47 +020048#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */
Heiko Schocher3b5df502015-06-29 09:10:48 +020049
Matthias Michelb96fd822016-01-27 15:56:07 +010050/* We set the max number of command args high to avoid HUSH bugs. */
51#define CONFIG_SYS_MAXARGS 32
52
Heiko Schocher3b5df502015-06-29 09:10:48 +020053/* setting board specific options */
Tom Rini94ba26f2017-01-25 20:42:35 -050054#define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB
Heiko Schocher3b5df502015-06-29 09:10:48 +020055#define CONFIG_AUTO_COMPLETE
Matthias Michelb96fd822016-01-27 15:56:07 +010056#define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */
Matthias Michelb96fd822016-01-27 15:56:07 +010057#define CONFIG_AUTO_COMPLETE
58#define CONFIG_SYS_AUTOLOAD "yes"
59#define CONFIG_RESET_TO_RETRY
Heiko Schocher3b5df502015-06-29 09:10:48 +020060
61/* The LED PINs */
62#define CONFIG_RED_LED AT91_PIN_PA9
63#define CONFIG_GREEN_LED AT91_PIN_PA6
64
65/*
66 * SDRAM: 1 bank, 64 MB, base address 0x20000000
67 * Already initialized before u-boot gets started.
68 */
69#define CONFIG_NR_DRAM_BANKS 1
70#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schochere8b81ee2015-09-08 11:52:52 +020071#define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M)
Heiko Schocher3b5df502015-06-29 09:10:48 +020072
73/*
74 * Perform a SDRAM Memtest from the start of SDRAM
75 * till the beginning of the U-Boot position in RAM.
76 */
77#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
78#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
79
80/* Size of malloc() pool */
81#define CONFIG_SYS_MALLOC_LEN \
Heiko Schochere8b81ee2015-09-08 11:52:52 +020082 ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
Heiko Schocher3b5df502015-06-29 09:10:48 +020083
84/* NAND flash settings */
85#define CONFIG_NAND_ATMEL
Heiko Schocher3b5df502015-06-29 09:10:48 +020086#define CONFIG_SYS_MAX_NAND_DEVICE 1
87#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
88#define CONFIG_SYS_NAND_DBW_8
89#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
90#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
91#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
92#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
93
Heiko Schocher3b5df502015-06-29 09:10:48 +020094#define CONFIG_MTD_DEVICE
95#define MTDIDS_NAME_STR "atmel_nand"
96#define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR
97#define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \
98 "128k(Bootstrap)," \
99 "896k(U-Boot)," \
100 "512k(ENV0)," \
101 "512k(ENV1)," \
102 "4M(Linux)," \
103 "-(Root-FS)"
104
105/* general purpose I/O */
106#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
107#define CONFIG_AT91_GPIO /* enable the GPIO features */
108#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
109
110/* serial console */
111#define CONFIG_ATMEL_USART
112#define CONFIG_USART_BASE ATMEL_BASE_DBGU
113#define CONFIG_USART_ID ATMEL_ID_SYS
Heiko Schocher3b5df502015-06-29 09:10:48 +0200114
115/*
116 * Ethernet configuration
117 *
118 */
119#define CONFIG_MACB
Heiko Schocheraca5d082015-09-28 11:36:05 +0200120#define CONFIG_USB_HOST_ETHER
121#define CONFIG_USB_ETHER_ASIX
122#define CONFIG_USB_ETHER_MCS7830
Heiko Schocher3b5df502015-06-29 09:10:48 +0200123#define CONFIG_RMII /* use reduced MII inteface */
124#define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
125#define CONFIG_AT91_WANTS_COMMON_PHY
126
127/* BOOTP and DHCP options */
128#define CONFIG_BOOTP_BOOTFILESIZE
129#define CONFIG_BOOTP_BOOTPATH
130#define CONFIG_BOOTP_GATEWAY
131#define CONFIG_BOOTP_HOSTNAME
132#define CONFIG_NFSBOOTCOMMAND \
133 "setenv autoload yes; setenv autoboot yes; " \
134 "setenv bootargs ${basicargs} ${mtdparts} " \
135 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
136 "dhcp"
137
138/* Enable the watchdog */
139#define CONFIG_AT91SAM9_WATCHDOG
140#if !defined(CONFIG_SPL_BUILD)
141#define CONFIG_HW_WATCHDOG
142#endif
143#define CONFIG_AT91_HW_WDT_TIMEOUT 15
144
145#if !defined(CONFIG_SPL_BUILD)
146/* USB configuration */
147#define CONFIG_USB_ATMEL
148#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
149#define CONFIG_USB_OHCI_NEW
Heiko Schocher3b5df502015-06-29 09:10:48 +0200150#define CONFIG_SYS_USB_OHCI_CPU_INIT
151#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
152#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
153#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200154
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200155/* USB DFU support */
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200156#define CONFIG_MTD_DEVICE
157#define CONFIG_MTD_PARTITIONS
158
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200159#define CONFIG_USB_GADGET_AT91
160
161/* DFU class support */
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200162#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M
163#define DFU_MANIFEST_POLL_TIMEOUT 25000
Heiko Schocher3b5df502015-06-29 09:10:48 +0200164#endif
165
166/* General Boot Parameter */
Heiko Schocher3b5df502015-06-29 09:10:48 +0200167#define CONFIG_BOOTCOMMAND "run flashboot"
Heiko Schocher3b5df502015-06-29 09:10:48 +0200168#define CONFIG_SYS_CBSIZE 512
Heiko Schocher3b5df502015-06-29 09:10:48 +0200169#define CONFIG_SYS_PBSIZE \
170 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
171#define CONFIG_SYS_LONGHELP
172#define CONFIG_CMDLINE_EDITING
173
174/*
175 * RAM Memory address where to put the
176 * Linux Kernel befor starting.
177 */
178#define CONFIG_SYS_LOAD_ADDR 0x22000000
179
180/*
181 * The NAND Flash partitions:
182 */
Heiko Schocher3b5df502015-06-29 09:10:48 +0200183#define CONFIG_ENV_OFFSET (0x100000)
184#define CONFIG_ENV_OFFSET_REDUND (0x180000)
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200185#define CONFIG_ENV_RANGE (SZ_512K)
186#define CONFIG_ENV_SIZE (SZ_128K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200187
188/*
189 * Predefined environment variables.
190 * Usefull to define some easy to use boot commands.
191 */
192#define CONFIG_EXTRA_ENV_SETTINGS \
193 \
194 "basicargs=console=ttyS0,115200\0" \
195 \
196 "mtdparts="MTDPARTS_DEFAULT"\0"
197
Heiko Schocher3b5df502015-06-29 09:10:48 +0200198#ifdef CONFIG_SPL_BUILD
199#define CONFIG_SYS_INIT_SP_ADDR 0x301000
200#define CONFIG_SPL_STACK_R
201#define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
202#else
203/*
204 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
205 * leaving the correct space for initial global data structure above that
206 * address while providing maximum stack area below.
207 */
208#define CONFIG_SYS_INIT_SP_ADDR \
209 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
210#endif
211
Heiko Schocher3b5df502015-06-29 09:10:48 +0200212/* Defines for SPL */
213#define CONFIG_SPL_FRAMEWORK
214#define CONFIG_SPL_TEXT_BASE 0x0
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200215#define CONFIG_SPL_MAX_SIZE (SZ_4K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200216
217#define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200218#define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200219#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
220 CONFIG_SPL_BSS_MAX_SIZE)
221#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Heiko Schocher3b5df502015-06-29 09:10:48 +0200222
Heiko Schocher3b5df502015-06-29 09:10:48 +0200223#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200224#define CONFIG_SYS_USE_NANDFLASH 1
225#define CONFIG_SPL_NAND_DRIVERS
226#define CONFIG_SPL_NAND_BASE
227#define CONFIG_SPL_NAND_ECC
228#define CONFIG_SPL_NAND_RAW_ONLY
229#define CONFIG_SPL_NAND_SOFTECC
230#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200231#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Heiko Schocher3b5df502015-06-29 09:10:48 +0200232#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
233#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
234#define CONFIG_SYS_NAND_5_ADDR_CYCLE
235
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200236#define CONFIG_SYS_NAND_SIZE (SZ_256M)
237#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
238#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200239#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
240 CONFIG_SYS_NAND_PAGE_SIZE)
241#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
242#define CONFIG_SYS_NAND_ECCSIZE 256
243#define CONFIG_SYS_NAND_ECCBYTES 3
244#define CONFIG_SYS_NAND_OOBSIZE 64
245#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
246 48, 49, 50, 51, 52, 53, 54, 55, \
247 56, 57, 58, 59, 60, 61, 62, 63, }
248
249#define CONFIG_SPL_ATMEL_SIZE
250#define CONFIG_SYS_MASTER_CLOCK (198656000/2)
251#define AT91_PLL_LOCK_TIMEOUT 1000000
252#define CONFIG_SYS_AT91_PLLA 0x2060bf09
253#define CONFIG_SYS_MCKR 0x100
254#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
255#define CONFIG_SYS_AT91_PLLB 0x10483f0e
256
257#if defined(CONFIG_SPL_BUILD)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200258#define CONFIG_SYS_ICACHE_OFF
259#define CONFIG_SYS_DCACHE_OFF
Heiko Schocher3b5df502015-06-29 09:10:48 +0200260#endif
261#endif /* __CONFIG_H */