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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * ARM Ltd.
15 * Philippe Robin, <philippe.robin@arm.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35
36#include <common.h>
Ben Warren7194ab82009-10-04 22:37:03 -070037#include <netdev.h>
wdenk3d3befa2004-03-14 15:06:13 +000038
Wolfgang Denkd87080b2006-03-31 18:32:53 +020039DECLARE_GLOBAL_DATA_PTR;
40
wdenk3d3befa2004-03-14 15:06:13 +000041#if defined(CONFIG_SHOW_BOOT_PROGRESS)
42void show_boot_progress(int progress)
43{
44 printf("Boot reached stage %d\n", progress);
45}
46#endif
47
48#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
49
wdenk3d3befa2004-03-14 15:06:13 +000050/*
51 * Miscellaneous platform dependent initialisations
52 */
53
54int board_init (void)
55{
wdenk3d3befa2004-03-14 15:06:13 +000056 /*
57 * set clock frequency:
58 * VERSATILE_REFCLK is 32KHz
59 * VERSATILE_TIMCLK is 1MHz
60 */
61 *(volatile unsigned int *)(VERSATILE_SCTL_BASE) |=
62 ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
63 (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
64
65 /* arch number of Versatile Board */
wdenk731215e2004-10-10 18:41:04 +000066 gd->bd->bi_arch_number = MACH_TYPE_VERSATILE_PB;
wdenk3d3befa2004-03-14 15:06:13 +000067
68 /* adress of boot parameters */
69 gd->bd->bi_boot_params = 0x00000100;
70
wdenkbc54f302004-07-11 18:10:30 +000071 gd->flags = 0;
72
wdenk3d3befa2004-03-14 15:06:13 +000073 icache_enable ();
74
wdenk3d3befa2004-03-14 15:06:13 +000075 return 0;
76}
77
78
79int misc_init_r (void)
80{
81 setenv("verify", "n");
82 return (0);
83}
84
85/******************************
86 Routine:
87 Description:
88******************************/
wdenk3d3befa2004-03-14 15:06:13 +000089int dram_init (void)
90{
91 return 0;
92}
Ben Warren7194ab82009-10-04 22:37:03 -070093
94#ifdef CONFIG_CMD_NET
95int board_eth_init(bd_t *bis)
96{
97 int rc = 0;
98#ifdef CONFIG_SMC91111
99 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
100#endif
101 return rc;
102}
103#endif