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wdenk4ec3a7f2004-09-28 16:44:41 +00001/*
2 * (C) Copyright 2004
3 * Vincent Dubey, Xa SA, vincent.dubey@xa-ch.com
4 *
5 * (C) Copyright 2002
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
Ben Warren7194ab82009-10-04 22:37:03 -070032#include <netdev.h>
wdenk4ec3a7f2004-09-28 16:44:41 +000033
Wolfgang Denkd87080b2006-03-31 18:32:53 +020034DECLARE_GLOBAL_DATA_PTR;
wdenk4ec3a7f2004-09-28 16:44:41 +000035
36/*
37 * Miscelaneous platform dependent initialisations
38 */
39
40int board_init (void)
41{
Marek Vasut1123d412010-10-20 21:54:19 +020042 /* We have RAM, disable cache */
43 dcache_disable();
44 icache_disable();
wdenk4ec3a7f2004-09-28 16:44:41 +000045
46 /* arch number of xaeniax */
47 gd->bd->bi_arch_number = 585;
48
49 /* adress of boot parameters */
50 gd->bd->bi_boot_params = 0xa0000100;
51
52 return 0;
53}
54
55int board_late_init(void)
56{
57 setenv("stdout", "serial");
58 setenv("stderr", "serial");
59 return 0;
60}
61
Marek Vasut1123d412010-10-20 21:54:19 +020062extern void pxa_dram_init(void);
63int dram_init(void)
64{
65 pxa_dram_init();
66 gd->ram_size = PHYS_SDRAM_1_SIZE;
67 return 0;
68}
wdenk4ec3a7f2004-09-28 16:44:41 +000069
Marek Vasut1123d412010-10-20 21:54:19 +020070void dram_init_banksize(void)
wdenk4ec3a7f2004-09-28 16:44:41 +000071{
wdenk4ec3a7f2004-09-28 16:44:41 +000072 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
73 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
wdenk4ec3a7f2004-09-28 16:44:41 +000074}
Ben Warren7194ab82009-10-04 22:37:03 -070075
76#ifdef CONFIG_CMD_NET
77int board_eth_init(bd_t *bis)
78{
79 int rc = 0;
80#ifdef CONFIG_SMC91111
81 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
82#endif
83 return rc;
84}
85#endif