Simon Glass | adfb2bf | 2015-08-30 16:55:43 -0600 | [diff] [blame] | 1 | # |
| 2 | # Copyright (C) 2015 Google. Inc |
| 3 | # Written by Simon Glass <sjg@chromium.org> |
| 4 | # |
| 5 | # SPDX-License-Identifier: GPL-2.0+ |
| 6 | # |
| 7 | |
| 8 | U-Boot on Rockchip |
| 9 | ================== |
| 10 | |
| 11 | There are several repositories available with versions of U-Boot that support |
| 12 | many Rockchip devices [1] [2]. |
| 13 | |
| 14 | The current mainline support is experimental only and is not useful for |
| 15 | anything. It should provide a base on which to build. |
| 16 | |
| 17 | So far only support for the RK3288 is provided. |
| 18 | |
| 19 | |
| 20 | Prerequisites |
| 21 | ============= |
| 22 | |
| 23 | You will need: |
| 24 | |
| 25 | - Firefly RK3288 baord |
| 26 | - Power connection to 5V using the supplied micro-USB power cable |
| 27 | - Separate USB serial cable attached to your computer and the Firefly |
| 28 | (connect to the micro-USB connector below the logo) |
| 29 | - rkflashtool [3] |
| 30 | - openssl (sudo apt-get install openssl) |
| 31 | - Serial UART connection [4] |
| 32 | - Suitable ARM cross compiler, e.g.: |
| 33 | sudo apt-get install gcc-4.7-arm-linux-gnueabi |
| 34 | |
| 35 | |
| 36 | Building |
| 37 | ======== |
| 38 | |
| 39 | At present three RK3288 boards are supported: |
| 40 | |
| 41 | - Firefly RK3288 - use firefly-rk3288 configuration |
Sjoerd Simons | f2b3017 | 2015-08-30 16:55:44 -0600 | [diff] [blame] | 42 | - Radxa Rock 2 - also uses firefly-rk3288 configuration |
Simon Glass | adfb2bf | 2015-08-30 16:55:43 -0600 | [diff] [blame] | 43 | - Haier Chromebook - use chromebook_jerry configuration |
| 44 | |
| 45 | For example: |
| 46 | |
| 47 | CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all |
| 48 | |
| 49 | (or you can use another cross compiler if you prefer) |
| 50 | |
Sjoerd Simons | f2b3017 | 2015-08-30 16:55:44 -0600 | [diff] [blame] | 51 | Note that the Radxa Rock 2 uses the Firefly configuration for now as |
| 52 | device tree files are not yet available for the Rock 2. Clearly the two |
Simon Glass | adfb2bf | 2015-08-30 16:55:43 -0600 | [diff] [blame] | 53 | have hardware differences, so this approach will break down as more drivers |
| 54 | are added. |
| 55 | |
| 56 | |
| 57 | Writing to the board with USB |
| 58 | ============================= |
| 59 | |
| 60 | For USB to work you must get your board into ROM boot mode, either by erasing |
| 61 | your MMC or (perhaps) holding the recovery button when you boot the board. |
| 62 | To erase your MMC, you can boot into Linux and type (as root) |
| 63 | |
| 64 | dd if=/dev/zero of=/dev/mmcblk0 bs=1M |
| 65 | |
| 66 | Connect your board's OTG port to your computer. |
| 67 | |
| 68 | To create a suitable image and write it to the board: |
| 69 | |
Simon Glass | f2acc55e | 2015-08-30 16:55:52 -0600 | [diff] [blame] | 70 | ./firefly-rk3288/tools/mkimage -T rkimage -d \ |
| 71 | ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
Simon Glass | adfb2bf | 2015-08-30 16:55:43 -0600 | [diff] [blame] | 72 | cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l |
| 73 | |
| 74 | If all goes well you should something like: |
| 75 | |
| 76 | U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49) |
| 77 | Card did not respond to voltage select! |
| 78 | spl: mmc init failed with error: -17 |
| 79 | ### ERROR ### Please RESET the board ### |
| 80 | |
| 81 | You will need to reset the board before each time you try. Yes, that's all |
| 82 | it does so far. If support for the Rockchip USB protocol or DFU were added |
| 83 | in SPL then we could in principle load U-Boot and boot to a prompt from USB |
| 84 | as several other platforms do. However it does not seem to be possible to |
| 85 | use the existing boot ROM code from SPL. |
| 86 | |
| 87 | |
| 88 | Booting from an SD card |
| 89 | ======================= |
| 90 | |
| 91 | To write an image that boots from an SD card (assumed to be /dev/sdc): |
| 92 | |
Simon Glass | f2acc55e | 2015-08-30 16:55:52 -0600 | [diff] [blame] | 93 | ./firefly-rk3288/tools/mkimage -T rksd -d \ |
| 94 | firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
| 95 | sudo dd if=out of=/dev/sdc seek=64 && \ |
Simon Glass | adfb2bf | 2015-08-30 16:55:43 -0600 | [diff] [blame] | 96 | sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256 |
| 97 | |
| 98 | This puts the Rockchip header and SPL image first and then places the U-Boot |
| 99 | image at block 256 (i.e. 128KB from the start of the SD card). This |
| 100 | corresponds with this setting in U-Boot: |
| 101 | |
| 102 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 |
| 103 | |
| 104 | Put this SD (or micro-SD) card into your board and reset it. You should see |
| 105 | something like: |
| 106 | |
| 107 | U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40) |
| 108 | |
| 109 | |
| 110 | U-Boot 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40) |
| 111 | |
| 112 | DRAM: 2 GiB |
| 113 | MMC: |
| 114 | Using default environment |
| 115 | |
| 116 | In: serial@ff690000 |
| 117 | Out: serial@ff690000 |
| 118 | Err: serial@ff690000 |
| 119 | => |
| 120 | |
| 121 | |
| 122 | Booting from SPI |
| 123 | ================ |
| 124 | |
| 125 | To write an image that boots from SPI flash (e.g. for the Haier Chromebook): |
| 126 | |
| 127 | ./chromebook_jerry/tools/mkimage -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out |
| 128 | dd if=spl.bin of=out.bin bs=128K conv=sync |
| 129 | cat chromebook_jerry/u-boot-dtb.img out.bin |
| 130 | dd if=out.bin of=out.bin.pad bs=4M conv=sync |
| 131 | |
| 132 | This converts the SPL image to the required SPI format by adding the Rockchip |
| 133 | header and skipping every 2KB block. Then the U-Boot image is written at |
| 134 | offset 128KB and the whole image is padded to 4MB which is the SPI flash size. |
| 135 | The position of U-Boot is controlled with this setting in U-Boot: |
| 136 | |
| 137 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) |
| 138 | |
| 139 | If you have a Dediprog em100pro connected then you can write the image with: |
| 140 | |
| 141 | sudo em100 -s -c GD25LQ32 -d out.bin.pad -r |
| 142 | |
| 143 | When booting you should see something like: |
| 144 | |
| 145 | U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32) |
| 146 | |
| 147 | |
| 148 | U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600) |
| 149 | |
| 150 | Model: Google Jerry |
| 151 | DRAM: 2 GiB |
| 152 | MMC: |
| 153 | Using default environment |
| 154 | |
| 155 | In: serial@ff690000 |
| 156 | Out: serial@ff690000 |
| 157 | Err: serial@ff690000 |
| 158 | => |
| 159 | |
| 160 | |
| 161 | Future work |
| 162 | =========== |
| 163 | |
| 164 | Immediate priorities are: |
| 165 | |
Simon Glass | adfb2bf | 2015-08-30 16:55:43 -0600 | [diff] [blame] | 166 | - GPIO (driver exists but is lightly tested) |
| 167 | - I2C (driver exists but is non-functional) |
| 168 | - USB host |
| 169 | - USB device |
| 170 | - PMIC and regulators (only ACT8846 is supported at present) |
| 171 | - LCD and HDMI |
| 172 | - Run CPU at full speed |
| 173 | - Ethernet |
| 174 | - NAND flash |
| 175 | - Support for other Rockchip parts |
| 176 | - Boot U-Boot proper over USB OTG (at present only SPL works) |
| 177 | |
| 178 | |
| 179 | Development Notes |
| 180 | ================= |
| 181 | |
| 182 | There are plenty of patches in the links below to help with this work. |
| 183 | |
| 184 | [1] https://github.com/rkchrome/uboot.git |
| 185 | [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288 |
| 186 | [3] https://github.com/linux-rockchip/rkflashtool.git |
| 187 | [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en |
| 188 | |
| 189 | rkimage |
| 190 | ------- |
| 191 | |
| 192 | rkimage.c produces an SPL image suitable for sending directly to the boot ROM |
| 193 | over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes) |
| 194 | followed by u-boot-spl-dtb.bin. |
| 195 | |
| 196 | The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM |
| 197 | starts at 0xff700000 and extends to 0xff718000 where we put the stack. |
| 198 | |
| 199 | rksd |
| 200 | ---- |
| 201 | |
| 202 | rksd.c produces an image consisting of 32KB of empty space, a header and |
| 203 | u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although |
| 204 | most of the fields are unused by U-Boot. We just need to specify the |
| 205 | signature, a flag and the block offset and size of the SPL image. |
| 206 | |
| 207 | The header occupies a single block but we pad it out to 4 blocks. The header |
| 208 | is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL |
| 209 | image can be encoded too but we don't do that. |
| 210 | |
| 211 | The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB, |
| 212 | or 0x40 blocks. This is a severe and annoying limitation. There may be a way |
| 213 | around this limitation, since there is plenty of SRAM, but at present the |
| 214 | board refuses to boot if this limit is exceeded. |
| 215 | |
| 216 | The image produced is padded up to a block boundary (512 bytes). It should be |
| 217 | written to the start of an SD card using dd. |
| 218 | |
| 219 | Since this image is set to load U-Boot from the SD card at block offset, |
| 220 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write |
| 221 | u-boot-dtb.img to the SD card at that offset. See above for instructions. |
| 222 | |
| 223 | rkspi |
| 224 | ----- |
| 225 | |
| 226 | rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The |
| 227 | resulting image is then spread out so that only the first 2KB of each 4KB |
| 228 | sector is used. The header is the same as with rksd and the maximum size is |
| 229 | also 32KB (before spreading). The image should be written to the start of |
| 230 | SPI flash. |
| 231 | |
| 232 | See above for instructions on how to write a SPI image. |
| 233 | |
| 234 | |
| 235 | Device tree and driver model |
| 236 | ---------------------------- |
| 237 | |
| 238 | Where possible driver model is used to provide a structure to the |
| 239 | functionality. Device tree is used for configuration. However these have an |
| 240 | overhead and in SPL with a 32KB size limit some shortcuts have been taken. |
| 241 | In general all Rockchip drivers should use these features, with SPL-specific |
| 242 | modifications where required. |
| 243 | |
| 244 | |
| 245 | -- |
| 246 | Simon Glass <sjg@chromium.org> |
| 247 | 24 June 2015 |