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Daniel Hellstrom6ed8a432008-03-26 23:38:48 +01001/* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
4 *
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2008
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
10 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020011 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010012 */
13
14#ifndef __CONFIG_H__
15#define __CONFIG_H__
16
Francois Retiefa62bba12015-10-29 00:02:48 +020017#define CONFIG_SYS_GENERIC_BOARD
18
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010019/*
20 * High Level Configuration Options
21 * (easy to change)
22 */
23
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010024#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
25
26#define CONFIG_LEON_RAM_SRAM 1
27#define CONFIG_LEON_RAM_SDRAM 2
28#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
29
30/* Select Memory to run from
31 *
32 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
33 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
34 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
35 *
36 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
37 * it doesn't fit into the 4Mb SRAM.
38 *
39 * SRAM is default since it will work for all systems, however will not
40 * be able to boot linux.
41 */
42#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
43
44/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020045#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010046
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010047/*
48 * Serial console configuration
49 */
50#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010052
53/* Partitions */
54#define CONFIG_DOS_PARTITION
55#define CONFIG_MAC_PARTITION
56#define CONFIG_ISO_PARTITION
57
58/*
59 * Supported commands
60 */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010061#define CONFIG_CMD_REGINFO
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010062#define CONFIG_CMD_PING
63#define CONFIG_CMD_DIAG
64#define CONFIG_CMD_IRQ
65
66/*
67 * Autobooting
68 */
69#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
70
71#define CONFIG_PREBOOT "echo;" \
72 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
73 "echo"
74
75#undef CONFIG_BOOTARGS
76
77#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
78 "netdev=eth0\0" \
79 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
80 "nfsroot=${serverip}:${rootpath}\0" \
81 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
82 "addip=setenv bootargs ${bootargs} " \
83 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
84 ":${hostname}:${netdev}:off panic=1\0" \
85 "flash_nfs=run nfsargs addip;" \
86 "bootm ${kernel_addr}\0" \
87 "flash_self=run ramargs addip;" \
88 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000089 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010090 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
91
92#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
93#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
94 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
95 "scratch=40200000\0" \
96 ""
97#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
98#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
99 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
100 "scratch=60800000\0" \
101 ""
102#else
103/* More than 4Mb is assumed when running from SDRAM */
104#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
105 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
106 "scratch=40800000\0" \
107 ""
108#endif
109
110#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
111
112#define CONFIG_NETMASK 255.255.255.0
113#define CONFIG_GATEWAYIP 192.168.0.1
114#define CONFIG_SERVERIP 192.168.0.20
115#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000116#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100117#define CONFIG_HOSTNAME ax2000
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000118#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100119
120#define CONFIG_BOOTCOMMAND "run flash_self"
121
122/* Memory MAP
123 *
124 * Flash:
125 * |--------------------------------|
126 * | 0x00000000 Text & Data & BSS | *
127 * | for Monitor | *
128 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
129 * | UNUSED / Growth | * 256kb
130 * |--------------------------------|
131 * | 0x00050000 Base custom area | *
132 * | kernel / FS | *
133 * | | * Rest of Flash
134 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
135 * | END-0x00008000 Environment | * 32kb
136 * |--------------------------------|
137 *
138 *
139 *
140 * Main Memory (4Mb SRAM or XMb SDRAM):
141 * |--------------------------------|
142 * | UNUSED / scratch area |
143 * | |
144 * | |
145 * | |
146 * | |
147 * |--------------------------------|
148 * | Monitor .Text / .DATA / .BSS | * 256kb
149 * | Relocated! | *
150 * |--------------------------------|
151 * | Monitor Malloc | * 128kb (contains relocated environment)
152 * |--------------------------------|
153 * | Monitor/kernel STACK | * 64kb
154 * |--------------------------------|
155 * | Page Table for MMU systems | * 2k
156 * |--------------------------------|
157 * | PROM Code accessed from Linux | * 6kb-128b
158 * |--------------------------------|
159 * | Global data (avail from kernel)| * 128b
160 * |--------------------------------|
161 *
162 */
163
164/*
165 * Flash configuration (8,16 or 32 MB)
166 * TEXT base always at 0xFFF00000
167 * ENV_ADDR always at 0xFFF40000
168 * FLASH_BASE at 0xFC000000 for 64 MB
169 * 0xFE000000 for 32 MB
170 * 0xFF000000 for 16 MB
171 * 0xFF800000 for 8 MB
172 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173/*#define CONFIG_SYS_NO_FLASH 1*/
174#define CONFIG_SYS_FLASH_BASE 0x00000000
175#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100176
177#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
179#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100180
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
182#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
183#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
184#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
185#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100186
187/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200189#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100191/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100193/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100195
196/*
197 * Environment settings
198 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200199/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200200#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200201/* CONFIG_ENV_ADDR need to be at sector boundary */
202#define CONFIG_ENV_SIZE 0x8000
203#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100205#define CONFIG_ENV_OVERWRITE 1
206
207/*
208 * Memory map
209 *
210 * Always 4Mb SRAM available
211 * SDRAM module may be available on 0x60000000, SDRAM
212 * is configured as if a 128Mb SDRAM module is available.
213 */
214
215#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_SDRAM_BASE 0x40000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100217#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_SDRAM_BASE 0x60000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100219#endif
220
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_SDRAM_SIZE 0x08000000
222#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100223
224/* 4Mb SRAM available */
225#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_SRAM_BASE 0x40000000
227#define CONFIG_SYS_SRAM_SIZE 0x400000
228#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100229#endif
230
231/* Select RAM used to run U-BOOT from... */
232#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200233#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
234#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
235#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100236#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
238#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
239#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100240#endif
241
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200242#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100243
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200244#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200245#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100246
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
248#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100249
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200250#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
252# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100253#endif
254
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
256#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
257#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100258
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
260#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100261
262/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200263#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
264#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100265
266/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200267#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100268
269/*
270 * Ethernet configuration uses on board SMC91C111
271 */
Ben Warren7194ab82009-10-04 22:37:03 -0700272#define CONFIG_SMC91111 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100273#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
274#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
275#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
276/*#define CONFIG_SHOW_ACTIVITY*/
277#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
278
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100279#define CONFIG_PHY_ADDR 0x00
280
281/*
282 * Miscellaneous configurable options
283 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100285#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100287#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100289#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200290#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
291#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
292#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100293
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200294#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
295#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100296
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200297#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100298
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100299/*
300 * Various low-level settings
301 */
302
303/*-----------------------------------------------------------------------
304 * USB stuff
305 *-----------------------------------------------------------------------
306 */
307#define CONFIG_USB_CLOCK 0x0001BBBB
308#define CONFIG_USB_CONFIG 0x00005000
309
310/***** Gaisler GRLIB IP-Cores Config ********/
311
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200312#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100313
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100314/* No SDRAM Configuration */
315#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
316
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100317/* See, GRLIB Docs (grip.pdf) on how to set up
318 * These the memory controller registers.
319 */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100320#define CONFIG_SYS_GRLIB_ESA_MCTRL1
321#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100322#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100323#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100324#else
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100325#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100326#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100327#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100328
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100329/* GRLIB FT-MCTRL configuration */
330#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
331#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100332#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100333#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100334#else
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100335#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100336#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100337#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100338
339/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100340#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100341
342/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100343#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100344
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100345/* Identification string */
346#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
347
348/* default kernel command line */
349#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
350
351#endif /* __CONFIG_H */