blob: 30f6450cf38e54933932321f9e15615ce6510b1d [file] [log] [blame]
Jonas Schwöbel3486fd02022-01-24 18:06:33 +01001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
4 *
5 * Copyright (c) 2021, Open Surface RT
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include "tegra30-common.h"
12
13/* High-level configuration options */
14#define CFG_TEGRA_BOARD_STRING "Microsoft Surface RT"
15
16#define SURFACE_RT_BOOTMENU \
17 "bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu\0" \
18 "bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu\0" \
19 "bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \
20 "bootmenu_3=boot from USB=usb reset; usb start; bootflow scan\0" \
21 "bootmenu_4=reboot RCM=enterrcm\0" \
22 "bootmenu_5=reboot=reset\0" \
23 "bootmenu_6=power off=poweroff\0" \
24 "bootmenu_delay=-1\0"
25
26#define BOARD_EXTRA_ENV_SETTINGS \
27 "button_cmd_0_name=Volume Down\0" \
28 "button_cmd_0=bootmenu\0" \
29 "button_cmd_1_name=Hall Sensor\0" \
30 "button_cmd_1=poweroff\0" \
31 "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \
32 SURFACE_RT_BOOTMENU
33
34/* Board-specific serial config */
35#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
36
37#include "tegra-common-post.h"
38
39#endif /* __CONFIG_H */