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Marcel Ziswiler2bc2f812022-02-07 11:54:13 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2022 Toradex
4 */
5
6#ifndef __VERDIN_IMX8MP_H
7#define __VERDIN_IMX8MP_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
12#define CONFIG_SPL_MAX_SIZE (152 * 1024)
13#define CONFIG_SYS_MONITOR_LEN SZ_512K
14#define CONFIG_SYS_UBOOT_BASE \
15 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
16
17#ifdef CONFIG_SPL_BUILD
18/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010019#define CONFIG_SPL_STACK 0x960000
20#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
21#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K
22#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
23#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
24
25/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
26#define CONFIG_MALLOC_F_ADDR 0x184000
27/* For RAW image gives a error info not panic */
28#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
29
30#define CONFIG_POWER_PCA9450
31
32#define CONFIG_SYS_I2C
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010033#endif /* CONFIG_SPL_BUILD */
34
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010035/* ENET Config */
36/* ENET1 */
37#if defined(CONFIG_CMD_NET)
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010038#define CONFIG_FEC_MXC_PHYADDR 7
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010039
40#define PHY_ANEG_TIMEOUT 20000
41#endif /* CONFIG_CMD_NET */
42
43#define MEM_LAYOUT_ENV_SETTINGS \
44 "fdt_addr_r=0x43000000\0" \
45 "kernel_addr_r=0x40000000\0" \
46 "ramdisk_addr_r=0x46400000\0" \
47 "scriptaddr=0x46000000\0"
48
49/* Enable Distro Boot */
50#ifndef CONFIG_SPL_BUILD
51#define BOOT_TARGET_DEVICES(func) \
52 func(MMC, mmc, 1) \
53 func(MMC, mmc, 2) \
54 func(DHCP, dhcp, na)
55#include <config_distro_bootcmd.h>
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010056#else
57#define BOOTENV
58#endif
59
60#if defined(CONFIG_TDX_EASY_INSTALLER)
61# define BOOT_SCRIPT "boot-tezi.scr"
62#else
63# define BOOT_SCRIPT "boot.scr"
64#endif
65
66/* Initial environment variables */
67#define CONFIG_EXTRA_ENV_SETTINGS \
68 BOOTENV \
69 MEM_LAYOUT_ENV_SETTINGS \
70 "bootcmd_mfg=fastboot 0\0" \
71 "boot_file=Image\0" \
72 "boot_scripts=" BOOT_SCRIPT "\0" \
73 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
74 "console=ttymxc2\0" \
75 "fdt_board=dev\0" \
76 "initrd_addr=0x43800000\0" \
77 "initrd_high=0xffffffffffffffff\0" \
Philippe Schenkera3f2dcf2022-05-25 09:55:02 +020078 "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010079 "consoleblank=0 earlycon\0" \
80 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
81 "if test \"$confirm\" = \"y\"; then " \
82 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
83 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
84 "${blkcnt}; fi\0"
85
86#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
87#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
88#define CONFIG_SYS_INIT_SP_OFFSET \
89 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
90#define CONFIG_SYS_INIT_SP_ADDR \
91 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
92
93#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
94
95/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
96#define CONFIG_SYS_SDRAM_BASE 0x40000000
97#define PHYS_SDRAM 0x40000000
98#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
99#define PHYS_SDRAM_2 0x100000000
100#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
101
102/* UART */
Marek Vasut52b6b482022-04-24 23:44:03 +0200103#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +0100104
105/* Monitor Command Prompt */
106#define CONFIG_SYS_CBSIZE SZ_2K
107#define CONFIG_SYS_MAXARGS 64
108#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
109#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
110 sizeof(CONFIG_SYS_PROMPT) + 16)
111
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +0100112#endif /* __VERDIN_IMX8MP_H */