wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 1 | |
| 2 | U-Boot for Motorola M68K |
| 3 | |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 4 | ==================================================================== |
| 5 | History |
| 6 | |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 7 | August 08,2005; Jens Scharsig <esw@bus-elektronik.de> |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 8 | MCF5282 implementation without preloader |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 9 | January 12, 2004; <josef.baumgartner@telex.de> |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 10 | ==================================================================== |
| 11 | |
| 12 | This file contains status information for the port of U-Boot to the |
| 13 | Motorola M68K series of CPUs. |
| 14 | |
| 15 | 1. OVERVIEW |
| 16 | ----------- |
| 17 | Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola Coldfire |
| 18 | architecture. The patches of Bernhard support the MCF5272 and |
| 19 | MCF5282. A great disadvantage of these patches was that they needed |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 20 | a pre-bootloader to start U-Boot. Because of this, a new port was |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 21 | created which no longer needs a first stage booter. |
| 22 | |
| 23 | Although this port is intended to cover all M68k processors, only |
| 24 | the parts for the Motorola Coldfire MCF5272 and MCF5282 are |
| 25 | implemented at the moment. Additional CPUs and boards will be |
| 26 | hopefully added soon! |
| 27 | |
| 28 | |
| 29 | 2. SUPPORTED CPUs |
| 30 | ----------------- |
| 31 | |
| 32 | 2.1 Motorola Coldfire MCF5272 |
| 33 | ----------------------------- |
Peter Tyser | a414553 | 2010-04-12 22:28:12 -0500 | [diff] [blame] | 34 | CPU specific code is located in: arch/m68k/cpu/mcf52x2 |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 35 | |
| 36 | |
| 37 | 2.1 Motorola Coldfire MCF5282 |
| 38 | ----------------------------- |
Peter Tyser | a414553 | 2010-04-12 22:28:12 -0500 | [diff] [blame] | 39 | CPU specific code is located in: arch/m68k/cpu/mcf52x2 |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 40 | |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 41 | The MCF5282 Port no longer needs a preloader and can place in external or |
| 42 | internal FLASH. |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 43 | |
| 44 | |
| 45 | 3. SUPPORTED BOARDs |
| 46 | ------------------- |
| 47 | |
| 48 | 3.1 Motorola M5272C3 EVB |
| 49 | ------------------------ |
| 50 | Board specific code is located in: board/m5272c3 |
| 51 | |
| 52 | To configure the board, type: make M5272C3_config |
| 53 | |
| 54 | U-Boot Memory Map: |
| 55 | ------------------ |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 56 | 0xffe00000 - 0xffe3ffff U-Boot |
| 57 | 0xffe04000 - 0xffe05fff environment (embedded in U-Boot!) |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 58 | 0xffe40000 - 0xffffffff free for linux/applications |
| 59 | |
| 60 | |
| 61 | 3.2 Motorola M5282 EVB |
| 62 | ------------------------ |
| 63 | Board specific code is located in: board/m5282evb |
| 64 | |
| 65 | To configure the board, type: make M5272C3_config |
| 66 | |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 67 | At the moment the code isn't fully implemented and still needs a pre-loader! |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 68 | The preloader must initialize the processor and then start U-Boot. The board |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 69 | must be configured for a pre-loader (see 4.1) |
| 70 | |
| 71 | For the preloader, please see |
| 72 | http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html |
| 73 | |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 74 | U-Boot is configured to run at 0x20000 at default. This can be configured by |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 75 | change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 76 | include/configs/M5282EVB.h. |
| 77 | |
| 78 | 3.2 BuS EB+MCF-EV123 |
| 79 | --------------------- |
| 80 | |
| 81 | Board specific code is located in: board/bus/EB+MCF-EV123 |
| 82 | |
| 83 | To configure the board, type: |
| 84 | |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 85 | make EB+MCF-EV123_config for external FLASH |
| 86 | make EB+MCF-EV123_internal_config for internal FLASH |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 87 | |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 88 | |
| 89 | 4. CONFIGURATION OPTIONS/SETTINGS |
| 90 | ---------------------------------- |
| 91 | |
| 92 | 4.1 Configuration to use a pre-loader |
| 93 | ------------------------------------- |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 94 | If U-Boot should be loaded to RAM and started by a pre-loader |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 95 | CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the |
| 96 | initial vector table and basic processor initialization will not |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 97 | be compiled in. The start address of U-Boot must be adjusted in |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 98 | the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 99 | (CONFIG_SYS_TEXT_BASE) to the load address. |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 100 | |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 101 | 4.1 MCF5272 specific Options/Settings |
| 102 | ------------------------------------- |
| 103 | |
| 104 | CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs |
| 105 | CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs |
| 106 | |
| 107 | CONFIG_MONITOR_IS_IN_RAM |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 108 | -- defined if U-Boot is loaded by a pre-loader |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 109 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 110 | CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration registers |
| 111 | CONFIG_SYS_INIT_RAM_ADDR |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 112 | -- defines the base address of the MCF5272 internal SRAM |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 113 | CONFIG_SYS_ENET_BD_BASE |
Mike Williams | 1626308 | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 114 | -- defines the base address of the FEC buffer descriptors |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 115 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 116 | CONFIG_SYS_SCR -- defines the contents of the System Configuration Register |
| 117 | CONFIG_SYS_SPR -- defines the contents of the System Protection Register |
| 118 | CONFIG_SYS_BRx_PRELIM -- defines the contents of the Chip Select Base Registers |
| 119 | CONFIG_SYS_ORx_PRELIM -- defines the contents of the Chip Select Option Registers |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 120 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 121 | CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers |
| 122 | CONFIG_SYS_PxDAT -- defines the contents of the Data Registers |
| 123 | CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 124 | |
| 125 | |
| 126 | 4.2 MCF5282 specific Options/Settings |
| 127 | ------------------------------------- |
| 128 | |
| 129 | CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs |
| 130 | CONFIG_M5282 -- defined for all Motorola MCF5282 CPUs |
| 131 | |
| 132 | CONFIG_MONITOR_IS_IN_RAM |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame^] | 133 | -- defined if U-Boot is loaded by a pre-loader |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 134 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 135 | CONFIG_SYS_MBAR -- defines the base address of the MCF5282 internal register space |
| 136 | CONFIG_SYS_INIT_RAM_ADDR |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 137 | -- defines the base address of the MCF5282 internal SRAM |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | CONFIG_SYS_INT_FLASH_BASE |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 139 | -- defines the base address of the MCF5282 internal Flash memory |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | CONFIG_SYS_ENET_BD_BASE |
Mike Williams | 1626308 | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 141 | -- defines the base address of the FEC buffer descriptors |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 142 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | CONFIG_SYS_MFD |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 144 | -- defines the PLL Multiplication Factor Devider |
| 145 | (see table 9-4 of MCF user manual) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | CONFIG_SYS_RFD -- defines the PLL Reduce Frecuency Devider |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 147 | (see table 9-4 of MCF user manual) |
| 148 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | CONFIG_SYS_CSx_BASE -- defines the base address of chip select x |
| 150 | CONFIG_SYS_CSx_SIZE -- defines the memory size (address range) of chip select x |
| 151 | CONFIG_SYS_CSx_WIDTH -- defines the bus with of chip select x |
| 152 | CONFIG_SYS_CSx_RO -- if set to 0 chip select x is read/wirte |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 153 | else chipselct is read only |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 154 | CONFIG_SYS_CSx_WS -- defines the number of wait states of chip select x |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 155 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers |
| 157 | CONFIG_SYS_PxDAT -- defines the contents of the Data Registers |
| 158 | CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 159 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | CONFIG_SYS_PxPAR -- defines the function of ports |
Heiko Schocher | 9acb626 | 2006-04-20 08:42:42 +0200 | [diff] [blame] | 161 | |
wdenk | bf9e3b3 | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 162 | |
| 163 | 5. COMPILER |
| 164 | ----------- |
| 165 | To create U-Boot the gcc-2.95.3 compiler set (m68k-elf-20030314) from uClinux.org was used. |
| 166 | You can download it from: http://www.uclinux.org/pub/uClinux/m68k-elf-tools/ |