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gerrit.cesnet.cz / github / trini / u-boot / a13644c065173fad6bcaf163569bd01e6eb93834 / . / arch / arm / dts / imx53-m53menlo.dts
blob: 3767dcaef4c3b1b8c5542be0f9563eb4f3bb3e04 [file] [log] [blame]
Marek Vasut26bb95f2019-06-09 18:46:42 +0200[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2019 Marek Vasut <marex@denx.de>
4 */
5
6/dts-v1/;
7#include "imx53-m53.dtsi"
8#include "imx53-m53menlo-u-boot.dtsi"
9
10/ {
11 model = "MENLO M53 EMBEDDED DEVICE";
12 compatible = "menlo,m53menlo", "fsl,imx53";
13
14 leds {
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_led>;
18
19 user1 {
20 label = "TestLed601";
21 gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
22 linux,default-trigger = "mmc0";
23 };
24
25 user2 {
26 label = "TestLed602";
27 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
28 linux,default-trigger = "heartbeat";
29 };
30
31 eth {
32 label = "EthLedYe";
33 gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
34 linux,default-trigger = "none";
35 };
36 };
37
38 panel {
39 compatible = "edt,etm070080dh6";
40 enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
41
42 port {
43 panel_in: endpoint {
44 remote-endpoint = <&lvds0_out>;
45 };
46 };
47 };
48
49 reg_usbh1_vbus: regulator-usbh1-vbus {
50 compatible = "regulator-fixed";
51 regulator-name = "vbus";
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
54 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
55 };
56};
57
58&can1 {
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_can1>;
61 status = "okay";
62};
63
64&can2 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_can2>;
67 status = "okay";
68};
69
70&clks {
71 assigned-clocks = <&clks IMX5_CLK_CKO1_SEL>,
72 <&clks IMX5_CLK_CKO1_PODF>,
73 <&clks IMX5_CLK_CKO1>;
74 assigned-clock-parents = <&clks IMX5_CLK_AHB>;
75 assigned-clock-rates = <133333334>, <33333334>, <33333334>;
76};
77
78&esdhc1 {
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_esdhc1>;
81 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
82 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
83 status = "okay";
84};
85
86&fec {
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_fec>;
Marek Vasuta13644c2020-05-30 22:44:46 +0200[diff] [blame^]89 phy-handle = <&ethphy0>;
Marek Vasut26bb95f2019-06-09 18:46:42 +0200[diff] [blame]90 phy-mode = "rmii";
91 status = "okay";
Marek Vasuta13644c2020-05-30 22:44:46 +0200[diff] [blame^]92
93 mdio {
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 ethphy0: ethernet-phy@0 {
98 compatible = "ethernet-phy-ieee802.3-c22";
99 reg = <0>;
100 };
101 };
Marek Vasut26bb95f2019-06-09 18:46:42 +0200[diff] [blame]102};
103
104&i2c1 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_i2c1>;
107 status = "okay";
108
109 touchscreen@38 {
110 compatible = "edt,edt-ft5x06";
111 reg = <0x38>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_edt_ft5x06>;
114 interrupt-parent = <&gpio6>;
115 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
116 reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
117 wake-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
118 };
119
120 eeprom@50 {
121 compatible = "atmel,24c64";
122 reg = <0x50>;
123 pagesize = <32>;
124 };
125
126 dac@60 {
127 compatible = "microchip,mcp4725";
128 reg = <0x60>;
129 };
130};
131
132&i2c2 {
133 touchscreen@41 {
134 status = "disabled";
135 };
136};
137
138&i2c3 {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_i2c3>;
141 status = "okay";
142};
143
144&iomuxc {
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_hog>;
147
148 imx53-m53evk {
149 hoggrp {
150 fsl,pins = <
151 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
152 MX53_PAD_EIM_EB3__GPIO2_31 0x1d5
153 MX53_PAD_PATA_DA_0__GPIO7_6 0x1d5
154 MX53_PAD_GPIO_19__CCM_CLKO 0x1d5
155 MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 0x1d5
156 MX53_PAD_CSI0_DAT4__GPIO5_22 0x1d5
157 MX53_PAD_CSI0_DAT5__GPIO5_23 0x1d5
158 MX53_PAD_CSI0_DAT6__GPIO5_24 0x1d5
159 MX53_PAD_CSI0_DAT7__GPIO5_25 0x1d5
160 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1d5
161 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1d5
162 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1d5
163 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1d5
164 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1d5
165 >;
166 };
167
168 pinctrl_led: ledgrp {
169 fsl,pins = <
170 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1d5
171 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1d5
172 >;
173 };
174
175 pinctrl_can1: can1grp {
176 fsl,pins = <
177 MX53_PAD_GPIO_7__CAN1_TXCAN 0x1c4
178 MX53_PAD_GPIO_8__CAN1_RXCAN 0x1c4
179 >;
180 };
181
182 pinctrl_can2: can2grp {
183 fsl,pins = <
184 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1c4
185 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x1c4
186 >;
187 };
188
189 pinctrl_display_gpio: display-gpiogrp {
190 fsl,pins = <
191 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1d5 /* Reset */
192 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1d5 /* Interrupt */
193 >;
194 };
195
196 pinctrl_edt_ft5x06: edt-ft5x06grp {
197 fsl,pins = <
198 MX53_PAD_PATA_DATA9__GPIO2_9 0x1d5 /* Reset */
199 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1d5 /* Interrupt */
200 MX53_PAD_PATA_DATA10__GPIO2_10 0x1d5 /* Wake */
201 >;
202 };
203
204 pinctrl_esdhc1: esdhc1grp {
205 fsl,pins = <
206 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
207 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
208 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
209 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
210 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
211 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
212 >;
213 };
214
215 pinctrl_fec: fecgrp {
216 fsl,pins = <
217 MX53_PAD_FEC_MDC__FEC_MDC 0x4
218 MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
219 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
220 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
221 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
222 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
223 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
224 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
225 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
226 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
227 >;
228 };
229
230 pinctrl_i2c1: i2c1grp {
231 fsl,pins = <
232 MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4
233 MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4
234 >;
235 };
236
237 pinctrl_i2c3: i2c3grp {
238 fsl,pins = <
239 MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4
240 MX53_PAD_GPIO_5__I2C3_SCL 0x400001e4
241 >;
242 };
243
244 pinctrl_lvds0: lvds0grp {
245 /* LVDS pins only have pin mux configuration */
246 fsl,pins = <
247 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
248 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
249 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
250 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
251 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
252 >;
253 };
254
255 pinctrl_uart1: uart1grp {
256 fsl,pins = <
257 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
258 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
259 >;
260 };
261
262 pinctrl_uart2: uart2grp {
263 fsl,pins = <
264 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
265 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
266 >;
267 };
268
269 pinctrl_usb: usbgrp {
270 fsl,pins = <
271 MX53_PAD_GPIO_2__GPIO1_2 0x1d5
272 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1d5
273 >;
274 };
275 };
276};
277
278&ldb {
279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_lvds0>;
281 status = "okay";
282
283 lvds0: lvds-channel@0 {
284 reg = <0>;
285 fsl,data-mapping = "spwg";
286 fsl,data-width = <18>;
287 status = "okay";
288
289 port@2 {
290 reg = <2>;
291
292 lvds0_out: endpoint {
293 remote-endpoint = <&panel_in>;
294 };
295 };
296 };
297};
298
299&uart1 {
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_uart1>;
302 status = "okay";
303};
304
305&uart2 {
306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_uart2>;
308 status = "okay";
309};
310
311&usbh1 {
312 pinctrl-names = "default";
313 pinctrl-0 = <&pinctrl_usb>;
314 vbus-supply = <&reg_usbh1_vbus>;
315 phy_type = "utmi";
316 dr_mode = "peripheral";
317 status = "okay";
318};
319
320&usbotg {
321 dr_mode = "peripheral";
322 status = "okay";
323};