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wdenk324f6cf2002-10-07 21:13:39 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
wdenk228f29a2002-12-08 09:53:23 +000022 *
23 * Be sure to mark tests to be run before relocation as such with the
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020024 * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the
wdenk228f29a2002-12-08 09:53:23 +000025 * logbuffer support is enabled.
wdenk324f6cf2002-10-07 21:13:39 +000026 */
27
28#include <common.h>
29
wdenk324f6cf2002-10-07 21:13:39 +000030#include <post.h>
31
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020032extern int ocm_post_test (int flags);
wdenk324f6cf2002-10-07 21:13:39 +000033extern int cache_post_test (int flags);
34extern int watchdog_post_test (int flags);
35extern int i2c_post_test (int flags);
36extern int rtc_post_test (int flags);
37extern int memory_post_test (int flags);
38extern int cpu_post_test (int flags);
Igor Lisitsina11e0692007-03-28 19:06:19 +040039extern int fpu_post_test (int flags);
wdenk324f6cf2002-10-07 21:13:39 +000040extern int uart_post_test (int flags);
41extern int ether_post_test (int flags);
42extern int spi_post_test (int flags);
43extern int usb_post_test (int flags);
44extern int spr_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000045extern int sysmon_post_test (int flags);
wdenk5a8c51c2004-04-15 21:16:42 +000046extern int dsp_post_test (int flags);
wdenk79fa88f2004-06-07 23:46:25 +000047extern int codec_post_test (int flags);
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +020048extern int ecc_post_test (int flags);
Mike Frysingerf6f73952011-05-10 13:35:40 +000049extern int flash_post_test(int flags);
wdenk4532cb62003-04-27 22:52:51 +000050
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010051extern int dspic_init_post_test (int flags);
52extern int dspic_post_test (int flags);
53extern int gdc_post_test (int flags);
54extern int fpga_post_test (int flags);
55extern int lwmon5_watchdog_post_test(int flags);
56extern int sysmon1_post_test(int flags);
Anatolij Gustschin29fd7ce2010-04-24 19:27:11 +020057extern int coprocessor_post_test(int flags);
Mike Frysinger21513742011-05-10 16:22:25 -040058extern int led_post_test(int flags);
59extern int button_post_test(int flags);
Valentin Longchamp8d3fcb52011-09-12 04:18:40 +000060extern int memory_regions_post_test(int flags);
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010061
wdenk4532cb62003-04-27 22:52:51 +000062extern int sysmon_init_f (void);
63
64extern void sysmon_reloc (void);
65
wdenk324f6cf2002-10-07 21:13:39 +000066
67struct post_test post_list[] =
68{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#if CONFIG_POST & CONFIG_SYS_POST_OCM
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020070 {
71 "OCM test",
72 "ocm",
73 "This test checks on chip memory (OCM).",
Yuri Tikhonov7845d492008-05-08 15:46:02 +020074 POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020075 &ocm_post_test,
76 NULL,
77 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078 CONFIG_SYS_POST_OCM
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020079 },
80#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#if CONFIG_POST & CONFIG_SYS_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000082 {
wdenk8bde7f72003-06-27 21:31:46 +000083 "Cache test",
84 "cache",
85 "This test verifies the CPU cache operation.",
86 POST_RAM | POST_ALWAYS,
87 &cache_post_test,
88 NULL,
89 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090 CONFIG_SYS_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000091 },
92#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020093#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010094#if defined(CONFIG_POST_WATCHDOG)
95 CONFIG_POST_WATCHDOG,
96#else
wdenk324f6cf2002-10-07 21:13:39 +000097 {
wdenk8bde7f72003-06-27 21:31:46 +000098 "Watchdog timer test",
99 "watchdog",
100 "This test checks the watchdog timer.",
wdenk8564acf2003-07-14 22:13:32 +0000101 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
wdenk8bde7f72003-06-27 21:31:46 +0000102 &watchdog_post_test,
103 NULL,
104 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105 CONFIG_SYS_POST_WATCHDOG
wdenk324f6cf2002-10-07 21:13:39 +0000106 },
107#endif
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100108#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#if CONFIG_POST & CONFIG_SYS_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +0000110 {
wdenk8bde7f72003-06-27 21:31:46 +0000111 "I2C test",
112 "i2c",
113 "This test verifies the I2C operation.",
114 POST_RAM | POST_ALWAYS,
115 &i2c_post_test,
116 NULL,
117 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118 CONFIG_SYS_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +0000119 },
120#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#if CONFIG_POST & CONFIG_SYS_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000122 {
wdenk8bde7f72003-06-27 21:31:46 +0000123 "RTC test",
124 "rtc",
125 "This test verifies the RTC operation.",
wdenk8564acf2003-07-14 22:13:32 +0000126 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000127 &rtc_post_test,
128 NULL,
129 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130 CONFIG_SYS_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000131 },
132#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000134 {
wdenk8bde7f72003-06-27 21:31:46 +0000135 "Memory test",
136 "memory",
137 "This test checks RAM.",
wdenk8564acf2003-07-14 22:13:32 +0000138 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
wdenk8bde7f72003-06-27 21:31:46 +0000139 &memory_post_test,
140 NULL,
141 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142 CONFIG_SYS_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000143 },
144#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#if CONFIG_POST & CONFIG_SYS_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000146 {
wdenk8bde7f72003-06-27 21:31:46 +0000147 "CPU test",
148 "cpu",
149 "This test verifies the arithmetic logic unit of"
150 " CPU.",
151 POST_RAM | POST_ALWAYS,
152 &cpu_post_test,
153 NULL,
154 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155 CONFIG_SYS_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000156 },
157#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#if CONFIG_POST & CONFIG_SYS_POST_FPU
Igor Lisitsina11e0692007-03-28 19:06:19 +0400159 {
160 "FPU test",
161 "fpu",
162 "This test verifies the arithmetic logic unit of"
163 " FPU.",
164 POST_RAM | POST_ALWAYS,
165 &fpu_post_test,
166 NULL,
167 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168 CONFIG_SYS_POST_FPU
Igor Lisitsina11e0692007-03-28 19:06:19 +0400169 },
170#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#if CONFIG_POST & CONFIG_SYS_POST_UART
Stefan Roese834a45d2010-10-07 14:16:25 +0200172#if defined(CONFIG_POST_UART)
173 CONFIG_POST_UART,
174#else
wdenk324f6cf2002-10-07 21:13:39 +0000175 {
wdenk8bde7f72003-06-27 21:31:46 +0000176 "UART test",
177 "uart",
178 "This test verifies the UART operation.",
wdenk8564acf2003-07-14 22:13:32 +0000179 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000180 &uart_post_test,
181 NULL,
182 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183 CONFIG_SYS_POST_UART
wdenk324f6cf2002-10-07 21:13:39 +0000184 },
Stefan Roese834a45d2010-10-07 14:16:25 +0200185#endif /* CONFIG_POST_UART */
wdenk324f6cf2002-10-07 21:13:39 +0000186#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#if CONFIG_POST & CONFIG_SYS_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000188 {
wdenk8bde7f72003-06-27 21:31:46 +0000189 "ETHERNET test",
190 "ethernet",
191 "This test verifies the ETHERNET operation.",
192 POST_RAM | POST_ALWAYS | POST_MANUAL,
193 &ether_post_test,
194 NULL,
195 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196 CONFIG_SYS_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000197 },
198#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#if CONFIG_POST & CONFIG_SYS_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000200 {
wdenk8bde7f72003-06-27 21:31:46 +0000201 "SPI test",
202 "spi",
203 "This test verifies the SPI operation.",
204 POST_RAM | POST_ALWAYS | POST_MANUAL,
205 &spi_post_test,
206 NULL,
207 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208 CONFIG_SYS_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000209 },
210#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#if CONFIG_POST & CONFIG_SYS_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000212 {
wdenk8bde7f72003-06-27 21:31:46 +0000213 "USB test",
214 "usb",
215 "This test verifies the USB operation.",
216 POST_RAM | POST_ALWAYS | POST_MANUAL,
217 &usb_post_test,
218 NULL,
219 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220 CONFIG_SYS_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000221 },
222#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#if CONFIG_POST & CONFIG_SYS_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000224 {
wdenk8bde7f72003-06-27 21:31:46 +0000225 "SPR test",
226 "spr",
227 "This test checks SPR contents.",
Stefan Roeseb2e21422008-01-09 10:38:58 +0100228 POST_RAM | POST_ALWAYS,
wdenk8bde7f72003-06-27 21:31:46 +0000229 &spr_post_test,
230 NULL,
231 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232 CONFIG_SYS_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000233 },
234#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200235#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
wdenk4532cb62003-04-27 22:52:51 +0000236 {
wdenk8bde7f72003-06-27 21:31:46 +0000237 "SYSMON test",
238 "sysmon",
239 "This test monitors system hardware.",
240 POST_RAM | POST_ALWAYS,
241 &sysmon_post_test,
242 &sysmon_init_f,
243 &sysmon_reloc,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244 CONFIG_SYS_POST_SYSMON
wdenk4532cb62003-04-27 22:52:51 +0000245 },
246#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247#if CONFIG_POST & CONFIG_SYS_POST_DSP
wdenk5a8c51c2004-04-15 21:16:42 +0000248 {
249 "DSP test",
250 "dsp",
251 "This test checks any connected DSP(s).",
Sascha Laue5744ddc2008-05-30 09:48:14 +0200252 POST_RAM | POST_ALWAYS | POST_MANUAL,
wdenk5a8c51c2004-04-15 21:16:42 +0000253 &dsp_post_test,
254 NULL,
255 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200256 CONFIG_SYS_POST_DSP
wdenk5a8c51c2004-04-15 21:16:42 +0000257 },
258#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#if CONFIG_POST & CONFIG_SYS_POST_CODEC
wdenk79fa88f2004-06-07 23:46:25 +0000260 {
261 "CODEC test",
262 "codec",
263 "This test checks any connected codec(s).",
264 POST_RAM | POST_MANUAL,
265 &codec_post_test,
266 NULL,
267 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268 CONFIG_SYS_POST_CODEC
wdenk79fa88f2004-06-07 23:46:25 +0000269 },
270#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200271#if CONFIG_POST & CONFIG_SYS_POST_ECC
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200272 {
273 "ECC test",
274 "ecc",
Larry Johnson8dafa872008-01-12 23:35:33 -0500275 "This test checks the ECC facility of memory.",
276 POST_ROM | POST_ALWAYS | POST_PREREL,
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200277 &ecc_post_test,
278 NULL,
279 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200280 CONFIG_SYS_POST_ECC
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200281 },
282#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200283#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100284 CONFIG_POST_BSPEC1,
285#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100287 CONFIG_POST_BSPEC2,
288#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200289#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100290 CONFIG_POST_BSPEC3,
291#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200292#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100293 CONFIG_POST_BSPEC4,
294#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100296 CONFIG_POST_BSPEC5,
297#endif
Anatolij Gustschin29fd7ce2010-04-24 19:27:11 +0200298#if CONFIG_POST & CONFIG_SYS_POST_COPROC
299 {
300 "Coprocessors communication test",
301 "coproc_com",
302 "This test checks communication with coprocessors.",
303 POST_RAM | POST_ALWAYS | POST_CRITICAL,
304 &coprocessor_post_test,
305 NULL,
306 NULL,
307 CONFIG_SYS_POST_COPROC
Mike Frysingerf6f73952011-05-10 13:35:40 +0000308 },
309#endif
310#if CONFIG_POST & CONFIG_SYS_POST_FLASH
311 {
312 "Parallel NOR flash test",
313 "flash",
314 "This test verifies parallel flash operations.",
315 POST_RAM | POST_SLOWTEST | POST_MANUAL,
316 &flash_post_test,
317 NULL,
318 NULL,
319 CONFIG_SYS_POST_FLASH
320 },
Anatolij Gustschin29fd7ce2010-04-24 19:27:11 +0200321#endif
Valentin Longchamp8d3fcb52011-09-12 04:18:40 +0000322#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
323 {
324 "Memory regions test",
325 "mem_regions",
326 "This test checks regularly placed regions of the RAM.",
327 POST_ROM | POST_SLOWTEST | POST_PREREL,
328 &memory_regions_post_test,
329 NULL,
330 NULL,
331 CONFIG_SYS_POST_MEM_REGIONS
332 },
333#endif
wdenk324f6cf2002-10-07 21:13:39 +0000334};
335
Mike Frysingerd2397812011-05-10 07:28:35 +0000336unsigned int post_list_size = ARRAY_SIZE(post_list);