wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
wdenk | 228f29a | 2002-12-08 09:53:23 +0000 | [diff] [blame] | 22 | * |
| 23 | * Be sure to mark tests to be run before relocation as such with the |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 24 | * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the |
wdenk | 228f29a | 2002-12-08 09:53:23 +0000 | [diff] [blame] | 25 | * logbuffer support is enabled. |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 26 | */ |
| 27 | |
| 28 | #include <common.h> |
| 29 | |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 30 | #include <post.h> |
| 31 | |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 32 | extern int ocm_post_test (int flags); |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 33 | extern int cache_post_test (int flags); |
| 34 | extern int watchdog_post_test (int flags); |
| 35 | extern int i2c_post_test (int flags); |
| 36 | extern int rtc_post_test (int flags); |
| 37 | extern int memory_post_test (int flags); |
| 38 | extern int cpu_post_test (int flags); |
Igor Lisitsin | a11e069 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 39 | extern int fpu_post_test (int flags); |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 40 | extern int uart_post_test (int flags); |
| 41 | extern int ether_post_test (int flags); |
| 42 | extern int spi_post_test (int flags); |
| 43 | extern int usb_post_test (int flags); |
| 44 | extern int spr_post_test (int flags); |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 45 | extern int sysmon_post_test (int flags); |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 46 | extern int dsp_post_test (int flags); |
wdenk | 79fa88f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 47 | extern int codec_post_test (int flags); |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 48 | extern int ecc_post_test (int flags); |
Mike Frysinger | f6f7395 | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 49 | extern int flash_post_test(int flags); |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 50 | |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 51 | extern int dspic_init_post_test (int flags); |
| 52 | extern int dspic_post_test (int flags); |
| 53 | extern int gdc_post_test (int flags); |
| 54 | extern int fpga_post_test (int flags); |
| 55 | extern int lwmon5_watchdog_post_test(int flags); |
| 56 | extern int sysmon1_post_test(int flags); |
Anatolij Gustschin | 29fd7ce | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 57 | extern int coprocessor_post_test(int flags); |
Mike Frysinger | 2151374 | 2011-05-10 16:22:25 -0400 | [diff] [blame] | 58 | extern int led_post_test(int flags); |
| 59 | extern int button_post_test(int flags); |
Valentin Longchamp | 8d3fcb5 | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 60 | extern int memory_regions_post_test(int flags); |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 61 | |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 62 | extern int sysmon_init_f (void); |
| 63 | |
| 64 | extern void sysmon_reloc (void); |
| 65 | |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 66 | |
| 67 | struct post_test post_list[] = |
| 68 | { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 69 | #if CONFIG_POST & CONFIG_SYS_POST_OCM |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 70 | { |
| 71 | "OCM test", |
| 72 | "ocm", |
| 73 | "This test checks on chip memory (OCM).", |
Yuri Tikhonov | 7845d49 | 2008-05-08 15:46:02 +0200 | [diff] [blame] | 74 | POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 75 | &ocm_post_test, |
| 76 | NULL, |
| 77 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | CONFIG_SYS_POST_OCM |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 79 | }, |
| 80 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | #if CONFIG_POST & CONFIG_SYS_POST_CACHE |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 82 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 83 | "Cache test", |
| 84 | "cache", |
| 85 | "This test verifies the CPU cache operation.", |
| 86 | POST_RAM | POST_ALWAYS, |
| 87 | &cache_post_test, |
| 88 | NULL, |
| 89 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | CONFIG_SYS_POST_CACHE |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 91 | }, |
| 92 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 94 | #if defined(CONFIG_POST_WATCHDOG) |
| 95 | CONFIG_POST_WATCHDOG, |
| 96 | #else |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 97 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 98 | "Watchdog timer test", |
| 99 | "watchdog", |
| 100 | "This test checks the watchdog timer.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 101 | POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 102 | &watchdog_post_test, |
| 103 | NULL, |
| 104 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | CONFIG_SYS_POST_WATCHDOG |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 106 | }, |
| 107 | #endif |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 108 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 109 | #if CONFIG_POST & CONFIG_SYS_POST_I2C |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 110 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 111 | "I2C test", |
| 112 | "i2c", |
| 113 | "This test verifies the I2C operation.", |
| 114 | POST_RAM | POST_ALWAYS, |
| 115 | &i2c_post_test, |
| 116 | NULL, |
| 117 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 118 | CONFIG_SYS_POST_I2C |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 119 | }, |
| 120 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 121 | #if CONFIG_POST & CONFIG_SYS_POST_RTC |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 122 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 123 | "RTC test", |
| 124 | "rtc", |
| 125 | "This test verifies the RTC operation.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 126 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 127 | &rtc_post_test, |
| 128 | NULL, |
| 129 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | CONFIG_SYS_POST_RTC |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 131 | }, |
| 132 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #if CONFIG_POST & CONFIG_SYS_POST_MEMORY |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 134 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 135 | "Memory test", |
| 136 | "memory", |
| 137 | "This test checks RAM.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 138 | POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 139 | &memory_post_test, |
| 140 | NULL, |
| 141 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | CONFIG_SYS_POST_MEMORY |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 143 | }, |
| 144 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 145 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 146 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 147 | "CPU test", |
| 148 | "cpu", |
| 149 | "This test verifies the arithmetic logic unit of" |
| 150 | " CPU.", |
| 151 | POST_RAM | POST_ALWAYS, |
| 152 | &cpu_post_test, |
| 153 | NULL, |
| 154 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | CONFIG_SYS_POST_CPU |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 156 | }, |
| 157 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #if CONFIG_POST & CONFIG_SYS_POST_FPU |
Igor Lisitsin | a11e069 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 159 | { |
| 160 | "FPU test", |
| 161 | "fpu", |
| 162 | "This test verifies the arithmetic logic unit of" |
| 163 | " FPU.", |
| 164 | POST_RAM | POST_ALWAYS, |
| 165 | &fpu_post_test, |
| 166 | NULL, |
| 167 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 168 | CONFIG_SYS_POST_FPU |
Igor Lisitsin | a11e069 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 169 | }, |
| 170 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 171 | #if CONFIG_POST & CONFIG_SYS_POST_UART |
Stefan Roese | 834a45d | 2010-10-07 14:16:25 +0200 | [diff] [blame] | 172 | #if defined(CONFIG_POST_UART) |
| 173 | CONFIG_POST_UART, |
| 174 | #else |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 175 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 176 | "UART test", |
| 177 | "uart", |
| 178 | "This test verifies the UART operation.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 179 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 180 | &uart_post_test, |
| 181 | NULL, |
| 182 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 183 | CONFIG_SYS_POST_UART |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 184 | }, |
Stefan Roese | 834a45d | 2010-10-07 14:16:25 +0200 | [diff] [blame] | 185 | #endif /* CONFIG_POST_UART */ |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 186 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 187 | #if CONFIG_POST & CONFIG_SYS_POST_ETHER |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 188 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 189 | "ETHERNET test", |
| 190 | "ethernet", |
| 191 | "This test verifies the ETHERNET operation.", |
| 192 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
| 193 | ðer_post_test, |
| 194 | NULL, |
| 195 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 196 | CONFIG_SYS_POST_ETHER |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 197 | }, |
| 198 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 199 | #if CONFIG_POST & CONFIG_SYS_POST_SPI |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 200 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 201 | "SPI test", |
| 202 | "spi", |
| 203 | "This test verifies the SPI operation.", |
| 204 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
| 205 | &spi_post_test, |
| 206 | NULL, |
| 207 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 208 | CONFIG_SYS_POST_SPI |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 209 | }, |
| 210 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 211 | #if CONFIG_POST & CONFIG_SYS_POST_USB |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 212 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 213 | "USB test", |
| 214 | "usb", |
| 215 | "This test verifies the USB operation.", |
| 216 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
| 217 | &usb_post_test, |
| 218 | NULL, |
| 219 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 220 | CONFIG_SYS_POST_USB |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 221 | }, |
| 222 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 223 | #if CONFIG_POST & CONFIG_SYS_POST_SPR |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 224 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 225 | "SPR test", |
| 226 | "spr", |
| 227 | "This test checks SPR contents.", |
Stefan Roese | b2e2142 | 2008-01-09 10:38:58 +0100 | [diff] [blame] | 228 | POST_RAM | POST_ALWAYS, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 229 | &spr_post_test, |
| 230 | NULL, |
| 231 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 232 | CONFIG_SYS_POST_SPR |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 233 | }, |
| 234 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 235 | #if CONFIG_POST & CONFIG_SYS_POST_SYSMON |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 236 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 237 | "SYSMON test", |
| 238 | "sysmon", |
| 239 | "This test monitors system hardware.", |
| 240 | POST_RAM | POST_ALWAYS, |
| 241 | &sysmon_post_test, |
| 242 | &sysmon_init_f, |
| 243 | &sysmon_reloc, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 244 | CONFIG_SYS_POST_SYSMON |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 245 | }, |
| 246 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 247 | #if CONFIG_POST & CONFIG_SYS_POST_DSP |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 248 | { |
| 249 | "DSP test", |
| 250 | "dsp", |
| 251 | "This test checks any connected DSP(s).", |
Sascha Laue | 5744ddc | 2008-05-30 09:48:14 +0200 | [diff] [blame] | 252 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 253 | &dsp_post_test, |
| 254 | NULL, |
| 255 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 256 | CONFIG_SYS_POST_DSP |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 257 | }, |
| 258 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 259 | #if CONFIG_POST & CONFIG_SYS_POST_CODEC |
wdenk | 79fa88f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 260 | { |
| 261 | "CODEC test", |
| 262 | "codec", |
| 263 | "This test checks any connected codec(s).", |
| 264 | POST_RAM | POST_MANUAL, |
| 265 | &codec_post_test, |
| 266 | NULL, |
| 267 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 268 | CONFIG_SYS_POST_CODEC |
wdenk | 79fa88f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 269 | }, |
| 270 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 271 | #if CONFIG_POST & CONFIG_SYS_POST_ECC |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 272 | { |
| 273 | "ECC test", |
| 274 | "ecc", |
Larry Johnson | 8dafa87 | 2008-01-12 23:35:33 -0500 | [diff] [blame] | 275 | "This test checks the ECC facility of memory.", |
| 276 | POST_ROM | POST_ALWAYS | POST_PREREL, |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 277 | &ecc_post_test, |
| 278 | NULL, |
| 279 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 280 | CONFIG_SYS_POST_ECC |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 281 | }, |
| 282 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 283 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC1 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 284 | CONFIG_POST_BSPEC1, |
| 285 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 286 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC2 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 287 | CONFIG_POST_BSPEC2, |
| 288 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 289 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC3 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 290 | CONFIG_POST_BSPEC3, |
| 291 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 292 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC4 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 293 | CONFIG_POST_BSPEC4, |
| 294 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 295 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 296 | CONFIG_POST_BSPEC5, |
| 297 | #endif |
Anatolij Gustschin | 29fd7ce | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 298 | #if CONFIG_POST & CONFIG_SYS_POST_COPROC |
| 299 | { |
| 300 | "Coprocessors communication test", |
| 301 | "coproc_com", |
| 302 | "This test checks communication with coprocessors.", |
| 303 | POST_RAM | POST_ALWAYS | POST_CRITICAL, |
| 304 | &coprocessor_post_test, |
| 305 | NULL, |
| 306 | NULL, |
| 307 | CONFIG_SYS_POST_COPROC |
Mike Frysinger | f6f7395 | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 308 | }, |
| 309 | #endif |
| 310 | #if CONFIG_POST & CONFIG_SYS_POST_FLASH |
| 311 | { |
| 312 | "Parallel NOR flash test", |
| 313 | "flash", |
| 314 | "This test verifies parallel flash operations.", |
| 315 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
| 316 | &flash_post_test, |
| 317 | NULL, |
| 318 | NULL, |
| 319 | CONFIG_SYS_POST_FLASH |
| 320 | }, |
Anatolij Gustschin | 29fd7ce | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 321 | #endif |
Valentin Longchamp | 8d3fcb5 | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 322 | #if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS |
| 323 | { |
| 324 | "Memory regions test", |
| 325 | "mem_regions", |
| 326 | "This test checks regularly placed regions of the RAM.", |
| 327 | POST_ROM | POST_SLOWTEST | POST_PREREL, |
| 328 | &memory_regions_post_test, |
| 329 | NULL, |
| 330 | NULL, |
| 331 | CONFIG_SYS_POST_MEM_REGIONS |
| 332 | }, |
| 333 | #endif |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 334 | }; |
| 335 | |
Mike Frysinger | d239781 | 2011-05-10 07:28:35 +0000 | [diff] [blame] | 336 | unsigned int post_list_size = ARRAY_SIZE(post_list); |