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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
Tom Warrenf01b6312012-12-11 13:34:18 +000017#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
Tom Warrenf01b6312012-12-11 13:34:18 +000019#include <asm/arch/tegra.h> /* get chip and board defs */
20
Thierry Redingf41f0a12015-07-28 11:35:54 +020021/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
22#ifndef CONFIG_ARM64
Rob Herring31df9892013-10-04 10:22:47 -050023#define CONFIG_SYS_TIMER_RATE 1000000
24#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
Thierry Redingf41f0a12015-07-28 11:35:54 +020025#endif
Rob Herring31df9892013-10-04 10:22:47 -050026
Tom Warrenf01b6312012-12-11 13:34:18 +000027/*
28 * Display CPU and Board information
29 */
30#define CONFIG_DISPLAY_CPUINFO
31#define CONFIG_DISPLAY_BOARDINFO
32
33#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000034
35/* Environment */
36#define CONFIG_ENV_VARS_UBOOT_CONFIG
37#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
38
39/*
40 * Size of malloc() pool
41 */
Przemyslaw Marczak52a7c982015-03-04 14:01:30 +010042#ifdef CONFIG_DFU_MMC
43#define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \
44 CONFIG_SYS_DFU_DATA_BUF_SIZE)
45#else
Tom Warrenf01b6312012-12-11 13:34:18 +000046#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
Przemyslaw Marczak52a7c982015-03-04 14:01:30 +010047#endif
Thierry Redingd1e5b402014-12-09 22:25:23 -070048
Thierry Reding65272682015-07-27 11:45:26 -060049#ifndef CONFIG_ARM64
Thierry Redingd1e5b402014-12-09 22:25:23 -070050#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
Thierry Reding65272682015-07-27 11:45:26 -060051#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000052
53/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000054 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000055 */
Simon Glass858530a2014-09-04 16:27:36 -060056#define CONFIG_TEGRA_SERIAL
Simon Glass858530a2014-09-04 16:27:36 -060057#define CONFIG_SYS_NS16550
Tom Warrenf01b6312012-12-11 13:34:18 +000058
59/*
Stephen Warrenf1756032014-04-18 10:56:11 -060060 * Common HW configuration.
61 * If this varies between SoCs later, move to tegraNN-common.h
62 * Note: This is number of devices, not max device ID.
63 */
64#define CONFIG_SYS_MMC_MAX_DEVICE 4
65
66/*
Tom Warrenf01b6312012-12-11 13:34:18 +000067 * select serial console configuration
68 */
69#define CONFIG_CONS_INDEX 1
70
71/* allow to overwrite serial and ethaddr */
72#define CONFIG_ENV_OVERWRITE
73#define CONFIG_BAUDRATE 115200
74
Tom Warrenf01b6312012-12-11 13:34:18 +000075/* turn on command-line edit/hist/auto */
Tom Warrenf01b6312012-12-11 13:34:18 +000076#define CONFIG_COMMAND_HISTORY
Tom Warrenf01b6312012-12-11 13:34:18 +000077
Stephen Warren11d9c032013-02-28 15:03:48 +000078/* turn on commonly used storage-related commands */
Stephen Warren11d9c032013-02-28 15:03:48 +000079#define CONFIG_PARTITION_UUIDS
Stephen Warren11d9c032013-02-28 15:03:48 +000080#define CONFIG_CMD_PART
81
Tom Warrenf01b6312012-12-11 13:34:18 +000082#define CONFIG_SYS_NO_FLASH
83
84#define CONFIG_CONSOLE_MUX
85#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Stephen Warren86bd20b2015-04-14 08:41:14 -060086#ifndef CONFIG_SPL_BUILD
87#define CONFIG_SYS_STDIO_DEREGISTER
88#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000089
90/*
Tom Warrenf01b6312012-12-11 13:34:18 +000091 * Increasing the size of the IO buffer as default nfsargs size is more
92 * than 256 and so it is not possible to edit it
93 */
94#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
95/* Print Buffer Size */
96#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
97 sizeof(CONFIG_SYS_PROMPT) + 16)
Simon Glass0859b492015-06-05 14:39:40 -060098#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
Tom Warrenf01b6312012-12-11 13:34:18 +000099/* Boot Argument Buffer Size */
100#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
101
102#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
103#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
104
Thierry Reding65272682015-07-27 11:45:26 -0600105#ifndef CONFIG_ARM64
Simon Glass9dacbb22014-11-10 17:16:42 -0700106#ifndef CONFIG_SPL_BUILD
Marcel Ziswiler4270d5a2014-08-26 11:49:46 +0200107#define CONFIG_USE_ARCH_MEMCPY
Simon Glass9dacbb22014-11-10 17:16:42 -0700108#endif
Thierry Reding65272682015-07-27 11:45:26 -0600109#endif
Marcel Ziswiler4270d5a2014-08-26 11:49:46 +0200110
Tom Warrenf01b6312012-12-11 13:34:18 +0000111/*-----------------------------------------------------------------------
112 * Physical Memory Map
113 */
Stephen Warrenbbc1b992015-08-07 16:12:45 -0600114#define CONFIG_NR_DRAM_BANKS 2
Tom Warrenf01b6312012-12-11 13:34:18 +0000115#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
116#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
117
118#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
119#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
120
121#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
122
123#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
124#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
125#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
126 CONFIG_SYS_INIT_RAM_SIZE - \
127 GENERATED_GBL_DATA_SIZE)
128
129#define CONFIG_TEGRA_GPIO
130#define CONFIG_CMD_GPIO
131#define CONFIG_CMD_ENTERRCM
Tom Warrenf01b6312012-12-11 13:34:18 +0000132
133/* Defines for SPL */
Tom Warrenf01b6312012-12-11 13:34:18 +0000134#define CONFIG_SPL_FRAMEWORK
135#define CONFIG_SPL_RAM_DEVICE
136#define CONFIG_SPL_BOARD_INIT
137#define CONFIG_SPL_NAND_SIMPLE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +0000138#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +0000139 CONFIG_SPL_TEXT_BASE)
140#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
141
142#define CONFIG_SPL_LIBCOMMON_SUPPORT
143#define CONFIG_SPL_LIBGENERIC_SUPPORT
144#define CONFIG_SPL_SERIAL_SUPPORT
145#define CONFIG_SPL_GPIO_SUPPORT
146
Simon Glassdd7f65f2013-03-05 14:39:56 +0000147#define CONFIG_SYS_GENERIC_BOARD
Stephen Warren026baff2015-01-19 16:25:51 -0700148#define CONFIG_BOARD_EARLY_INIT_F
149#define CONFIG_BOARD_LATE_INIT
Tom Warren3efff992013-03-26 10:39:33 -0700150
Stephen Warrena885f852013-02-28 15:03:45 +0000151/* Misc utility code */
152#define CONFIG_BOUNCE_BUFFER
Tom Warren3efff992013-03-26 10:39:33 -0700153#define CONFIG_CRC32_VERIFY
Simon Glassdd7f65f2013-03-05 14:39:56 +0000154
Stephen Warren68cf64d2014-02-05 09:24:57 -0700155#ifndef CONFIG_SPL_BUILD
156#include <config_distro_defaults.h>
157#endif
158
Tom Warrenf01b6312012-12-11 13:34:18 +0000159#endif /* _TEGRA_COMMON_H_ */