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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8#ifndef _VPD_H_
9#define _VPD_H_
10
11/*
12 * Main Flash Configuration.
13 */
14typedef struct flashCfg_s {
15 unsigned short mfg; /* Manufacture ID */
16 unsigned short dev; /* Device ID */
17 unsigned char devWidth; /* Device Width */
18 unsigned char numDevs; /* Number of devices */
19 unsigned char numCols; /* Number of columns */
20 unsigned char colWidth; /* Width of a column */
21 unsigned char weDataWidth; /* Write/Erase Data Width */
22} flashCfg_t;
23
24/*
25 * Vital Product Data - VPD
26 */
27#define MAX_PROD_ID 15
28#define MAX_ETH_ADDRS 10
29typedef unsigned char EthAddr[6];
30typedef struct vpd {
31 unsigned char _devAddr; /* Device address during read */
32 char productId[MAX_PROD_ID]; /* Product ID */
33 char revisionId; /* Revision ID as a char */
34 unsigned long serialNum; /* Serial number */
35 unsigned char manuID; /* Manufact ID - byte int */
36 unsigned long configOpt; /* Config Option - bit field */
37 unsigned long sysClk; /* System clock in Hertz */
38 unsigned long serClk; /* Ext. clock in Hertz */
39 flashCfg_t flashCfg; /* Flash configuration */
40 unsigned long numPOTS; /* Number of POTS lines */
41 unsigned long numDS1; /* Number of DS1 circuits */
42 EthAddr ethAddrs[MAX_ETH_ADDRS]; /* Ethernet MAC, 1st = craft */
43} VPD;
44
45
46#define VPD_MAX_EEPROM_SIZE 512 /* Max size VPD EEPROM */
47#define SDRAM_SPD_DATA_SIZE 128 /* Size SPD in VPD EEPROM */
48
49/*
50 * PIDs - Packet Identifiers
51 */
52#define VPD_PID_GI 0x0 /* Guaranted Illegal */
53#define VPD_PID_PID 0x1 /* Product Identifier */
54#define VPD_PID_REV 0x2 /* Product Revision */
55#define VPD_PID_SN 0x3 /* Serial Number */
56#define VPD_PID_MANID 0x4 /* Manufacture ID */
57#define VPD_PID_PCO 0x5 /* Product configuration */
58#define VPD_PID_SYSCLK 0x6 /* System Clock */
59#define VPD_PID_SERCLK 0x7 /* Ser. Clk. Speed in Hertz */
60#define VPD_PID_CRC 0x8 /* VPD CRC */
61#define VPD_PID_FLASH 0x9 /* Flash Configuration */
62#define VPD_PID_ETHADDR 0xA /* Ethernet Address(es) */
63#define VPD_PID_GAL 0xB /* Galileo Switch Config */
64#define VPD_PID_POTS 0xC /* Number of POTS Lines */
65#define VPD_PID_DS1 0xD /* Number of DS1s */
66#define VPD_PID_TERM 0xFF /* Termination packet */
67
68/*
69 * VPD - Eyecatcher/Magic
70 */
71#define VPD_EYECATCHER "W7O"
72#define VPD_EYE_SIZE 3
73typedef struct vpd_header {
74 unsigned char eyecatcher[VPD_EYE_SIZE]; /* eyecatcher - "W7O" */
75 unsigned short size __attribute__((packed)); /* size of EEPROM */
76} vpd_header_t;
77
78
79#define VPD_DATA_SIZE (VPD_MAX_EEPROM_SIZE - SDRAM_SPD_DATA_SIZE - \
wdenk8bde7f72003-06-27 21:31:46 +000080 sizeof(vpd_header_t))
wdenkc6097192002-11-03 00:24:07 +000081typedef struct vpd_s {
82 vpd_header_t header;
83 unsigned char packets[VPD_DATA_SIZE];
84} vpd_t;
85
86typedef struct vpd_packet {
87 unsigned char identifier;
88 unsigned char size;
89 unsigned char data[1];
90} vpd_packet_t;
91
92/*
93 * VPD configOpt bit mask
94 */
95#define VPD_HAS_BBRAM 0x1 /* Battery backed SRAM */
96#define VPD_HAS_RTC 0x2 /* Battery backed RTC */
97#define VPD_HAS_EXT_SER_CLK 0x4 /* External serial clock */
98#define VPD_HAS_SER_TRANS_1 0x8 /* COM1 transceiver */
99#define VPD_HAS_SER_TRANS_2 0x10 /* COM2 transceiver */
100#define VPD_HAS_CRAFT_PHY 0x20 /* CRAFT Ethernet */
101#define VPD_HAS_DTT_1 0x40 /* I2C Digital therm. #1 */
102#define VPD_HAS_DTT_2 0x80 /* I2C Digital therm. #2 */
103#define VPD_HAS_1000_UP_LASER 0x100 /* GMM - 1000Mbit Uplink */
104#define VPD_HAS_70KM_UP_LASER 0x200 /* CMM - 70KM Uplink laser */
105#define VPD_HAS_2_UPLINKS 0x400 /* CMM - 2 uplink lasers */
106#define VPD_HAS_FPGA 0x800 /* Has 1 or more FPGAs */
107#define VPD_HAS_DFA 0x1000 /* CLM - Has 2 Fiber Inter. */
108#define VPD_HAS_GAL_SWITCH 0x2000 /* GMM - Has a Gal switch */
109#define VPD_HAS_POTS_LINES 0x4000 /* GMM - Has POTS lines */
110#define VPD_HAS_DS1_CHANNELS 0x8000 /* GMM - Has DS1 channels */
111#define VPD_HAS_CABLE_RETURN 0x10000 /* GBM/GBR - Cable ret. path */
112
113#define VPD_EEPROM_SIZE (256 - SDRAM_SPD_DATA_SIZE) /* Size EEPROM */
114
115extern int vpd_get_data(unsigned char dev_addr, VPD *vpd);
116extern void vpd_print(VPD *vpdInfo);
117
118#endif /* _VPD_H_ */