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wdenkdc7c9a12003-03-26 06:55:25 +00001/*
wdenkdc7c9a12003-03-26 06:55:25 +00002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
wdenkdc7c9a12003-03-26 06:55:25 +00005 */
6
7#include <common.h>
8#include <mpc8xx.h>
9
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020010#ifndef CONFIG_ENV_ADDR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020011#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
wdenkdc7c9a12003-03-26 06:55:25 +000012#endif
13
Wolfgang Denk8adc9052011-11-04 15:55:49 +000014flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
wdenkdc7c9a12003-03-26 06:55:25 +000015
16/*-----------------------------------------------------------------------
17 * Functions
18 */
Wolfgang Denk8adc9052011-11-04 15:55:49 +000019static int write_word(flash_info_t *info, ulong dest, ulong data);
20
21#ifdef CONFIG_BOOT_8B
22static int my_in_8(unsigned char *addr);
23static void my_out_8(unsigned char *addr, int val);
wdenkdc7c9a12003-03-26 06:55:25 +000024#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +000025#ifdef CONFIG_BOOT_16B
26static int my_in_be16(unsigned short *addr);
27static void my_out_be16(unsigned short *addr, int val);
wdenkdc7c9a12003-03-26 06:55:25 +000028#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +000029#ifdef CONFIG_BOOT_32B
30static unsigned my_in_be32(unsigned *addr);
31static void my_out_be32(unsigned *addr, int val);
wdenkdc7c9a12003-03-26 06:55:25 +000032#endif
33/*-----------------------------------------------------------------------
34 */
35
Wolfgang Denk8adc9052011-11-04 15:55:49 +000036unsigned long flash_init(void)
wdenkdc7c9a12003-03-26 06:55:25 +000037{
Wolfgang Denk8adc9052011-11-04 15:55:49 +000038 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkdc7c9a12003-03-26 06:55:25 +000039 volatile memctl8xx_t *memctl = &immap->im_memctl;
40 unsigned long size_b0, size_b1;
41 int i;
42
Wolfgang Denk8adc9052011-11-04 15:55:49 +000043 size_b0 = 0;
44 size_b1 = 0;
wdenkdc7c9a12003-03-26 06:55:25 +000045 /* Init: no FLASHes known */
Wolfgang Denk8adc9052011-11-04 15:55:49 +000046 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
wdenkdc7c9a12003-03-26 06:55:25 +000047 flash_info[i].flash_id = FLASH_UNKNOWN;
Wolfgang Denk8adc9052011-11-04 15:55:49 +000048
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#ifdef CONFIG_SYS_DOC_BASE
wdenkdc7c9a12003-03-26 06:55:25 +000050#ifndef CONFIG_FEL8xx_AT
Wolfgang Denk8adc9052011-11-04 15:55:49 +000051 /* 32k bytes */
52 memctl->memc_or5 = (0xffff8000 | CONFIG_SYS_OR_TIMING_DOC);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053 memctl->memc_br5 = CONFIG_SYS_DOC_BASE | 0x401;
wdenkdc7c9a12003-03-26 06:55:25 +000054#else
Wolfgang Denk8adc9052011-11-04 15:55:49 +000055 /* 32k bytes */
56 memctl->memc_or3 = (0xffff8000 | CONFIG_SYS_OR_TIMING_DOC);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057 memctl->memc_br3 = CONFIG_SYS_DOC_BASE | 0x401;
wdenkdc7c9a12003-03-26 06:55:25 +000058#endif
59#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +000060#if defined(CONFIG_BOOT_8B)
61 size_b0 = 0x80000; /* 512 K */
62
wdenk8bde7f72003-06-27 21:31:46 +000063 flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM040;
64 flash_info[0].sector_count = 8;
65 flash_info[0].size = 0x00080000;
Wolfgang Denk8adc9052011-11-04 15:55:49 +000066
wdenk8bde7f72003-06-27 21:31:46 +000067 /* set up sector start address table */
68 for (i = 0; i < flash_info[0].sector_count; i++)
Wolfgang Denk8adc9052011-11-04 15:55:49 +000069 flash_info[0].start[i] = 0x40000000 + (i * 0x10000);
70
wdenk8bde7f72003-06-27 21:31:46 +000071 /* protect all sectors */
72 for (i = 0; i < flash_info[0].sector_count; i++)
Wolfgang Denk8adc9052011-11-04 15:55:49 +000073 flash_info[0].protect[i] = 0x1;
74
75#elif defined(CONFIG_BOOT_16B)
76 size_b0 = 0x400000; /* 4MB , assume AMD29LV320B */
77
wdenk8bde7f72003-06-27 21:31:46 +000078 flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM320B;
79 flash_info[0].sector_count = 67;
80 flash_info[0].size = 0x00400000;
Wolfgang Denk8adc9052011-11-04 15:55:49 +000081
wdenk8bde7f72003-06-27 21:31:46 +000082 /* set up sector start address table */
Wolfgang Denk8adc9052011-11-04 15:55:49 +000083 flash_info[0].start[0] = 0x40000000;
wdenk8bde7f72003-06-27 21:31:46 +000084 flash_info[0].start[1] = 0x40000000 + 0x4000;
85 flash_info[0].start[2] = 0x40000000 + 0x6000;
86 flash_info[0].start[3] = 0x40000000 + 0x8000;
Wolfgang Denk8adc9052011-11-04 15:55:49 +000087
88 for (i = 4; i < flash_info[0].sector_count; i++) {
89 flash_info[0].start[i] =
90 0x40000000 + 0x10000 + ((i - 4) * 0x10000);
91 }
92
wdenk8bde7f72003-06-27 21:31:46 +000093 /* protect all sectors */
94 for (i = 0; i < flash_info[0].sector_count; i++)
Wolfgang Denk8adc9052011-11-04 15:55:49 +000095 flash_info[0].protect[i] = 0x1;
wdenk8bde7f72003-06-27 21:31:46 +000096#endif
wdenkdc7c9a12003-03-26 06:55:25 +000097
wdenkdc7c9a12003-03-26 06:55:25 +000098#ifdef CONFIG_BOOT_32B
99
100 /* Static FLASH Bank configuration here - FIXME XXX */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000101 size_b0 = flash_get_size((vu_long *) FLASH_BASE0_PRELIM,
102 &flash_info[0]);
wdenkdc7c9a12003-03-26 06:55:25 +0000103
104 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000105 printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
106 size_b0, size_b0 << 20);
wdenkdc7c9a12003-03-26 06:55:25 +0000107 }
108
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000109 size_b1 = flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
110 &flash_info[1]);
wdenkdc7c9a12003-03-26 06:55:25 +0000111
112 if (size_b1 > size_b0) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000113 printf("## ERROR: "
wdenkdc7c9a12003-03-26 06:55:25 +0000114 "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000115 size_b1, size_b1 << 20, size_b0, size_b0 << 20);
116 flash_info[0].flash_id = FLASH_UNKNOWN;
117 flash_info[1].flash_id = FLASH_UNKNOWN;
118 flash_info[0].sector_count = -1;
119 flash_info[1].sector_count = -1;
120 flash_info[0].size = 0;
121 flash_info[1].size = 0;
122
123 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +0000124 }
125
126 /* Remap FLASH according to real size */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000127 memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH |
128 (-size_b0 & OR_AM_MSK);
129 memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) |
130 BR_MS_GPCM | BR_V;
wdenkdc7c9a12003-03-26 06:55:25 +0000131
132 /* Re-do sizing to get full correct info */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000133 size_b0 = flash_get_size((vu_long *) CONFIG_SYS_FLASH_BASE,
134 &flash_info[0]);
wdenkdc7c9a12003-03-26 06:55:25 +0000135
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000136 flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]);
wdenkdc7c9a12003-03-26 06:55:25 +0000137
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
wdenkdc7c9a12003-03-26 06:55:25 +0000139 /* monitor protection ON by default */
140 flash_protect(FLAG_PROTECT_SET,
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000141 CONFIG_SYS_MONITOR_BASE,
142 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
143 &flash_info[0]);
wdenkdc7c9a12003-03-26 06:55:25 +0000144#endif
145
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200146#ifdef CONFIG_ENV_IS_IN_FLASH
wdenkdc7c9a12003-03-26 06:55:25 +0000147 /* ENV protection ON by default */
148 flash_protect(FLAG_PROTECT_SET,
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000149 CONFIG_ENV_ADDR,
150 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
wdenkdc7c9a12003-03-26 06:55:25 +0000151#endif
152
153 if (size_b1) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000154 memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH |
155 (-size_b1 & 0xFFFF8000);
156 memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE +
157 size_b0) & BR_BA_MSK) | BR_MS_GPCM | BR_V;
wdenkdc7c9a12003-03-26 06:55:25 +0000158
159 /* Re-do sizing to get full correct info */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000160 size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE +
161 size_b0), &flash_info[1]);
wdenkdc7c9a12003-03-26 06:55:25 +0000162
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000163 flash_get_offsets(CONFIG_SYS_FLASH_BASE + size_b0,
164 &flash_info[1]);
wdenkdc7c9a12003-03-26 06:55:25 +0000165
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
wdenkdc7c9a12003-03-26 06:55:25 +0000167 /* monitor protection ON by default */
168 flash_protect(FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169 CONFIG_SYS_MONITOR_BASE,
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000170 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
wdenkdc7c9a12003-03-26 06:55:25 +0000171 &flash_info[1]);
172#endif
173
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200174#ifdef CONFIG_ENV_IS_IN_FLASH
wdenkdc7c9a12003-03-26 06:55:25 +0000175 /* ENV protection ON by default */
176 flash_protect(FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200177 CONFIG_ENV_ADDR,
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000178 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
wdenkdc7c9a12003-03-26 06:55:25 +0000179 &flash_info[1]);
180#endif
181 } else {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000182 memctl->memc_br1 = 0; /* invalidate bank */
wdenkdc7c9a12003-03-26 06:55:25 +0000183
184 flash_info[1].flash_id = FLASH_UNKNOWN;
185 flash_info[1].sector_count = -1;
186 }
187
188 flash_info[0].size = size_b0;
189 flash_info[1].size = size_b1;
190
191
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000192#endif /* CONFIG_BOOT_32B */
wdenkdc7c9a12003-03-26 06:55:25 +0000193
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000194 return size_b0 + size_b1;
wdenkdc7c9a12003-03-26 06:55:25 +0000195}
wdenkdc7c9a12003-03-26 06:55:25 +0000196
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000197
198void flash_print_info(flash_info_t *info)
wdenkdc7c9a12003-03-26 06:55:25 +0000199{
200 int i;
201
202 if (info->flash_id == FLASH_UNKNOWN) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000203 printf("missing or unknown FLASH type\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000204 return;
205 }
206
207 switch (info->flash_id & FLASH_VENDMASK) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000208 case FLASH_MAN_AMD:
209 printf("AMD ");
210 break;
211 case FLASH_MAN_FUJ:
212 printf("FUJITSU ");
213 break;
214 default:
215 printf("Unknown Vendor ");
216 break;
wdenkdc7c9a12003-03-26 06:55:25 +0000217 }
218
219 switch (info->flash_id & FLASH_TYPEMASK) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000220 case FLASH_AM400B:
221 printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
222 break;
223 case FLASH_AM400T:
224 printf("AM29LV400T (4 Mbit, top boot sector)\n");
225 break;
226 case FLASH_AM800B:
227 printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
228 break;
229 case FLASH_AM800T:
230 printf("AM29LV800T (8 Mbit, top boot sector)\n");
231 break;
232 case FLASH_AM160B:
233 printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
234 break;
235 case FLASH_AM160T:
236 printf("AM29LV160T (16 Mbit, top boot sector)\n");
237 break;
238 case FLASH_AM320B:
239 printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
240 break;
241 case FLASH_AM320T:
242 printf("AM29LV320T (32 Mbit, top boot sector)\n");
243 break;
244 default:
245 printf("Unknown Chip Type\n");
246 break;
wdenkdc7c9a12003-03-26 06:55:25 +0000247 }
248
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000249 printf(" Size: %ld MB in %d Sectors\n",
wdenkdc7c9a12003-03-26 06:55:25 +0000250 info->size >> 20, info->sector_count);
251
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000252 printf(" Sector Start Addresses:");
253 for (i = 0; i < info->sector_count; ++i) {
wdenkdc7c9a12003-03-26 06:55:25 +0000254 if ((i % 5) == 0)
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000255 printf("\n ");
256 printf(" %08lX%s",
257 info->start[i], info->protect[i] ? " (RO)" : " ");
wdenkdc7c9a12003-03-26 06:55:25 +0000258 }
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000259 printf("\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000260 return;
261}
262
wdenkdc7c9a12003-03-26 06:55:25 +0000263/*
264 * The following code cannot be run from FLASH!
265 */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000266
267int flash_erase(flash_info_t *info, int s_first, int s_last)
wdenkdc7c9a12003-03-26 06:55:25 +0000268{
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000269 vu_long *addr = (vu_long *) (info->start[0]);
270 int flag, prot, sect, l_sect, in_mid, in_did;
wdenkdc7c9a12003-03-26 06:55:25 +0000271 ulong start, now, last;
272
273 if ((s_first < 0) || (s_first > s_last)) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000274 if (info->flash_id == FLASH_UNKNOWN)
275 printf("- missing\n");
276 else
277 printf("- no sectors to erase\n");
278
wdenkdc7c9a12003-03-26 06:55:25 +0000279 return 1;
280 }
281
282 if ((info->flash_id == FLASH_UNKNOWN) ||
283 (info->flash_id > FLASH_AMD_COMP)) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000284 printf("Can't erase unknown flash type %08lx - aborted\n",
285 info->flash_id);
wdenkdc7c9a12003-03-26 06:55:25 +0000286 return 1;
287 }
288
289 prot = 0;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000290 for (sect = s_first; sect <= s_last; ++sect) {
291 if (info->protect[sect])
wdenkdc7c9a12003-03-26 06:55:25 +0000292 prot++;
wdenkdc7c9a12003-03-26 06:55:25 +0000293 }
294
295 if (prot) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000296 printf("- Warning: %d protected sectors will not be erased!\n",
wdenkdc7c9a12003-03-26 06:55:25 +0000297 prot);
298 } else {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000299 printf("\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000300 }
301
302 l_sect = -1;
303
304 /* Disable interrupts which might cause a timeout here */
305 flag = disable_interrupts();
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000306
307#if defined(CONFIG_BOOT_8B)
308 my_out_8((unsigned char *)((ulong)addr + 0x555), 0xaa);
309 my_out_8((unsigned char *)((ulong)addr + 0x2aa), 0x55);
310 my_out_8((unsigned char *)((ulong)addr + 0x555), 0x90);
311
312 in_mid = my_in_8((unsigned char *)addr);
313 in_did = my_in_8((unsigned char *)((ulong)addr + 1));
314
315 printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did);
316
317 my_out_8((unsigned char *)addr, 0xf0);
wdenkdc7c9a12003-03-26 06:55:25 +0000318 udelay(1);
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000319
320 my_out_8((unsigned char *)((ulong)addr + 0x555), 0xaa);
321 my_out_8((unsigned char *)((ulong)addr + 0x2aa), 0x55);
322 my_out_8((unsigned char *)((ulong)addr + 0x555), 0x80);
323 my_out_8((unsigned char *)((ulong)addr + 0x555), 0xaa);
324 my_out_8((unsigned char *)((ulong)addr + 0x2aa), 0x55);
325
wdenkdc7c9a12003-03-26 06:55:25 +0000326 /* Start erase on unprotected sectors */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000327 for (sect = s_first; sect <= s_last; sect++) {
wdenkdc7c9a12003-03-26 06:55:25 +0000328 if (info->protect[sect] == 0) { /* not protected */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000329 addr = (vu_long *) (info->start[sect]);
wdenk8bde7f72003-06-27 21:31:46 +0000330 /*addr[0] = 0x00300030; */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000331 my_out_8((unsigned char *)((ulong)addr), 0x30);
wdenkdc7c9a12003-03-26 06:55:25 +0000332 l_sect = sect;
333 }
334 }
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000335#elif defined(CONFIG_BOOT_16B)
336 my_out_be16((unsigned short *)((ulong)addr + (0xaaa)), 0xaa);
337 my_out_be16((unsigned short *)((ulong)addr + (0x554)), 0x55);
338 my_out_be16((unsigned short *)((ulong)addr + (0xaaa)), 0x90);
339 in_mid = my_in_be16((unsigned short *)addr);
340 in_did = my_in_be16((unsigned short *)((ulong)addr + 2));
341 printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did);
342 my_out_be16((unsigned short *)addr, 0xf0);
wdenkdc7c9a12003-03-26 06:55:25 +0000343 udelay(1);
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000344 my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xaa);
345 my_out_be16((unsigned short *)((ulong)addr + 0x554), 0x55);
346 my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0x80);
347 my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xaa);
348 my_out_be16((unsigned short *)((ulong)addr + 0x554), 0x55);
wdenkdc7c9a12003-03-26 06:55:25 +0000349 /* Start erase on unprotected sectors */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000350 for (sect = s_first; sect <= s_last; sect++) {
wdenkdc7c9a12003-03-26 06:55:25 +0000351 if (info->protect[sect] == 0) { /* not protected */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000352 addr = (vu_long *) (info->start[sect]);
353 my_out_be16((unsigned short *)((ulong)addr), 0x30);
wdenkdc7c9a12003-03-26 06:55:25 +0000354 l_sect = sect;
355 }
356 }
357
358#elif defined(CONFIG_BOOT_32B)
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000359 my_out_be32((unsigned *)((ulong)addr + 0x1554), 0xaa);
360 my_out_be32((unsigned *)((ulong)addr + 0xaa8), 0x55);
361 my_out_be32((unsigned *)((ulong)addr + 0x1554), 0x90);
362
363 in_mid = my_in_be32((unsigned *)addr);
364 in_did = my_in_be32((unsigned *)((ulong)addr + 4));
365
366 printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did);
367
368 my_out_be32((unsigned *) addr, 0xf0);
wdenkdc7c9a12003-03-26 06:55:25 +0000369 udelay(1);
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000370
371 my_out_be32((unsigned *)((ulong)addr + 0x1554), 0xaa);
372 my_out_be32((unsigned *)((ulong)addr + 0xaa8), 0x55);
373 my_out_be32((unsigned *)((ulong)addr + 0x1554), 0x80);
374 my_out_be32((unsigned *)((ulong)addr + 0x1554), 0xaa);
375 my_out_be32((unsigned *)((ulong)addr + 0xaa8), 0x55);
376
wdenkdc7c9a12003-03-26 06:55:25 +0000377 /* Start erase on unprotected sectors */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000378 for (sect = s_first; sect <= s_last; sect++) {
wdenkdc7c9a12003-03-26 06:55:25 +0000379 if (info->protect[sect] == 0) { /* not protected */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000380 addr = (vu_long *) (info->start[sect]);
381 my_out_be32((unsigned *)((ulong)addr), 0x00300030);
wdenkdc7c9a12003-03-26 06:55:25 +0000382 l_sect = sect;
383 }
384 }
385
386#else
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000387#error CONFIG_BOOT_(size)B missing.
wdenkdc7c9a12003-03-26 06:55:25 +0000388#endif
389 /* re-enable interrupts if necessary */
390 if (flag)
391 enable_interrupts();
392
393 /* wait at least 80us - let's wait 1 ms */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000394 udelay(1000);
wdenkdc7c9a12003-03-26 06:55:25 +0000395
396 /*
397 * We wait for the last triggered sector
398 */
399 if (l_sect < 0)
400 goto DONE;
401
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000402 start = get_timer(0);
403 last = start;
404 addr = (vu_long *) (info->start[l_sect]);
405#if defined(CONFIG_BOOT_8B)
406 while ((my_in_8((unsigned char *) addr) & 0x80) != 0x80)
407#elif defined(CONFIG_BOOT_16B)
408 while ((my_in_be16((unsigned short *) addr) & 0x0080) != 0x0080)
wdenkdc7c9a12003-03-26 06:55:25 +0000409#elif defined(CONFIG_BOOT_32B)
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000410 while ((my_in_be32((unsigned *) addr) & 0x00800080) != 0x00800080)
wdenkdc7c9a12003-03-26 06:55:25 +0000411#else
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000412#error CONFIG_BOOT_(size)B missing.
wdenkdc7c9a12003-03-26 06:55:25 +0000413#endif
414 {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000415 now = get_timer(start);
416 if (now > CONFIG_SYS_FLASH_ERASE_TOUT) {
417 printf("Timeout\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000418 return 1;
419 }
420 /* show that we're waiting */
421 if ((now - last) > 1000) { /* every second */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000422 putc('.');
wdenkdc7c9a12003-03-26 06:55:25 +0000423 last = now;
424 }
425 }
426DONE:
427 /* reset to read mode */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000428 addr = (volatile unsigned long *) info->start[0];
429
430#if defined(CONFIG_BOOT_8B)
431 my_out_8((unsigned char *) addr, 0xf0);
432#elif defined(CONFIG_BOOT_16B)
433 my_out_be16((unsigned short *) addr, 0x00f0);
wdenkdc7c9a12003-03-26 06:55:25 +0000434#elif defined(CONFIG_BOOT_32B)
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000435 my_out_be32((unsigned *) addr, 0x00F000F0); /* reset bank */
wdenkdc7c9a12003-03-26 06:55:25 +0000436#else
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000437#error CONFIG_BOOT_(size)B missing.
wdenkdc7c9a12003-03-26 06:55:25 +0000438#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000439 printf(" done\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000440 return 0;
441}
442
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000443/*
wdenkdc7c9a12003-03-26 06:55:25 +0000444 * Copy memory to flash, returns:
445 * 0 - OK
446 * 1 - write timeout
447 * 2 - Flash not erased
448 */
449
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000450int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
wdenkdc7c9a12003-03-26 06:55:25 +0000451{
452 ulong cp, wp, data;
453 int i, l, rc;
454
455 wp = (addr & ~3); /* get lower word aligned address */
456
457 /*
458 * handle unaligned start bytes
459 */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000460 l = addr - wp;
461
462 if (l != 0) {
wdenkdc7c9a12003-03-26 06:55:25 +0000463 data = 0;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000464 for (i = 0, cp = wp; i < l; ++i, ++cp)
465 data = (data << 8) | (*(uchar *) cp);
466
467 for (; i < 4 && cnt > 0; ++i) {
wdenkdc7c9a12003-03-26 06:55:25 +0000468 data = (data << 8) | *src++;
469 --cnt;
470 ++cp;
471 }
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000472 for (; cnt == 0 && i < 4; ++i, ++cp)
473 data = (data << 8) | (*(uchar *) cp);
wdenkdc7c9a12003-03-26 06:55:25 +0000474
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000475 rc = write_word(info, wp, data);
476
477 if (rc != 0)
478 return rc;
479
wdenkdc7c9a12003-03-26 06:55:25 +0000480 wp += 4;
481 }
482
483 /*
484 * handle word aligned part
485 */
486 while (cnt >= 4) {
487 data = 0;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000488 for (i = 0; i < 4; ++i)
wdenkdc7c9a12003-03-26 06:55:25 +0000489 data = (data << 8) | *src++;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000490
491 rc = write_word(info, wp, data);
492
493 if (rc != 0)
494 return rc;
495
496 wp += 4;
wdenkdc7c9a12003-03-26 06:55:25 +0000497 cnt -= 4;
498 }
499
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000500 if (cnt == 0)
501 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +0000502
503 /*
504 * handle unaligned tail bytes
505 */
506 data = 0;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000507 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
wdenkdc7c9a12003-03-26 06:55:25 +0000508 data = (data << 8) | *src++;
509 --cnt;
510 }
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000511 for (; i < 4; ++i, ++cp)
512 data = (data << 8) | (*(uchar *) cp);
wdenkdc7c9a12003-03-26 06:55:25 +0000513
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000514 return write_word(info, wp, data);
wdenkdc7c9a12003-03-26 06:55:25 +0000515}
516
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000517/*
wdenkdc7c9a12003-03-26 06:55:25 +0000518 * Write a word to Flash, returns:
519 * 0 - OK
520 * 1 - write timeout
521 * 2 - Flash not erased
522 */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000523static int write_word(flash_info_t *info, ulong dest, ulong data)
wdenkdc7c9a12003-03-26 06:55:25 +0000524{
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000525 ulong addr = (ulong) (info->start[0]);
Wolfgang Denk48353242011-11-04 15:55:50 +0000526 ulong start;
wdenkdc7c9a12003-03-26 06:55:25 +0000527 int flag;
528 ulong i;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000529 int data_short[2];
wdenkdc7c9a12003-03-26 06:55:25 +0000530
531 /* Check if Flash is (sufficiently) erased */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000532 if (((ulong)*(ulong *)dest & data) != data)
533 return 2;
534
wdenkdc7c9a12003-03-26 06:55:25 +0000535 /* Disable interrupts which might cause a timeout here */
536 flag = disable_interrupts();
537#if defined(CONFIG_BOOT_8B)
538#ifdef DEBUG
539 {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000540 int in_mid, in_did;
541
542 my_out_8((unsigned char *) (addr + 0x555), 0xaa);
543 my_out_8((unsigned char *) (addr + 0x2aa), 0x55);
544 my_out_8((unsigned char *) (addr + 0x555), 0x90);
545
546 in_mid = my_in_8((unsigned char *) addr);
547 in_did = my_in_8((unsigned char *) (addr + 1));
548
549 printf(" man ID=0x%x, dev ID=0x%x.\n", in_mid, in_did);
550
551 my_out_8((unsigned char *) addr, 0xf0);
552 udelay(1);
wdenkdc7c9a12003-03-26 06:55:25 +0000553 }
554#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000555 {
556 int data_ch[4];
wdenkdc7c9a12003-03-26 06:55:25 +0000557
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000558 data_ch[0] = (int) ((data >> 24) & 0xff);
559 data_ch[1] = (int) ((data >> 16) & 0xff);
560 data_ch[2] = (int) ((data >> 8) & 0xff);
561 data_ch[3] = (int) (data & 0xff);
562
563 for (i = 0; i < 4; i++) {
564 my_out_8((unsigned char *) (addr + 0x555), 0xaa);
565 my_out_8((unsigned char *) (addr + 0x2aa), 0x55);
566 my_out_8((unsigned char *) (addr + 0x555), 0xa0);
567 my_out_8((unsigned char *) (dest + i), data_ch[i]);
568
569 /* re-enable interrupts if necessary */
570 if (flag)
571 enable_interrupts();
572
573 start = get_timer(0);
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000574 while ((my_in_8((unsigned char *)(dest + i))) !=
575 (data_ch[i])) {
576 if (get_timer(start) >
577 CONFIG_SYS_FLASH_WRITE_TOUT) {
578 return 1;
579 }
580 }
581 } /* for */
wdenkdc7c9a12003-03-26 06:55:25 +0000582 }
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000583#elif defined(CONFIG_BOOT_16B)
584 data_short[0] = (int) (data >> 16) & 0xffff;
585 data_short[1] = (int) data & 0xffff;
586 for (i = 0; i < 2; i++) {
587 my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xaa);
588 my_out_be16((unsigned short *)((ulong)addr + 0x554), 0x55);
589 my_out_be16((unsigned short *)((ulong)addr + 0xaaa), 0xa0);
590 my_out_be16((unsigned short *)(dest + (i * 2)),
591 data_short[i]);
592
593 /* re-enable interrupts if necessary */
594 if (flag)
595 enable_interrupts();
596
597 start = get_timer(0);
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000598 while ((my_in_be16((unsigned short *)(dest + (i * 2)))) !=
599 (data_short[i])) {
600 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
601 return 1;
602 }
603 }
604#elif defined(CONFIG_BOOT_32B)
wdenkdc7c9a12003-03-26 06:55:25 +0000605 addr[0x0555] = 0x00AA00AA;
606 addr[0x02AA] = 0x00550055;
607 addr[0x0555] = 0x00A000A0;
608
609 *((vu_long *)dest) = data;
610
611 /* re-enable interrupts if necessary */
612 if (flag)
613 enable_interrupts();
614
615 /* data polling for D7 */
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000616 start = get_timer(0);
wdenkdc7c9a12003-03-26 06:55:25 +0000617 while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000618 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
619 return 1;
wdenkdc7c9a12003-03-26 06:55:25 +0000620 }
621#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000622 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +0000623}
624
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000625#ifdef CONFIG_BOOT_8B
626static int my_in_8(unsigned char *addr)
wdenkdc7c9a12003-03-26 06:55:25 +0000627{
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000628 int ret;
629 __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr));
630
631 return ret;
632}
633
634static void my_out_8(unsigned char *addr, int val)
635{
636 __asm__ __volatile__("stb%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val));
wdenkdc7c9a12003-03-26 06:55:25 +0000637}
638#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000639#ifdef CONFIG_BOOT_16B
640static int my_in_be16(unsigned short *addr)
wdenkdc7c9a12003-03-26 06:55:25 +0000641{
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000642 int ret;
643 __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr));
644
645 return ret;
wdenkdc7c9a12003-03-26 06:55:25 +0000646}
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000647
648static void my_out_be16(unsigned short *addr, int val)
wdenkdc7c9a12003-03-26 06:55:25 +0000649{
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000650 __asm__ __volatile__("sth%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val));
wdenkdc7c9a12003-03-26 06:55:25 +0000651}
652#endif
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000653#ifdef CONFIG_BOOT_32B
654static unsigned my_in_be32(unsigned *addr)
wdenkdc7c9a12003-03-26 06:55:25 +0000655{
wdenk8bde7f72003-06-27 21:31:46 +0000656 unsigned ret;
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000657 __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio":"=r"(ret):"m"(*addr));
658
659 return ret;
wdenkdc7c9a12003-03-26 06:55:25 +0000660}
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000661
662static void my_out_be32(unsigned *addr, int val)
wdenkdc7c9a12003-03-26 06:55:25 +0000663{
Wolfgang Denk8adc9052011-11-04 15:55:49 +0000664 __asm__ __volatile__("stw%U0%X0 %1,%0; eieio":"=m"(*addr):"r"(val));
wdenkdc7c9a12003-03-26 06:55:25 +0000665}
666#endif