blob: 32f7ba39253548437f85bdd66a04898063fb869a [file] [log] [blame]
Dirk Eibachb209a112009-07-17 14:16:40 +02001/*
2 * (C) Copyright 2009
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Dirk Eibachb209a112009-07-17 14:16:40 +02006 */
7
8#include <common.h>
9#include <command.h>
10#include <asm/processor.h>
11#include <asm/io.h>
Stefan Roese09887762010-09-16 14:30:37 +020012#include <asm/ppc4xx-gpio.h>
Dirk Eibachb209a112009-07-17 14:16:40 +020013
14enum {
15 HWTYPE_DLVISION_CPU = 0,
16 HWTYPE_DLVISION_CON = 1,
17};
18
19#define HWREV_100 6
20
21int board_early_init_f(void)
22{
Stefan Roese952e7762009-09-24 09:55:50 +020023 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
24 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
25 mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
26 mtdcr(UIC0PR, 0xFFFFFF80); /* set int polarities */
27 mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
28 mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest prio */
29 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
Dirk Eibachb209a112009-07-17 14:16:40 +020030
31 /*
32 * EBC Configuration Register: set ready timeout to 512 ebc-clks
33 * -> ca. 15 us
34 */
Stefan Roesed1c3b272009-09-09 16:25:29 +020035 mtebc(EBC0_CFG, 0xa8400000); /* ebc always driven */
Dirk Eibachb209a112009-07-17 14:16:40 +020036
37 /*
38 * setup io-latches
39 */
40 out_le16((void *)CONFIG_SYS_LATCH_BASE, 0x00f0);
41 out_le16((void *)(CONFIG_SYS_LATCH_BASE + 0x100), 0x0002);
42 out_le16((void *)(CONFIG_SYS_LATCH_BASE + 0x200), 0x0000);
43 return 0;
44}
45
46int misc_init_r(void)
47{
48 /*
49 * set "startup-finished"-gpios
50 */
51 gpio_write_bit(21, 0);
52 gpio_write_bit(22, 1);
53
54 return 0;
55}
56
57/*
58 * Check Board Identity:
59 */
60int checkboard(void)
61{
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000062 char buf[64];
63 int i = getenv_f("serial#", buf, sizeof(buf));
Dirk Eibachb209a112009-07-17 14:16:40 +020064 u8 channel2_msr = in_8((void *)CONFIG_UART_BASE + 0x26);
65 u8 channel3_msr = in_8((void *)CONFIG_UART_BASE + 0x36);
66 u8 channel7_msr = in_8((void *)CONFIG_UART_BASE + 0x76);
67 u8 unit_type;
68 u8 local_con;
69 u8 audio;
70 u8 hardware_version;
71
72 printf("Board: ");
73
74 unit_type = (channel2_msr & 0x80) ? 0x01 : 0x00;
75 local_con = (channel2_msr & 0x20) ? 0x01 : 0x00;
76 audio = (channel3_msr & 0x20) ? 0x01 : 0x00;
77 hardware_version =
78 ((channel7_msr & 0x20) ? 0x01 : 0x00)
79 | ((channel7_msr & 0x80) ? 0x02 : 0x00)
80 | ((channel7_msr & 0x40) ? 0x04 : 0x00);
81
82 switch (unit_type) {
83 case HWTYPE_DLVISION_CON:
84 printf("DL-Vision-CON");
85 break;
86
87 case HWTYPE_DLVISION_CPU:
88 printf("DL-Vision-CPU");
89 break;
90
91 default:
92 printf("UnitType %d, unsupported", unit_type);
93 break;
94 }
95
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000096 if (i > 0) {
Dirk Eibachb209a112009-07-17 14:16:40 +020097 puts(", serial# ");
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000098 puts(buf);
Dirk Eibachb209a112009-07-17 14:16:40 +020099 }
100 puts("\n ");
101
102 switch (hardware_version) {
103 case HWREV_100:
104 printf("HW-Ver 1.00");
105 break;
106
107 default:
108 printf("HW-Ver %d, unsupported",
109 hardware_version);
110 break;
111 }
112
113 if (local_con)
114 printf(", local console");
115
116 if (audio)
117 printf(", audio support");
118
119 puts("\n");
120
121 return 0;
122}