Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 2 | /* |
Marcel Ziswiler | 9f9ecdf | 2019-03-25 17:25:01 +0100 | [diff] [blame] | 3 | * Copyright 2015-2019 Toradex, Inc. |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 4 | * |
Marcel Ziswiler | b891d01 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 5 | * Configuration settings for the Toradex VF50/VF61 modules. |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 6 | * |
| 7 | * Based on vf610twr.h: |
| 8 | * Copyright 2013 Freescale Semiconductor, Inc. |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
| 14 | #include <asm/arch/imx-regs.h> |
Marcel Ziswiler | c12e415 | 2019-03-25 17:25:02 +0100 | [diff] [blame] | 15 | #include <linux/sizes.h> |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 16 | |
Gong Qianyu | 18fb0e3 | 2015-10-26 19:47:42 +0800 | [diff] [blame] | 17 | #define CONFIG_SYS_FSL_CLK |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 18 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 19 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 20 | |
Stefan Agner | 80b9c3b | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 21 | #ifdef CONFIG_VIDEO_FSL_DCU_FB |
Stefan Agner | 80b9c3b | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 22 | #define CONFIG_SPLASH_SCREEN_ALIGN |
| 23 | #define CONFIG_VIDEO_LOGO |
| 24 | #define CONFIG_VIDEO_BMP_LOGO |
| 25 | #define CONFIG_SYS_FSL_DCU_LE |
| 26 | |
| 27 | #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR |
| 28 | #define DCU_LAYER_MAX_NUM 64 |
| 29 | #endif |
| 30 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 31 | /* Size of malloc() pool */ |
Marcel Ziswiler | c12e415 | 2019-03-25 17:25:02 +0100 | [diff] [blame] | 32 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 33 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 34 | /* Allow to overwrite serial and ethaddr */ |
| 35 | #define CONFIG_ENV_OVERWRITE |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 36 | |
| 37 | /* NAND support */ |
Stefan Agner | 8fca2d8 | 2015-05-08 19:07:13 +0200 | [diff] [blame] | 38 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 39 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 40 | |
| 41 | #define CONFIG_IPADDR 192.168.10.2 |
| 42 | #define CONFIG_NETMASK 255.255.255.0 |
| 43 | #define CONFIG_SERVERIP 192.168.10.1 |
| 44 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 45 | #define CONFIG_LOADADDR 0x80008000 |
| 46 | #define CONFIG_FDTADDR 0x84000000 |
| 47 | |
| 48 | /* We boot from the gfxRAM area of the OCRAM. */ |
Stefan Agner | c0f432c | 2017-10-17 13:59:19 +0200 | [diff] [blame] | 49 | #define CONFIG_BOARD_SIZE_LIMIT 520192 |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 50 | |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 51 | #define MEM_LAYOUT_ENV_SETTINGS \ |
| 52 | "bootm_size=0x10000000\0" \ |
| 53 | "fdt_addr_r=0x82000000\0" \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 54 | "kernel_addr_r=0x81000000\0" \ |
| 55 | "pxefile_addr_r=0x87100000\0" \ |
| 56 | "ramdisk_addr_r=0x82100000\0" \ |
| 57 | "scriptaddr=0x87000000\0" |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 58 | |
Igor Opaniuk | 97c4275 | 2019-12-09 12:33:32 +0200 | [diff] [blame] | 59 | #define UBOOT_UPDATE \ |
| 60 | "update_uboot=nand erase.part u-boot && " \ |
| 61 | "nand write ${loadaddr} u-boot ${filesize}\0" \ |
| 62 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 63 | #define NFS_BOOTCMD \ |
| 64 | "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ |
| 65 | "nfsboot=run setup; " \ |
| 66 | "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ |
| 67 | "${setupargs} ${vidargs}; echo Booting from NFS...;" \ |
| 68 | "dhcp ${kernel_addr_r} && " \ |
| 69 | "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ |
Sanchayan Maity | faf1e62 | 2016-12-02 14:28:27 +0530 | [diff] [blame] | 70 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 71 | |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 72 | #define UBI_BOOTCMD \ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 73 | "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ |
| 74 | "ubi.fm_autoconvert=1\0" \ |
| 75 | "ubiboot=run setup; " \ |
| 76 | "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ |
| 77 | "${setupargs} ${vidargs}; echo Booting from NAND...; " \ |
Sanchayan Maity | 3ed82d6 | 2016-11-25 16:19:17 +0530 | [diff] [blame] | 78 | "ubi part ubi && " \ |
| 79 | "ubi read ${kernel_addr_r} kernel && " \ |
| 80 | "ubi read ${fdt_addr_r} dtb && " \ |
Sanchayan Maity | faf1e62 | 2016-12-02 14:28:27 +0530 | [diff] [blame] | 81 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 82 | |
Stefan Agner | 304042c | 2019-03-25 17:25:04 +0100 | [diff] [blame] | 83 | #define CONFIG_BOOTCOMMAND "run ubiboot; " \ |
| 84 | "setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;" |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 85 | |
| 86 | #define BOOT_TARGET_DEVICES(func) \ |
| 87 | func(MMC, mmc, 0) \ |
| 88 | func(USB, usb, 0) \ |
| 89 | func(DHCP, dhcp, na) |
| 90 | #include <config_distro_bootcmd.h> |
| 91 | #undef BOOTENV_RUN_NET_USB_START |
| 92 | #define BOOTENV_RUN_NET_USB_START "" |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 93 | |
Sanchayan Maity | bba97cd | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 94 | #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" |
| 95 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 96 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 97 | BOOTENV \ |
| 98 | MEM_LAYOUT_ENV_SETTINGS \ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 99 | NFS_BOOTCMD \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 100 | UBI_BOOTCMD \ |
Igor Opaniuk | 97c4275 | 2019-12-09 12:33:32 +0200 | [diff] [blame] | 101 | UBOOT_UPDATE \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 102 | "console=ttyLP0\0" \ |
Stefan Agner | 389d680 | 2019-03-25 17:25:07 +0100 | [diff] [blame] | 103 | "defargs=user_debug=30\0" \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 104 | "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ |
| 105 | "fdt_board=eval-v3\0" \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 106 | "fdt_fixup=;\0" \ |
Max Krummenacher | 1fd988a | 2020-06-16 22:20:05 +0300 | [diff] [blame] | 107 | "kernel_image=zImage\0" \ |
Stefan Agner | 06487fd | 2019-03-25 17:25:03 +0100 | [diff] [blame] | 108 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
| 109 | "setsdupdate=mmc rescan && set interface mmc && " \ |
| 110 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ |
| 111 | "source ${loadaddr}\0" \ |
| 112 | "setup=setenv setupargs console=tty1 console=${console}" \ |
| 113 | ",${baudrate}n8 ${memargs}\0" \ |
| 114 | "setupdate=run setsdupdate || run setusbupdate\0" \ |
| 115 | "setusbupdate=usb start && set interface usb && " \ |
| 116 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ |
| 117 | "source ${loadaddr}\0" \ |
| 118 | "splashpos=m,m\0" \ |
| 119 | "video-mode=dcufb:640x480-16@60,monitor=lcd\0" |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 120 | |
| 121 | /* Miscellaneous configurable options */ |
Sanchayan Maity | aa5a0d9 | 2015-06-08 12:40:41 +0530 | [diff] [blame] | 122 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 123 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 124 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 125 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 126 | #define CONFIG_SYS_HZ 1000 |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 127 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 128 | /* Physical memory map */ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 129 | #define PHYS_SDRAM (0x80000000) |
Marcel Ziswiler | c12e415 | 2019-03-25 17:25:02 +0100 | [diff] [blame] | 130 | #define PHYS_SDRAM_SIZE (256 * SZ_1M) |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 131 | |
| 132 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 133 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 134 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 135 | |
| 136 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 137 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 138 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 139 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 140 | |
| 141 | /* Environment organization */ |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 142 | #ifdef CONFIG_ENV_IS_IN_NAND |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 143 | #define CONFIG_ENV_RANGE (4 * 64 * 2048) |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 144 | #endif |
| 145 | |
Sanchayan Maity | bba97cd | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 146 | /* USB Host Support */ |
Sanchayan Maity | bba97cd | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 147 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 148 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 149 | |
Sanchayan Maity | bba97cd | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 150 | /* USB DFU */ |
Marcel Ziswiler | c12e415 | 2019-03-25 17:25:02 +0100 | [diff] [blame] | 151 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) |
Sanchayan Maity | bba97cd | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 152 | |
Sanchayan Maity | e7b860f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 153 | #endif /* __CONFIG_H */ |