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wdenk153d5112002-08-30 11:07:04 +00001/*
stroese8b1ccd82004-09-16 12:34:51 +00002 * (C) Copyright 2001-2004
wdenk153d5112002-08-30 11:07:04 +00003 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk153d5112002-08-30 11:07:04 +00006 */
7
8#include <common.h>
9#include "ar405.h"
10#include <asm/processor.h>
Matthias Fuchs049216f2009-02-20 10:19:18 +010011#include <asm/io.h>
wdenk153d5112002-08-30 11:07:04 +000012#include <command.h>
wdenk153d5112002-08-30 11:07:04 +000013
Wolfgang Denkd87080b2006-03-31 18:32:53 +020014DECLARE_GLOBAL_DATA_PTR;
15
stroese8b1ccd82004-09-16 12:34:51 +000016extern void lxt971_no_sleep(void);
wdenk153d5112002-08-30 11:07:04 +000017
18/* ------------------------------------------------------------------------- */
19
20#if 0
21#define FPGA_DEBUG
22#endif
23
24/* fpga configuration data - generated by bin2cc */
25const unsigned char fpgadata[] = {
26#include "fpgadata.c"
27};
28
stroese8b1ccd82004-09-16 12:34:51 +000029const unsigned char fpgadata_xl30[] = {
30#include "fpgadata_xl30.c"
31};
32
wdenk153d5112002-08-30 11:07:04 +000033/*
34 * include common fpga code (for esd boards)
35 */
36#include "../common/fpga.c"
37
38
wdenkc837dcb2004-01-20 23:12:12 +000039int board_early_init_f (void)
wdenk153d5112002-08-30 11:07:04 +000040{
wdenk153d5112002-08-30 11:07:04 +000041 int index, len, i;
42 int status;
43
44#ifdef FPGA_DEBUG
45 /* set up serial port with default baudrate */
46 (void) get_clocks ();
47 gd->baudrate = CONFIG_BAUDRATE;
48 serial_init ();
49 console_init_f ();
50#endif
51
52 /*
53 * Boot onboard FPGA
54 */
stroese8b1ccd82004-09-16 12:34:51 +000055 /* first try 40er image */
56 gd->board_type = 40;
wdenk153d5112002-08-30 11:07:04 +000057 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
58 if (status != 0) {
stroese8b1ccd82004-09-16 12:34:51 +000059 /* try xl30er image */
60 gd->board_type = 30;
61 status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
62 if (status != 0) {
63 /* booting FPGA failed */
wdenk153d5112002-08-30 11:07:04 +000064#ifndef FPGA_DEBUG
stroese8b1ccd82004-09-16 12:34:51 +000065 /* set up serial port with default baudrate */
66 (void) get_clocks ();
67 gd->baudrate = CONFIG_BAUDRATE;
68 serial_init ();
69 console_init_f ();
wdenk153d5112002-08-30 11:07:04 +000070#endif
stroese8b1ccd82004-09-16 12:34:51 +000071 printf ("\nFPGA: Booting failed ");
72 switch (status) {
73 case ERROR_FPGA_PRG_INIT_LOW:
74 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
75 break;
76 case ERROR_FPGA_PRG_INIT_HIGH:
77 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
78 break;
79 case ERROR_FPGA_PRG_DONE:
80 printf ("(Timeout: DONE not high after programming FPGA)\n ");
81 break;
82 }
wdenk153d5112002-08-30 11:07:04 +000083
stroese8b1ccd82004-09-16 12:34:51 +000084 /* display infos on fpgaimage */
85 index = 15;
86 for (i = 0; i < 4; i++) {
87 len = fpgadata[index];
88 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
89 index += len + 3;
90 }
91 putc ('\n');
92 /* delayed reboot */
93 for (i = 20; i > 0; i--) {
94 printf ("Rebooting in %2d seconds \r", i);
95 for (index = 0; index < 1000; index++)
96 udelay (1000);
97 }
98 putc ('\n');
99 do_reset (NULL, 0, 0, NULL);
wdenk153d5112002-08-30 11:07:04 +0000100 }
wdenk153d5112002-08-30 11:07:04 +0000101 }
102
103 /*
104 * IRQ 0-15 405GP internally generated; active high; level sensitive
105 * IRQ 16 405GP internally generated; active low; level sensitive
106 * IRQ 17-24 RESERVED
107 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
108 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
109 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
110 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
111 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
112 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
113 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
114 */
Stefan Roese952e7762009-09-24 09:55:50 +0200115 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
116 mtdcr (UIC0ER, 0x00000000); /* disable all ints */
117 mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
118 mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
119 mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
120 mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
121 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
wdenk153d5112002-08-30 11:07:04 +0000122
Matthias Fuchs049216f2009-02-20 10:19:18 +0100123 out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */
wdenk153d5112002-08-30 11:07:04 +0000124
125 return 0;
126}
127
wdenk153d5112002-08-30 11:07:04 +0000128/*
129 * Check Board Identity:
130 */
wdenk153d5112002-08-30 11:07:04 +0000131int checkboard (void)
132{
133 int index;
134 int len;
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200135 char str[64];
Wolfgang Denkcdb74972010-07-24 21:55:43 +0200136 int i = getenv_f("serial#", str, sizeof (str));
stroese8b1ccd82004-09-16 12:34:51 +0000137 const unsigned char *fpga;
wdenk153d5112002-08-30 11:07:04 +0000138
139 puts ("Board: ");
140
stroese8b1ccd82004-09-16 12:34:51 +0000141 if (i == -1) {
142 puts ("### No HW ID - assuming AR405");
143 } else {
144 puts(str);
wdenk153d5112002-08-30 11:07:04 +0000145 }
146
wdenk153d5112002-08-30 11:07:04 +0000147 puts ("\nFPGA: ");
148
149 /* display infos on fpgaimage */
stroese8b1ccd82004-09-16 12:34:51 +0000150 if (gd->board_type == 30) {
151 fpga = fpgadata_xl30;
152 } else {
153 fpga = fpgadata;
154 }
wdenk153d5112002-08-30 11:07:04 +0000155 index = 15;
156 for (i = 0; i < 4; i++) {
stroese8b1ccd82004-09-16 12:34:51 +0000157 len = fpga[index];
158 printf ("%s ", &(fpga[index + 1]));
wdenk153d5112002-08-30 11:07:04 +0000159 index += len + 3;
160 }
161
162 putc ('\n');
163
stroese8b1ccd82004-09-16 12:34:51 +0000164 /*
165 * Disable sleep mode in LXT971
166 */
167 lxt971_no_sleep();
168
wdenk153d5112002-08-30 11:07:04 +0000169 return 0;
170}
171
stroese8d3efe42004-12-16 18:30:36 +0000172
173#if 1 /* test-only: some internal test routines... */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100174#define DIGEN ((void *)0xf03000b4) /* u8 */
175#define DIGOUT ((void *)0xf03000b0) /* u16 */
176#define DIGIN ((void *)0xf03000a0) /* u16 */
177
stroese8d3efe42004-12-16 18:30:36 +0000178/*
179 * Some test routines
180 */
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200181int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000182{
stroese8d3efe42004-12-16 18:30:36 +0000183 int i;
184 int k;
185 int start;
186 int end;
187
188 if (argc != 3) {
189 puts("Usage: digtest n_start n_end (digtest 0 7)\n");
190 return 0;
191 }
192
193 start = simple_strtol (argv[1], NULL, 10);
194 end = simple_strtol (argv[2], NULL, 10);
195
196 /*
197 * Enable digital outputs
198 */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100199 out_8(DIGEN, 0x08);
stroese8d3efe42004-12-16 18:30:36 +0000200
201 printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
202 start, end);
203
204 /*
205 * Set outputs one by one
206 */
207 for (;;) {
208 for (i=start; i<=end; i++) {
Matthias Fuchs049216f2009-02-20 10:19:18 +0100209 out_be16(DIGOUT, 0x0001 << i);
stroese8d3efe42004-12-16 18:30:36 +0000210 for (k=0; k<200; k++)
211 udelay(1000);
212
Matthias Fuchs049216f2009-02-20 10:19:18 +0100213 if (in_be16(DIGIN) != (0x0001 << i)) {
214 printf("ERROR: OUT=0x%04X, IN=0x%04X\n",
215 0x0001 << i, in_be16(DIGIN));
stroese8d3efe42004-12-16 18:30:36 +0000216 return 0;
217 }
218
219 /* Abort if ctrl-c was pressed */
220 if (ctrlc()) {
221 puts("\nAbort\n");
222 return 0;
223 }
224 }
225 }
226
227 return 0;
228}
229U_BOOT_CMD(
230 digtest, 3, 1, do_digtest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600231 "Test digital in-/output",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200232 ""
233);
stroese8d3efe42004-12-16 18:30:36 +0000234
235#define ERROR_DELTA 256
236
237struct io {
Matthias Fuchs049216f2009-02-20 10:19:18 +0100238 short val;
stroese8d3efe42004-12-16 18:30:36 +0000239 short dummy;
240};
241
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200242int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000243{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100244 short val;
stroese8d3efe42004-12-16 18:30:36 +0000245 int i;
246 int volt;
247 struct io *out;
248 struct io *in;
249
250 out = (struct io *)0xf0300090;
251 in = (struct io *)0xf0300000;
252
253 i = simple_strtol (argv[1], NULL, 10);
254
255 volt = 0;
256 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100257 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000258 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100259 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000260 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
261 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
262 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
263 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
264 ((volt * 0x7fff) / 40) + ERROR_DELTA);
265 return -1;
266 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100267 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000268 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
269 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
270 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
271 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
272 ((volt * 0x7fff) / 40) + ERROR_DELTA);
273 return -1;
274 }
275
276 volt = 5;
277 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100278 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000279 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100280 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000281 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
282 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
283 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
284 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
285 ((volt * 0x7fff) / 40) + ERROR_DELTA);
286 return -1;
287 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100288 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000289 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
290 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
291 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
292 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
293 ((volt * 0x7fff) / 40) + ERROR_DELTA);
294 return -1;
295 }
296
297 volt = 10;
298 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100299 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000300 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100301 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000302 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
303 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
304 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
305 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
306 ((volt * 0x7fff) / 40) + ERROR_DELTA);
307 return -1;
308 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100309 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000310 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
311 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
312 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
313 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
314 ((volt * 0x7fff) / 40) + ERROR_DELTA);
315 return -1;
316 }
317
318 printf("Channel %d OK!\n", i);
319
320 return 0;
321}
322U_BOOT_CMD(
323 anatest, 2, 1, do_anatest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600324 "Test analog in-/output",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200325 ""
326);
stroese8d3efe42004-12-16 18:30:36 +0000327
328
329int counter = 0;
330
331void cyclicInt(void *ptr)
332{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100333 out_be16((void *)0xf03000e8, 0x0800); /* ack int */
stroese8d3efe42004-12-16 18:30:36 +0000334 counter++;
335}
336
337
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200338int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000339{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100340 ulong *incin;
stroese8d3efe42004-12-16 18:30:36 +0000341 int i;
342
Matthias Fuchs049216f2009-02-20 10:19:18 +0100343 incin = (ulong *)0xf0300040;
stroese8d3efe42004-12-16 18:30:36 +0000344
345 /*
346 * Clear inc counter
347 */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100348 out_be32((void *)&incin[0], 0);
349 out_be32((void *)&incin[1], 0);
350 out_be32((void *)&incin[2], 0);
351 out_be32((void *)&incin[3], 0);
stroese8d3efe42004-12-16 18:30:36 +0000352
Matthias Fuchs049216f2009-02-20 10:19:18 +0100353 incin = (ulong *)0xf0300050;
stroese8d3efe42004-12-16 18:30:36 +0000354
355 /*
356 * Inc a little
357 */
358 for (i=0; i<10000; i++) {
359 switch (i & 0x03) {
360 case 0:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100361 out_8(DIGEN, 0x02);
stroese8d3efe42004-12-16 18:30:36 +0000362 break;
363 case 1:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100364 out_8(DIGEN, 0x03);
stroese8d3efe42004-12-16 18:30:36 +0000365 break;
366 case 2:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100367 out_8(DIGEN, 0x01);
stroese8d3efe42004-12-16 18:30:36 +0000368 break;
369 case 3:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100370 out_8(DIGEN, 0x00);
stroese8d3efe42004-12-16 18:30:36 +0000371 break;
372 }
373 udelay(10);
374 }
375
Matthias Fuchs049216f2009-02-20 10:19:18 +0100376 printf("Inc 0 = %d\n", in_be32((void *)&incin[0]));
377 printf("Inc 1 = %d\n", in_be32((void *)&incin[1]));
378 printf("Inc 2 = %d\n", in_be32((void *)&incin[2]));
379 printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));
stroese8d3efe42004-12-16 18:30:36 +0000380
Matthias Fuchs049216f2009-02-20 10:19:18 +0100381 out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */
382 out_be16((void *)0xf03000ec,
383 in_be16((void *)0xf03000ec) | 0x0800); /* enable int */
stroese8d3efe42004-12-16 18:30:36 +0000384 irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
385 printf("counter=%d\n", counter);
386
387 return 0;
388}
389U_BOOT_CMD(
390 inctest, 3, 1, do_inctest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600391 "Test incremental encoder inputs",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200392 ""
393);
stroese8d3efe42004-12-16 18:30:36 +0000394#endif