Hannes Petermaier | 072cefe | 2014-02-07 14:06:50 +0100 | [diff] [blame] | 1 | /* |
| 2 | * board.c |
| 3 | * |
| 4 | * Board functions for B&R KWB Board |
| 5 | * |
| 6 | * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> |
| 7 | * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com |
| 8 | * |
| 9 | * SPDX-License-Identifier: GPL-2.0+ |
| 10 | * |
| 11 | */ |
| 12 | #include <common.h> |
| 13 | #include <errno.h> |
| 14 | #include <spl.h> |
| 15 | #include <asm/arch/cpu.h> |
| 16 | #include <asm/arch/hardware.h> |
| 17 | #include <asm/arch/omap.h> |
| 18 | #include <asm/arch/ddr_defs.h> |
| 19 | #include <asm/arch/clock.h> |
| 20 | #include <asm/arch/gpio.h> |
| 21 | #include <asm/arch/sys_proto.h> |
| 22 | #include <asm/arch/mem.h> |
| 23 | #include <asm/io.h> |
| 24 | #include <asm/emif.h> |
| 25 | #include <asm/gpio.h> |
| 26 | #include <i2c.h> |
| 27 | #include <power/tps65217.h> |
| 28 | #include "../common/bur_common.h" |
| 29 | |
| 30 | /* -------------------------------------------------------------------------*/ |
| 31 | /* -- defines for used GPIO Hardware -- */ |
| 32 | #define KEY (0+4) |
| 33 | #define LCD_PWR (0+5) |
| 34 | #define PUSH_KEY (0+31) |
| 35 | #define USB2SD_NRST (32+29) |
| 36 | #define USB2SD_PWR (96+13) |
| 37 | /* -------------------------------------------------------------------------*/ |
| 38 | /* -- PSOC Resetcontroller Register defines -- */ |
| 39 | |
| 40 | /* I2C Address of controller */ |
| 41 | #define RSTCTRL_ADDR 0x75 |
| 42 | /* Register for CTRL-word */ |
| 43 | #define RSTCTRL_CTRLREG 0x01 |
| 44 | /* Register for giving some information to VxWorks OS */ |
| 45 | #define RSTCTRL_SCRATCHREG 0x04 |
| 46 | |
| 47 | /* -- defines for RSTCTRL_CTRLREG -- */ |
| 48 | #define RSTCTRL_FORCE_PWR_NEN 0x0404 |
| 49 | |
| 50 | #if defined(CONFIG_SPL_BUILD) |
| 51 | /* TODO: check ram-timing ! */ |
| 52 | static const struct ddr_data ddr3_data = { |
| 53 | .datardsratio0 = MT41K256M16HA125E_RD_DQS, |
| 54 | .datawdsratio0 = MT41K256M16HA125E_WR_DQS, |
| 55 | .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, |
| 56 | .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, |
| 57 | }; |
| 58 | static const struct cmd_control ddr3_cmd_ctrl_data = { |
| 59 | .cmd0csratio = MT41K256M16HA125E_RATIO, |
| 60 | .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
| 61 | |
| 62 | .cmd1csratio = MT41K256M16HA125E_RATIO, |
| 63 | .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
| 64 | |
| 65 | .cmd2csratio = MT41K256M16HA125E_RATIO, |
| 66 | .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
| 67 | }; |
| 68 | static struct emif_regs ddr3_emif_reg_data = { |
| 69 | .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, |
| 70 | .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, |
| 71 | .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, |
| 72 | .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, |
| 73 | .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, |
| 74 | .zq_config = MT41K256M16HA125E_ZQ_CFG, |
| 75 | .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, |
| 76 | }; |
| 77 | |
| 78 | static const struct ctrl_ioregs ddr3_ioregs = { |
| 79 | .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 80 | .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 81 | .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 82 | .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 83 | .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
| 84 | }; |
| 85 | |
| 86 | #define OSC (V_OSCK/1000000) |
| 87 | const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1}; |
| 88 | |
| 89 | void am33xx_spl_board_init(void) |
| 90 | { |
| 91 | unsigned int oldspeed; |
| 92 | unsigned short buf; |
| 93 | |
| 94 | struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; |
| 95 | struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP; |
| 96 | /* |
| 97 | * enable additional clocks of modules which are accessed later from |
| 98 | * VxWorks OS |
| 99 | */ |
| 100 | u32 *const clk_domains[] = { 0 }; |
| 101 | |
| 102 | u32 *const clk_modules_kwbspecific[] = { |
| 103 | &cmwkup->wkup_adctscctrl, |
| 104 | &cmper->spi1clkctrl, |
| 105 | &cmper->dcan0clkctrl, |
| 106 | &cmper->dcan1clkctrl, |
| 107 | &cmper->epwmss0clkctrl, |
| 108 | &cmper->epwmss1clkctrl, |
| 109 | &cmper->epwmss2clkctrl, |
| 110 | 0 |
| 111 | }; |
| 112 | do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1); |
| 113 | |
| 114 | /* power-OFF LCD-Display */ |
| 115 | gpio_direction_output(LCD_PWR, 0); |
| 116 | |
| 117 | /* setup I2C */ |
| 118 | enable_i2c0_pin_mux(); |
| 119 | i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); |
| 120 | |
| 121 | /* power-ON 3V3 via Resetcontroller */ |
| 122 | oldspeed = i2c_get_bus_speed(); |
Hannes Petermaier | aadf319 | 2014-03-08 19:09:32 +0100 | [diff] [blame] | 123 | if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) { |
Hannes Petermaier | 072cefe | 2014-02-07 14:06:50 +0100 | [diff] [blame] | 124 | buf = RSTCTRL_FORCE_PWR_NEN; |
| 125 | i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1, |
| 126 | (uint8_t *)&buf, sizeof(buf)); |
| 127 | i2c_set_bus_speed(oldspeed); |
| 128 | } else { |
| 129 | puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n"); |
| 130 | } |
| 131 | |
| 132 | #if defined(CONFIG_AM335X_USB0) |
| 133 | /* power on USB2SD Controller */ |
| 134 | gpio_direction_output(USB2SD_PWR, 1); |
| 135 | mdelay(1); |
| 136 | /* give a reset Pulse to USB2SD Controller */ |
| 137 | gpio_direction_output(USB2SD_NRST, 0); |
| 138 | mdelay(1); |
| 139 | gpio_set_value(USB2SD_NRST, 1); |
| 140 | #endif |
| 141 | pmicsetup(0); |
| 142 | } |
| 143 | |
| 144 | const struct dpll_params *get_dpll_ddr_params(void) |
| 145 | { |
| 146 | return &dpll_ddr3; |
| 147 | } |
| 148 | |
| 149 | void sdram_init(void) |
| 150 | { |
| 151 | config_ddr(400, &ddr3_ioregs, |
| 152 | &ddr3_data, |
| 153 | &ddr3_cmd_ctrl_data, |
| 154 | &ddr3_emif_reg_data, 0); |
| 155 | } |
| 156 | #endif /* CONFIG_SPL_BUILD */ |
| 157 | /* |
| 158 | * Basic board specific setup. Pinmux has been handled already. |
| 159 | */ |
| 160 | int board_init(void) |
| 161 | { |
| 162 | gpmc_init(); |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | #ifdef CONFIG_BOARD_LATE_INIT |
| 167 | int board_late_init(void) |
| 168 | { |
| 169 | const unsigned int ton = 250; |
| 170 | const unsigned int toff = 1000; |
| 171 | unsigned int cnt = 3; |
| 172 | unsigned short buf = 0xAAAA; |
| 173 | unsigned int oldspeed; |
| 174 | |
| 175 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
| 176 | TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */ |
| 177 | |
| 178 | if (gpio_get_value(KEY)) { |
| 179 | do { |
| 180 | /* turn on light */ |
| 181 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
| 182 | TPS65217_WLEDCTRL1, 0x09, 0xFF); |
| 183 | mdelay(ton); |
| 184 | /* turn off light */ |
| 185 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
| 186 | TPS65217_WLEDCTRL1, 0x01, 0xFF); |
| 187 | mdelay(toff); |
| 188 | cnt--; |
| 189 | if (!gpio_get_value(KEY) && |
| 190 | gpio_get_value(PUSH_KEY) && 1 == cnt) { |
| 191 | puts("updating from USB ...\n"); |
| 192 | setenv("bootcmd", "run usbupdate"); |
| 193 | break; |
| 194 | } else if (!gpio_get_value(KEY)) { |
| 195 | break; |
| 196 | } |
| 197 | } while (cnt); |
| 198 | } |
| 199 | |
| 200 | switch (cnt) { |
| 201 | case 0: |
| 202 | puts("3 blinks ... entering BOOT mode.\n"); |
| 203 | buf = 0x0000; |
| 204 | break; |
| 205 | case 1: |
| 206 | puts("2 blinks ... entering DIAGNOSE mode.\n"); |
| 207 | buf = 0x0F0F; |
| 208 | break; |
| 209 | case 2: |
| 210 | puts("1 blinks ... entering SERVICE mode.\n"); |
| 211 | buf = 0xB4B4; |
| 212 | break; |
| 213 | case 3: |
| 214 | puts("0 blinks ... entering RUN mode.\n"); |
| 215 | buf = 0x0404; |
| 216 | break; |
| 217 | } |
| 218 | mdelay(ton); |
| 219 | /* turn on light */ |
| 220 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
| 221 | TPS65217_WLEDCTRL1, 0x09, 0xFF); |
| 222 | /* write bootinfo into scratchregister of resetcontroller */ |
| 223 | oldspeed = i2c_get_bus_speed(); |
Hannes Petermaier | aadf319 | 2014-03-08 19:09:32 +0100 | [diff] [blame] | 224 | if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) { |
Hannes Petermaier | 072cefe | 2014-02-07 14:06:50 +0100 | [diff] [blame] | 225 | i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1, |
| 226 | (uint8_t *)&buf, sizeof(buf)); |
| 227 | i2c_set_bus_speed(oldspeed); |
| 228 | } else { |
| 229 | puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n"); |
| 230 | } |
| 231 | /* |
| 232 | * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does |
| 233 | * expect that vectors are there, original u-boot moves them to _start |
| 234 | */ |
| 235 | __asm__("ldr r0,=0x20000"); |
| 236 | __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */ |
| 237 | |
| 238 | return 0; |
| 239 | } |
| 240 | #endif /* CONFIG_BOARD_LATE_INIT */ |