blob: 7d3363aa7967948f073d493bd69bc9d38de90b02 [file] [log] [blame]
Marek Vasutd5914012011-01-19 04:40:37 +00001/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27#include <config_cmd_default.h>
28
29/*
30 * High Level Board Configuration Options
31 */
32/* An i.MX51 CPU */
33#define CONFIG_MX51
34#include <asm/arch/imx-regs.h>
35
36#define CONFIG_SYS_MX5_HCLK 24000000
37#define CONFIG_SYS_MX5_CLK32 32768
38#define CONFIG_DISPLAY_CPUINFO
39#define CONFIG_DISPLAY_BOARDINFO
40
Jana Rapava745525f2011-07-11 14:16:44 +000041#define CONFIG_SYS_TEXT_BASE 0x97800000
42
Aneesh Ve47f2db2011-06-16 23:30:48 +000043#define CONFIG_SYS_L2CACHE_OFF
Marek Vasutd5914012011-01-19 04:40:37 +000044
45/*
46 * Bootloader Components Configuration
47 */
48#define CONFIG_CMD_SPI
49#define CONFIG_CMD_SF
50#define CONFIG_CMD_MMC
51#define CONFIG_CMD_FAT
Marek Vasut4e0499e2011-07-11 14:16:45 +000052#define CONFIG_CMD_EXT2
Marek Vasutd5914012011-01-19 04:40:37 +000053#define CONFIG_CMD_IDE
54#undef CONFIG_CMD_IMLS
55
56/*
57 * Environmental settings
58 */
59
60#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
61#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
62#define CONFIG_ENV_SIZE (4 * 1024)
63
64/*
65 * ATAG setup
66 */
67#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
68#define CONFIG_REVISION_TAG
69#define CONFIG_SETUP_MEMORY_TAGS
70#define CONFIG_INITRD_TAG
71
Grant Likely2fa8ca92011-03-28 09:59:07 +000072#define CONFIG_OF_LIBFDT 1
73
Marek Vasutd5914012011-01-19 04:40:37 +000074/*
75 * Size of malloc() pool
76 */
77#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
78
79#define CONFIG_BOARD_EARLY_INIT_F
80#define BOARD_LATE_INIT
81
82/*
83 * Hardware drivers
84 */
85#define CONFIG_MXC_UART
86#define CONFIG_SYS_MX51_UART1
87#define CONFIG_CONS_INDEX 1
88#define CONFIG_BAUDRATE 115200
89#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
90
91#define CONFIG_MXC_GPIO
92
93/*
94 * SPI Interface
95 */
96#ifdef CONFIG_CMD_SPI
97
98#define CONFIG_HARD_SPI
99#define CONFIG_MXC_SPI
100#define CONFIG_DEFAULT_SPI_BUS 1
101#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
102
103/* SPI FLASH */
104#ifdef CONFIG_CMD_SF
105
106#define CONFIG_SPI_FLASH
107#define CONFIG_SPI_FLASH_SST
108#define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
109#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
110#define CONFIG_SF_DEFAULT_SPEED 25000000
111
112#define CONFIG_ENV_SPI_CS (1 | 121 << 8)
113#define CONFIG_ENV_SPI_BUS 0
114#define CONFIG_ENV_SPI_MAX_HZ 25000000
115#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
116#define CONFIG_FSL_ENV_IN_SF
117#define CONFIG_ENV_IS_IN_SPI_FLASH
118#define CONFIG_SYS_NO_FLASH
119
120#else
121#define CONFIG_ENV_IS_NOWHERE
122#endif
123
124/* SPI PMIC */
125#define CONFIG_FSL_PMIC
126#define CONFIG_FSL_PMIC_BUS 0
127#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
128#define CONFIG_FSL_PMIC_CLK 25000000
129#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
130#define CONFIG_RTC_MC13783
131#endif
132
133/*
134 * MMC Configs
135 */
136#ifdef CONFIG_CMD_MMC
137#define CONFIG_MMC
138#define CONFIG_GENERIC_MMC
139#define CONFIG_FSL_ESDHC
140#define CONFIG_SYS_FSL_ESDHC_ADDR 0
141#define CONFIG_SYS_FSL_ESDHC_NUM 2
142#endif
143
144/*
145 * ATA/IDE
146 */
147#ifdef CONFIG_CMD_IDE
148#define CONFIG_LBA48
149#undef CONFIG_IDE_LED
150#undef CONFIG_IDE_RESET
151
152#define CONFIG_MX51_PATA
153
154#define __io
155
156#define CONFIG_SYS_IDE_MAXBUS 1
157#define CONFIG_SYS_IDE_MAXDEVICE 1
158
159#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
160#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
161
162#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
163#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
164#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
165
166#define CONFIG_SYS_ATA_STRIDE 4
167
168#define CONFIG_IDE_PREINIT
169#define CONFIG_MXC_ATA_PIO_MODE 4
170#endif
171
172/*
173 * Filesystems
174 */
175#ifdef CONFIG_CMD_FAT
176#define CONFIG_DOS_PARTITION
177#endif
178
179#undef CONFIG_CMD_PING
180#undef CONFIG_CMD_DHCP
181#undef CONFIG_CMD_NET
182#undef CONFIG_CMD_NFS
183#define CONFIG_CMD_DATE
184
185/*
186 * Miscellaneous configurable options
187 */
188#define CONFIG_ENV_OVERWRITE
189#define CONFIG_BOOTDELAY 3
190#define CONFIG_LOADADDR 0x90800000
191
192#define CONFIG_SYS_LONGHELP /* undef to save memory */
193#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
194#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
195#define CONFIG_SYS_PROMPT "Efika> "
196#define CONFIG_AUTO_COMPLETE
197#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
198/* Print Buffer Size */
199#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
200#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
201#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
202
203#define CONFIG_SYS_MEMTEST_START 0x90000000
204#define CONFIG_SYS_MEMTEST_END 0x10000
205
206#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
207
208#define CONFIG_SYS_HZ 1000
209#define CONFIG_CMDLINE_EDITING
210
211/*-----------------------------------------------------------------------
212 * Stack sizes
213 *
214 * The stack sizes are set up in start.S using the settings below
215 */
216#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
217
218/*-----------------------------------------------------------------------
219 * Physical Memory Map
220 */
221#define CONFIG_NR_DRAM_BANKS 1
222#define PHYS_SDRAM_1 CSD0_BASE_ADDR
223#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
224
225#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
226#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
227#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
228
229#define CONFIG_SYS_INIT_SP_OFFSET \
230 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
231#define CONFIG_SYS_INIT_SP_ADDR \
232 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
233
234#define CONFIG_SYS_DDR_CLKSEL 0
235#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
236
237#endif