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Ian Campbellcba69ee2014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
Hans de Goededaf6d392015-09-13 17:29:33 +020016#include <asm/arch/cpu.h>
Hans de Goedee049fe22015-05-19 22:12:31 +020017#include <linux/stringify.h>
18
Siarhei Siamashka77ef1362015-02-21 07:34:09 +020019#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20/*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25# define CONFIG_MACH_TYPE_COMPAT_REV 0
26#else
27/*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32# define CONFIG_MACH_TYPE_COMPAT_REV 1
33#endif
34
Andre Przywarad29adf82017-04-26 01:32:48 +010035#ifdef CONFIG_ARM64
36#define CONFIG_BUILD_TARGET "u-boot.itb"
37#endif
38
Ian Campbellcba69ee2014-05-05 11:52:26 +010039/* Serial & console */
Ian Campbellcba69ee2014-05-05 11:52:26 +010040#define CONFIG_SYS_NS16550_SERIAL
41/* ns16550 reg in the low bits of cpu reg */
Ian Campbellcba69ee2014-05-05 11:52:26 +010042#define CONFIG_SYS_NS16550_CLK 24000000
Thomas Chou4fb60552015-11-19 21:48:13 +080043#ifndef CONFIG_DM_SERIAL
Simon Glass1a81cf832014-10-30 20:25:50 -060044# define CONFIG_SYS_NS16550_REG_SIZE -4
45# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
46# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
47# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
48# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
49# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
50#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010051
Paul Kocialkowski8a65f692015-05-16 19:52:11 +020052/* CPU */
Andre Przywarae4916e82017-02-16 01:20:19 +000053#define COUNTER_FREQUENCY 24000000
Paul Kocialkowski8a65f692015-05-16 19:52:11 +020054
Hans de Goedee049fe22015-05-19 22:12:31 +020055/*
56 * The DRAM Base differs between some models. We cannot use macros for the
57 * CONFIG_FOO defines which contain the DRAM base address since they end
58 * up unexpanded in include/autoconf.mk .
59 *
60 * So we have to have this #ifdef #else #endif block for these.
61 */
62#ifdef CONFIG_MACH_SUN9I
63#define SDRAM_OFFSET(x) 0x2##x
64#define CONFIG_SYS_SDRAM_BASE 0x20000000
65#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
66#define CONFIG_SYS_TEXT_BASE 0x2a000000
Hans de Goedeff42d102015-09-13 13:02:48 +020067/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
68 * since it needs to fit in with the other values. By also #defining it
69 * we get warnings if the Kconfig value mismatches. */
70#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
Hans de Goedee049fe22015-05-19 22:12:31 +020071#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
72#else
73#define SDRAM_OFFSET(x) 0x4##x
Ian Campbellcba69ee2014-05-05 11:52:26 +010074#define CONFIG_SYS_SDRAM_BASE 0x40000000
Hans de Goedee049fe22015-05-19 22:12:31 +020075#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
Icenowy Zhengc1994892017-04-08 15:30:12 +080076/* V3s do not have enough memory to place code at 0x4a000000 */
77#ifndef CONFIG_MACH_SUN8I_V3S
Hans de Goedee049fe22015-05-19 22:12:31 +020078#define CONFIG_SYS_TEXT_BASE 0x4a000000
Icenowy Zhengc1994892017-04-08 15:30:12 +080079#else
80#define CONFIG_SYS_TEXT_BASE 0x42e00000
81#endif
Hans de Goedeff42d102015-09-13 13:02:48 +020082/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
83 * since it needs to fit in with the other values. By also #defining it
84 * we get warnings if the Kconfig value mismatches. */
85#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
Hans de Goedee049fe22015-05-19 22:12:31 +020086#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
87#endif
88
89#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goedee049fe22015-05-19 22:12:31 +020090
Andre Przywarabc613d82017-02-16 01:20:23 +000091#ifdef CONFIG_SUNXI_HIGH_SRAM
Hans de Goede77fe9882015-05-20 15:27:16 +020092/*
93 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
94 * slightly bigger. Note that it is possible to map the first 32 KiB of the
95 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
96 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
97 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
98 */
99#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
Andre Przywaraeb504fa2016-09-05 01:32:38 +0100100#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
Hans de Goede77fe9882015-05-20 15:27:16 +0200101#else
Ian Campbellcba69ee2014-05-05 11:52:26 +0100102#define CONFIG_SYS_INIT_RAM_ADDR 0x0
103#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Hans de Goede77fe9882015-05-20 15:27:16 +0200104#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100105
106#define CONFIG_SYS_INIT_SP_OFFSET \
107 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108#define CONFIG_SYS_INIT_SP_ADDR \
109 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110
111#define CONFIG_NR_DRAM_BANKS 1
112#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
113#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
114
Ian Campbella6e50a82014-07-18 20:38:41 +0100115#ifdef CONFIG_AHCI
Ian Campbella6e50a82014-07-18 20:38:41 +0100116#define CONFIG_SCSI_AHCI_PLAT
117#define CONFIG_SUNXI_AHCI
Bernhard Nortmann0751b132015-06-10 10:51:40 +0200118#define CONFIG_SYS_64BIT_LBA
Ian Campbella6e50a82014-07-18 20:38:41 +0100119#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
120#define CONFIG_SYS_SCSI_MAX_LUN 1
121#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
122 CONFIG_SYS_SCSI_MAX_LUN)
Ian Campbella6e50a82014-07-18 20:38:41 +0100123#endif
124
Ian Campbellcba69ee2014-05-05 11:52:26 +0100125#define CONFIG_SETUP_MEMORY_TAGS
126#define CONFIG_CMDLINE_TAG
127#define CONFIG_INITRD_TAG
Paul Kocialkowski9f852212015-03-28 18:35:36 +0100128#define CONFIG_SERIAL_TAG
Ian Campbellcba69ee2014-05-05 11:52:26 +0100129
Hans de Goedee5268612015-08-16 14:48:22 +0200130#ifdef CONFIG_NAND_SUNXI
Boris Brezillona0dfa882016-06-15 21:09:27 +0200131#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon4ccae812016-06-15 21:09:23 +0200132#define CONFIG_SYS_NAND_ONFI_DETECTION
133#define CONFIG_SYS_MAX_NAND_DEVICE 8
Hans de Goeded482a8d2017-02-27 18:22:10 +0100134
135#define CONFIG_MTD_DEVICE
136#define CONFIG_MTD_PARTITIONS
Piotr Zierhoffer960caeb2015-07-23 14:33:03 +0200137#endif
138
Siarhei Siamashka19e99fb2016-06-07 14:28:34 +0300139#ifdef CONFIG_SPL_SPI_SUNXI
Siarhei Siamashka19e99fb2016-06-07 14:28:34 +0300140#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
141#endif
142
Ian Campbelle24ea552014-05-05 14:42:31 +0100143/* mmc config */
Maxime Ripard44c79872015-10-15 22:04:07 +0200144#ifdef CONFIG_MMC
Ian Campbelle24ea552014-05-05 14:42:31 +0100145#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardfb1c43c2017-02-27 18:22:03 +0100146#endif
147
148#if defined(CONFIG_ENV_IS_IN_MMC)
Maxime Ripardde86fc32017-08-23 10:12:22 +0200149#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
150/* If we have two devices (most likely eMMC + MMC), favour the eMMC */
151#define CONFIG_SYS_MMC_ENV_DEV 1
152#else
153/* Otherwise, use the only device we have */
154#define CONFIG_SYS_MMC_ENV_DEV 0
155#endif
Emmanuel Vadotae042be2016-11-05 20:51:11 +0100156#define CONFIG_SYS_MMC_MAX_DEVICE 4
Maxime Ripardd6a7e0c2017-03-20 15:57:22 +0100157#elif defined(CONFIG_ENV_IS_NOWHERE)
158#define CONFIG_ENV_SIZE (128 << 10)
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +0800159#endif
Ian Campbelle24ea552014-05-05 14:42:31 +0100160
Icenowy Zhengc1994892017-04-08 15:30:12 +0800161#ifndef CONFIG_MACH_SUN8I_V3S
Hans de Goede5c965ed2015-09-13 17:16:54 +0200162/* 64MB of malloc() pool */
163#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
Icenowy Zhengc1994892017-04-08 15:30:12 +0800164#else
165/* 2MB of malloc() pool */
166#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
167#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100168
169/*
170 * Miscellaneous configurable options
171 */
Ian Campbell06beadb2014-10-07 14:20:30 +0100172#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
173#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100174
Ian Campbellcba69ee2014-05-05 11:52:26 +0100175/* standalone support */
Hans de Goedee049fe22015-05-19 22:12:31 +0200176#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbellcba69ee2014-05-05 11:52:26 +0100177
Ian Campbellcba69ee2014-05-05 11:52:26 +0100178/* FLASH and environment organization */
179
Boris Brezillonfa5e1022015-07-27 16:21:26 +0200180#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100181
Ian Campbellcba69ee2014-05-05 11:52:26 +0100182#define CONFIG_SPL_FRAMEWORK
Ian Campbellcba69ee2014-05-05 11:52:26 +0100183
Andre Przywaraeb77f5c2017-01-02 11:48:45 +0000184#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
Simon Glass942cb0b2015-02-07 10:47:30 -0700185#define CONFIG_SPL_BOARD_LOAD_IMAGE
Andre Przywaraeb77f5c2017-01-02 11:48:45 +0000186#endif
Simon Glass942cb0b2015-02-07 10:47:30 -0700187
Andre Przywarabc613d82017-02-16 01:20:23 +0000188#ifdef CONFIG_SUNXI_HIGH_SRAM
Siarhei Siamashka7f0ef5a2017-04-26 01:32:49 +0100189#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */
190#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywara54522c92017-04-26 01:32:42 +0100191#ifdef CONFIG_ARM64
192/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
193#define LOW_LEVEL_SRAM_STACK 0x00054000
194#else
Andre Przywarabc613d82017-02-16 01:20:23 +0000195#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywara54522c92017-04-26 01:32:42 +0100196#endif /* !CONFIG_ARM64 */
Siarhei Siamashkad96ebc42016-03-29 17:29:10 +0200197#else
Siarhei Siamashka7f0ef5a2017-04-26 01:32:49 +0100198#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */
199#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarabc613d82017-02-16 01:20:23 +0000200#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashkad96ebc42016-03-29 17:29:10 +0200201#endif
Ian Campbell50827a52014-05-05 11:52:30 +0100202
Andre Przywarabc613d82017-02-16 01:20:23 +0000203#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
204
Ian Campbell50827a52014-05-05 11:52:30 +0100205#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
206
Ian Campbellcba69ee2014-05-05 11:52:26 +0100207
Hans de Goede66203772014-06-13 22:55:49 +0200208/* I2C */
Jelle van der Waa0d8382a2016-02-23 18:47:19 +0100209#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
210 defined CONFIG_SY8106A_POWER
Hans de Goedead406102015-01-23 15:28:22 +0100211#endif
212
Paul Kocialkowski6c739c52015-04-10 23:09:52 +0200213#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
214 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
Jelle van der Waa9d082682016-01-14 14:06:26 +0100215 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
Hans de Goede66203772014-06-13 22:55:49 +0200216#define CONFIG_SYS_I2C_MVTWSI
Jernej Skrabeca8f01cc2017-04-27 00:03:36 +0200217#ifndef CONFIG_DM_I2C
218#define CONFIG_SYS_I2C
Hans de Goede66203772014-06-13 22:55:49 +0200219#define CONFIG_SYS_I2C_SPEED 400000
220#define CONFIG_SYS_I2C_SLAVE 0x7f
Hans de Goede8b2db322015-04-23 17:47:22 +0200221#endif
Jernej Skrabeca8f01cc2017-04-27 00:03:36 +0200222#endif
Hans de Goede55410082015-02-16 17:23:25 +0100223
224#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
225#define CONFIG_SYS_I2C_SOFT
226#define CONFIG_SYS_I2C_SOFT_SPEED 50000
227#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
Hans de Goede55410082015-02-16 17:23:25 +0100228/* We use pin names in Kconfig and sunxi_name_to_gpio() */
229#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
230#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
231#ifndef __ASSEMBLY__
232extern int soft_i2c_gpio_sda;
233extern int soft_i2c_gpio_scl;
234#endif
Hans de Goede1fc42012015-03-07 12:00:02 +0100235#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
236#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
237#else
238#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
239#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
Hans de Goede55410082015-02-16 17:23:25 +0100240#endif
241
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200242/* PMU */
vishnupatekar95ab8fe2015-11-29 01:07:22 +0800243#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
Jelle van der Waa0d8382a2016-02-23 18:47:19 +0100244 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
245 defined CONFIG_SY8106A_POWER
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200246#endif
247
Hans de Goedea5da3c82015-08-01 14:44:29 +0200248#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
Hans de Goedef3133962015-02-20 16:55:12 +0100249#if CONFIG_CONS_INDEX == 1
250#ifdef CONFIG_MACH_SUN9I
251#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
252#else
253#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
254#endif
255#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
256#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
Laurent Itti5cd83b112015-05-05 17:02:00 -0700257#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
258#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
Hans de Goedef3133962015-02-20 16:55:12 +0100259#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
260#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
261#else
262#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
263#endif
Hans de Goedea5da3c82015-08-01 14:44:29 +0200264#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
Hans de Goedef3133962015-02-20 16:55:12 +0100265
Ian Campbellabce2c62014-06-05 19:00:15 +0100266/* GPIO */
267#define CONFIG_SUNXI_GPIO
Ian Campbellabce2c62014-06-05 19:00:15 +0100268
Icenowy Zheng401a3ca2017-10-26 11:14:44 +0800269#ifdef CONFIG_VIDEO_SUNXI
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200270/*
Hans de Goede5633a292015-02-02 17:13:29 +0100271 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
272 * to use as framebuffer. This must be a multiple of 4096.
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200273 */
Hans de Goede5c965ed2015-09-13 17:16:54 +0200274#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200275
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200276#define CONFIG_VIDEO_LOGO
Hans de Goedebe8ec632014-12-19 13:46:33 +0100277#define CONFIG_VIDEO_STD_TIMINGS
Hans de Goede75481602014-12-19 16:05:12 +0100278#define CONFIG_I2C_EDID
Hans de Goede58332f82015-08-05 00:06:47 +0200279#define VIDEO_LINE_LEN (pGD->plnSizeX)
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200280
281/* allow both serial and cfb console. */
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200282/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200283
Icenowy Zheng401a3ca2017-10-26 11:14:44 +0800284#endif /* CONFIG_VIDEO_SUNXI */
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200285
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200286/* Ethernet support */
Artturi Alme286fad2017-11-08 05:08:57 +0200287#ifdef CONFIG_SUN4I_EMAC
Hans de Goede8145dea2015-04-16 21:47:06 +0200288#define CONFIG_PHY_ADDR 1
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200289#define CONFIG_MII /* MII PHY management */
290#endif
291
Dave Prue6ff005c2017-08-31 19:21:01 +0200292#ifdef CONFIG_SUN7I_GMAC
Ian Campbell58358232014-05-05 11:52:28 +0100293#define CONFIG_PHY_ADDR 1
294#define CONFIG_MII /* MII PHY management */
Hans de Goede1eae8f62016-03-16 13:46:22 +0100295#define CONFIG_PHY_REALTEK
Ian Campbell58358232014-05-05 11:52:28 +0100296#endif
297
Paul Kocialkowski2582ca02015-08-04 17:04:09 +0200298#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede6a72e802015-05-10 14:10:27 +0200299#define CONFIG_USB_OHCI_NEW
300#define CONFIG_USB_OHCI_SUNXI
301#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goede1a800f72015-01-11 17:17:00 +0100302#endif
303
304#ifdef CONFIG_USB_MUSB_SUNXI
Paul Kocialkowski95de1e22015-08-04 17:04:06 +0200305#define CONFIG_USB_MUSB_PIO_ONLY
Hans de Goede1a800f72015-01-11 17:17:00 +0100306#endif
307
Paul Kocialkowskib21144e2015-08-04 17:04:11 +0200308#ifdef CONFIG_USB_MUSB_GADGET
Sam Protsenkoaaa4a9e2016-04-13 14:20:26 +0300309#define CONFIG_USB_FUNCTION_MASS_STORAGE
Paul Kocialkowskib21144e2015-08-04 17:04:11 +0200310#endif
311
Paul Kocialkowskib21144e2015-08-04 17:04:11 +0200312#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
Paul Kocialkowskib21144e2015-08-04 17:04:11 +0200313#endif
314
Hans de Goede86b49092014-09-18 21:03:34 +0200315#ifdef CONFIG_USB_KEYBOARD
Hans de Goede86b49092014-09-18 21:03:34 +0200316#define CONFIG_PREBOOT
Hans de Goede86b49092014-09-18 21:03:34 +0200317#endif
318
Jonathan Liub41d7d02014-06-14 08:59:09 +0200319#define CONFIG_MISC_INIT_R
320
Ian Campbellcba69ee2014-05-05 11:52:26 +0100321#ifndef CONFIG_SPL_BUILD
322#include <config_distro_defaults.h>
Hans de Goede2ec3a612014-07-31 23:04:45 +0200323
Andre Przywara671f9ad2016-05-04 22:15:32 +0100324#ifdef CONFIG_ARM64
325/*
326 * Boards seem to come with at least 512MB of DRAM.
327 * The kernel should go at 512K, which is the default text offset (that will
328 * be adjusted at runtime if needed).
329 * There is no compression for arm64 kernels (yet), so leave some space
330 * for really big kernels, say 256MB for now.
331 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
332 * Align the initrd to a 2MB page.
333 */
Icenowy Zhengc1994892017-04-08 15:30:12 +0800334#define BOOTM_SIZE __stringify(0xa000000)
Andre Przywara671f9ad2016-05-04 22:15:32 +0100335#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
336#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
337#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
338#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
339#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
340
341#else
Hans de Goede8c95c552014-12-24 16:08:30 +0100342/*
Hans de Goede5c965ed2015-09-13 17:16:54 +0200343 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede8c95c552014-12-24 16:08:30 +0100344 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
345 * 1M script, 1M pxe and the ramdisk at the end.
346 */
Icenowy Zhengc1994892017-04-08 15:30:12 +0800347#ifndef CONFIG_MACH_SUN8I_V3S
348#define BOOTM_SIZE __stringify(0xa000000)
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200349#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
350#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
351#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
352#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
353#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
Icenowy Zhengc1994892017-04-08 15:30:12 +0800354#else
355/*
356 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
357 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
358 * 1M script, 1M pxe and the ramdisk at the end.
359 */
360#define BOOTM_SIZE __stringify(0x2e00000)
361#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
362#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
363#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
364#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
365#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
366#endif
Andre Przywara671f9ad2016-05-04 22:15:32 +0100367#endif
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200368
Hans de Goede846e3252014-08-01 09:37:58 +0200369#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zhengc1994892017-04-08 15:30:12 +0800370 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200371 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
372 "fdt_addr_r=" FDT_ADDR_R "\0" \
373 "scriptaddr=" SCRIPT_ADDR_R "\0" \
374 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
375 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
376
377#define DFU_ALT_INFO_RAM \
378 "dfu_alt_info_ram=" \
379 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
380 "fdt ram " FDT_ADDR_R " 0x100000;" \
381 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede846e3252014-08-01 09:37:58 +0200382
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800383#ifdef CONFIG_MMC
Karsten Merker5a37a402015-12-16 20:59:40 +0100384#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripardde86fc32017-08-23 10:12:22 +0200385#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
386 BOOTENV_DEV_MMC(MMC, mmc, 0) \
387 BOOTENV_DEV_MMC(MMC, mmc, 1) \
388 "bootcmd_mmc_auto=" \
389 "if test ${mmc_bootdev} -eq 1; then " \
390 "run bootcmd_mmc1; " \
391 "run bootcmd_mmc0; " \
392 "elif test ${mmc_bootdev} -eq 0; then " \
393 "run bootcmd_mmc0; " \
394 "run bootcmd_mmc1; " \
395 "fi\0"
396
397#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
398 "mmc_auto "
399
400#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker5a37a402015-12-16 20:59:40 +0100401#else
Maxime Ripardde86fc32017-08-23 10:12:22 +0200402#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker5a37a402015-12-16 20:59:40 +0100403#endif
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800404#else
405#define BOOT_TARGET_DEVICES_MMC(func)
406#endif
407
Hans de Goede2ec3a612014-07-31 23:04:45 +0200408#ifdef CONFIG_AHCI
409#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
410#else
411#define BOOT_TARGET_DEVICES_SCSI(func)
412#endif
413
Paul Kocialkowski2582ca02015-08-04 17:04:09 +0200414#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800415#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
416#else
417#define BOOT_TARGET_DEVICES_USB(func)
418#endif
419
Bernhard Nortmannf3b589c2015-09-17 18:52:53 +0200420/* FEL boot support, auto-execute boot.scr if a script address was provided */
421#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
422 "bootcmd_fel=" \
423 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
424 "echo '(FEL boot)'; " \
425 "source ${fel_scriptaddr}; " \
426 "fi\0"
427#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
428 "fel "
429
Hans de Goede2ec3a612014-07-31 23:04:45 +0200430#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmannf3b589c2015-09-17 18:52:53 +0200431 func(FEL, fel, na) \
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800432 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200433 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800434 BOOT_TARGET_DEVICES_USB(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200435 func(PXE, pxe, na) \
436 func(DHCP, dhcp, na)
437
Hans de Goede3b824022015-10-09 17:11:15 +0100438#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
439#define BOOTCMD_SUNXI_COMPAT \
440 "bootcmd_sunxi_compat=" \
441 "setenv root /dev/mmcblk0p3 rootwait; " \
442 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
443 "echo Loaded environment from uEnv.txt; " \
444 "env import -t 0x44000000 ${filesize}; " \
445 "fi; " \
446 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
447 "ext2load mmc 0 0x43000000 script.bin && " \
448 "ext2load mmc 0 0x48000000 uImage && " \
449 "bootm 0x48000000\0"
450#else
451#define BOOTCMD_SUNXI_COMPAT
452#endif
453
Hans de Goede2ec3a612014-07-31 23:04:45 +0200454#include <config_distro_bootcmd.h>
455
Hans de Goede86b49092014-09-18 21:03:34 +0200456#ifdef CONFIG_USB_KEYBOARD
457#define CONSOLE_STDIN_SETTINGS \
458 "preboot=usb start\0" \
459 "stdin=serial,usbkbd\0"
460#else
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200461#define CONSOLE_STDIN_SETTINGS \
462 "stdin=serial\0"
Hans de Goede86b49092014-09-18 21:03:34 +0200463#endif
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200464
465#ifdef CONFIG_VIDEO
466#define CONSOLE_STDOUT_SETTINGS \
467 "stdout=serial,vga\0" \
468 "stderr=serial,vga\0"
Jernej Skrabec56009452017-03-27 19:22:32 +0200469#elif CONFIG_DM_VIDEO
470#define CONFIG_SYS_WHITE_ON_BLACK
471#define CONSOLE_STDOUT_SETTINGS \
472 "stdout=serial,vidconsole\0" \
473 "stderr=serial,vidconsole\0"
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200474#else
475#define CONSOLE_STDOUT_SETTINGS \
476 "stdout=serial\0" \
477 "stderr=serial\0"
478#endif
479
Maxime Ripardc8564b22017-02-27 18:22:11 +0100480#ifdef CONFIG_MTDIDS_DEFAULT
481#define SUNXI_MTDIDS_DEFAULT \
482 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
483#else
484#define SUNXI_MTDIDS_DEFAULT
485#endif
486
487#ifdef CONFIG_MTDPARTS_DEFAULT
488#define SUNXI_MTDPARTS_DEFAULT \
489 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
490#else
491#define SUNXI_MTDPARTS_DEFAULT
492#endif
493
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200494#define CONSOLE_ENV_SETTINGS \
495 CONSOLE_STDIN_SETTINGS \
496 CONSOLE_STDOUT_SETTINGS
497
Andreas Färber2eff3b72017-04-14 18:44:47 +0200498#ifdef CONFIG_ARM64
499#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
500#else
501#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
502#endif
503
Hans de Goede2ec3a612014-07-31 23:04:45 +0200504#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200505 CONSOLE_ENV_SETTINGS \
Hans de Goede846e3252014-08-01 09:37:58 +0200506 MEM_LAYOUT_ENV_SETTINGS \
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200507 DFU_ALT_INFO_RAM \
Andreas Färber2eff3b72017-04-14 18:44:47 +0200508 "fdtfile=" FDTFILE "\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200509 "console=ttyS0,115200\0" \
Maxime Ripardc8564b22017-02-27 18:22:11 +0100510 SUNXI_MTDIDS_DEFAULT \
511 SUNXI_MTDPARTS_DEFAULT \
Hans de Goede3b824022015-10-09 17:11:15 +0100512 BOOTCMD_SUNXI_COMPAT \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200513 BOOTENV
514
515#else /* ifndef CONFIG_SPL_BUILD */
516#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbellcba69ee2014-05-05 11:52:26 +0100517#endif
518
519#endif /* _SUNXI_COMMON_CONFIG_H */