blob: 222fe43958346afa7d8db2656eb1fbed78e17841 [file] [log] [blame]
Andreas Bießmannad7a1782011-06-30 22:03:20 +00001/*
2 * Copyright (C) 2011
3 * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23#include <common.h>
24
25#include <asm/io.h>
26#include <asm/sdram.h>
27#include <asm/arch/clk.h>
28#include <asm/arch/hmatrix.h>
29#include <asm/arch/mmu.h>
30#include <asm/arch/portmux.h>
31#include <netdev.h>
32
33DECLARE_GLOBAL_DATA_PTR;
34
35struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
36 {
37 .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
38 .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
39 .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
40 | MMU_VMR_CACHE_NONE,
41 }, {
42 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
43 .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
44 .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
45 | MMU_VMR_CACHE_WRBACK,
46 },
47};
48
49static const struct sdram_config sdram_config = {
50 /* Dual MT48LC16M16A2-7E (or equal) */
51 .data_bits = SDRAM_DATA_32BIT,
52 .row_bits = 13,
53 .col_bits = 9,
54 .bank_bits = 2,
55 .cas = 2,
56 .twr = 2,
57 .trc = 7,
58 .trp = 2,
59 .trcd = 2,
60 .tras = 4,
61 .txsr = 7,
62 /* 7.81 us */
63 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
64};
65
66int board_early_init_f(void)
67{
68 /* Enable SDRAM in the EBI mux */
69 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
70
71 portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH);
72 portmux_enable_usart0(PORTMUX_DRIVE_MIN);
73 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
74#if defined(CONFIG_MACB)
Andreas Bießmanneba00ab2012-05-25 12:29:32 +020075 /* set PHY reset and pwrdown to low */
76 portmux_select_gpio(PORTMUX_PORT_B, (1 << 29) | (1 << 30),
77 PORTMUX_DIR_OUTPUT | PORTMUX_INIT_LOW);
78 udelay(100);
79 /* release PHYs reset */
80 gpio_set_value(GPIO_PIN_PB(29), 1);
81
Andreas Bießmannad7a1782011-06-30 22:03:20 +000082 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
83#endif
84
85 return 0;
86}
87
88phys_size_t initdram(int board_type)
89{
90 unsigned long expected_size;
91 unsigned long actual_size;
92 void *sdram_base;
93
94 sdram_base = uncached(EBI_SDRAM_BASE);
95
96 expected_size = sdram_init(sdram_base, &sdram_config);
97 actual_size = get_ram_size(sdram_base, expected_size);
98
99 if (expected_size != actual_size)
100 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
101 actual_size >> 20, expected_size >> 20);
102
103 return actual_size;
104}
105
106int board_early_init_r(void)
107{
108 gd->bd->bi_phy_id[0] = 0x00;
109 return 0;
110}
111
112#ifdef CONFIG_CMD_NET
113int board_eth_init(bd_t *bi)
114{
115 macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
116 return 0;
117}
118#endif
119/* vim: set noet ts=8: */