Stephen Warren | 8f39377 | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
Tom Rini | 5b8031c | 2016-01-14 22:05:13 -0500 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
Stephen Warren | 8f39377 | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __MX6_COMMON_H |
| 8 | #define __MX6_COMMON_H |
| 9 | |
Peng Fan | 436cf40 | 2015-07-20 19:28:26 +0800 | [diff] [blame] | 10 | #ifndef CONFIG_MX6UL |
Stephen Warren | 8f39377 | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 11 | #define CONFIG_ARM_ERRATA_743622 |
| 12 | #define CONFIG_ARM_ERRATA_751472 |
Nitin Garg | 68659d6 | 2014-04-02 08:55:03 -0500 | [diff] [blame] | 13 | #define CONFIG_ARM_ERRATA_794072 |
| 14 | #define CONFIG_ARM_ERRATA_761320 |
Stephen Warren | 8f39377 | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 15 | |
Fabio Estevam | 6d73c23 | 2014-01-29 17:39:49 -0200 | [diff] [blame] | 16 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 17 | #define CONFIG_SYS_L2_PL310 |
| 18 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE |
| 19 | #endif |
| 20 | |
Gabriel Huau | a76df70 | 2014-07-26 11:35:43 -0700 | [diff] [blame] | 21 | #define CONFIG_MP |
Peng Fan | 436cf40 | 2015-07-20 19:28:26 +0800 | [diff] [blame] | 22 | #endif |
| 23 | #define CONFIG_BOARD_POSTCLK_INIT |
Ye.Li | f13ac7b | 2014-10-30 18:20:59 +0800 | [diff] [blame] | 24 | #define CONFIG_MXC_GPT_HCLK |
Gabriel Huau | a76df70 | 2014-07-26 11:35:43 -0700 | [diff] [blame] | 25 | |
Peter Robinson | 056845c | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 26 | #define CONFIG_SYS_NO_FLASH |
| 27 | |
Peng Fan | 1ecd2ea | 2016-01-04 15:27:22 +0800 | [diff] [blame] | 28 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
| 29 | |
Peter Robinson | 056845c | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 30 | #include <linux/sizes.h> |
| 31 | #include <asm/arch/imx-regs.h> |
| 32 | #include <asm/imx-common/gpio.h> |
Peter Robinson | 056845c | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 33 | |
Peter Robinson | 3b1f681 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 34 | #ifndef CONFIG_MX6 |
| 35 | #define CONFIG_MX6 |
| 36 | #endif |
| 37 | |
| 38 | #define CONFIG_DISPLAY_BOARDINFO |
| 39 | #define CONFIG_DISPLAY_CPUINFO |
Gong Qianyu | 18fb0e3 | 2015-10-26 19:47:42 +0800 | [diff] [blame] | 40 | #define CONFIG_SYS_FSL_CLK |
Peter Robinson | 3b1f681 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 41 | |
Peter Robinson | ea69091 | 2015-05-22 17:30:47 +0100 | [diff] [blame] | 42 | /* ATAGs */ |
| 43 | #define CONFIG_CMDLINE_TAG |
| 44 | #define CONFIG_SETUP_MEMORY_TAGS |
| 45 | #define CONFIG_INITRD_TAG |
| 46 | #define CONFIG_REVISION_TAG |
| 47 | |
Peter Robinson | 8183058 | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 48 | /* Boot options */ |
Peng Fan | 94bd1d1 | 2015-07-20 19:28:32 +0800 | [diff] [blame] | 49 | #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6UL)) |
Fabio Estevam | cd6ddc4 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 50 | #define CONFIG_LOADADDR 0x82000000 |
| 51 | #ifndef CONFIG_SYS_TEXT_BASE |
| 52 | #define CONFIG_SYS_TEXT_BASE 0x87800000 |
| 53 | #endif |
| 54 | #else |
Peter Robinson | 8183058 | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 55 | #define CONFIG_LOADADDR 0x12000000 |
Peter Robinson | 8183058 | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 56 | #ifndef CONFIG_SYS_TEXT_BASE |
| 57 | #define CONFIG_SYS_TEXT_BASE 0x17800000 |
| 58 | #endif |
Fabio Estevam | cd6ddc4 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 59 | #endif |
| 60 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 61 | |
Peter Robinson | 2d8a074 | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 62 | /* allow to overwrite serial and ethaddr */ |
| 63 | #define CONFIG_ENV_OVERWRITE |
| 64 | #define CONFIG_CONS_INDEX 1 |
| 65 | #define CONFIG_BAUDRATE 115200 |
| 66 | |
Peter Robinson | a380ce6 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 67 | /* Filesystems and image support */ |
Peter Robinson | a380ce6 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 68 | #define CONFIG_SUPPORT_RAW_INITRD |
Peter Robinson | a380ce6 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 69 | #define CONFIG_DOS_PARTITION |
Peter Robinson | a380ce6 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 70 | |
Peter Robinson | 2d8a074 | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 71 | /* Miscellaneous configurable options */ |
Peter Robinson | 2d8a074 | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 72 | #define CONFIG_SYS_LONGHELP |
Peter Robinson | 2d8a074 | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 73 | #define CONFIG_CMDLINE_EDITING |
| 74 | #define CONFIG_AUTO_COMPLETE |
| 75 | #define CONFIG_SYS_CBSIZE 512 |
| 76 | #define CONFIG_SYS_MAXARGS 32 |
| 77 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 78 | |
Peter Robinson | 1022b85 | 2015-05-22 17:30:53 +0100 | [diff] [blame] | 79 | #ifndef CONFIG_SYS_DCACHE_OFF |
Peter Robinson | 1022b85 | 2015-05-22 17:30:53 +0100 | [diff] [blame] | 80 | #endif |
| 81 | |
Peter Robinson | 302b2e5 | 2015-05-22 17:30:48 +0100 | [diff] [blame] | 82 | /* GPIO */ |
| 83 | #define CONFIG_MXC_GPIO |
Peter Robinson | 302b2e5 | 2015-05-22 17:30:48 +0100 | [diff] [blame] | 84 | |
Peter Robinson | e51c1e8 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 85 | /* MMC */ |
| 86 | #define CONFIG_MMC |
Peter Robinson | e51c1e8 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 87 | #define CONFIG_GENERIC_MMC |
| 88 | #define CONFIG_BOUNCE_BUFFER |
| 89 | #define CONFIG_FSL_ESDHC |
| 90 | #define CONFIG_FSL_USDHC |
| 91 | |
Peter Robinson | 3c73b0a | 2015-06-24 17:09:46 +0100 | [diff] [blame] | 92 | /* Fuses */ |
| 93 | #define CONFIG_CMD_FUSE |
| 94 | #define CONFIG_MXC_OCOTP |
| 95 | |
Stephen Warren | 8f39377 | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 96 | #endif |