blob: fa80bade7a91e80bc530cbfee1163165b06d846a [file] [log] [blame]
Wenyou Yang9e5935c2016-07-20 17:55:12 +08001/*
2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <clk-uclass.h>
10#include <dm/device.h>
11#include <linux/io.h>
12#include <mach/at91_pmc.h>
13#include "pmc.h"
14
15#define SYSTEM_MAX_ID 31
16
17static inline int is_pck(int id)
18{
19 return (id >= 8) && (id <= 15);
20}
21
22static int at91_system_clk_enable(struct clk *clk)
23{
24 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
25 struct at91_pmc *pmc = plat->reg_base;
26 u32 mask;
27
28 if (clk->id > SYSTEM_MAX_ID)
29 return -EINVAL;
30
31 mask = BIT(clk->id);
32
33 writel(mask, &pmc->scer);
34
35 /**
36 * For the programmable clocks the Ready status in the PMC
37 * status register should be checked after enabling.
38 * For other clocks this is unnecessary.
39 */
40 if (!is_pck(clk->id))
41 return 0;
42
43 while (!(readl(&pmc->sr) & mask))
44 ;
45
46 return 0;
47}
48
49static struct clk_ops at91_system_clk_ops = {
50 .enable = at91_system_clk_enable,
51};
52
53static int at91_system_clk_bind(struct udevice *dev)
54{
55 return at91_pmc_clk_node_bind(dev);
56}
57
58static int at91_system_clk_probe(struct udevice *dev)
59{
60 return at91_pmc_core_probe(dev);
61}
62
63static const struct udevice_id at91_system_clk_match[] = {
64 { .compatible = "atmel,at91rm9200-clk-system" },
65 {}
66};
67
68U_BOOT_DRIVER(at91_system_clk) = {
69 .name = "at91-system-clk",
70 .id = UCLASS_CLK,
71 .of_match = at91_system_clk_match,
72 .bind = at91_system_clk_bind,
73 .probe = at91_system_clk_probe,
74 .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
75 .ops = &at91_system_clk_ops,
76};