wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
Bin Meng | fe0c33a | 2014-12-12 21:05:22 +0800 | [diff] [blame] | 2 | * U-Boot - x86 Startup Code |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 3 | * |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 4 | * (C) Copyright 2008-2011 |
| 5 | * Graeme Russ, <graeme.russ@gmail.com> |
| 6 | * |
| 7 | * (C) Copyright 2002 |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 8 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 9 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 13 | #include <config.h> |
Graeme Russ | 161b358 | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 14 | #include <asm/global_data.h> |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 15 | #include <asm/post.h> |
Graeme Russ | 109ad14 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 16 | #include <asm/processor.h> |
Graeme Russ | 0c24c9c | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 17 | #include <asm/processor-flags.h> |
Graeme Russ | 9e6c572 | 2011-12-31 22:58:15 +1100 | [diff] [blame] | 18 | #include <generated/generic-asm-offsets.h> |
Bin Meng | fe0c33a | 2014-12-12 21:05:22 +0800 | [diff] [blame] | 19 | #include <generated/asm-offsets.h> |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 20 | |
Simon Glass | e5aa8a9 | 2016-03-16 07:44:40 -0600 | [diff] [blame] | 21 | /* |
| 22 | * Define this to boot U-Boot from a 32-bit program which sets the GDT |
| 23 | * differently. This can be used to boot directly from any stage of coreboot, |
| 24 | * for example, bypassing the normal payload-loading feature. |
| 25 | * This is only useful for development. |
| 26 | */ |
| 27 | #undef LOAD_FROM_32_BIT |
| 28 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 29 | .section .text |
| 30 | .code32 |
| 31 | .globl _start |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 32 | .type _start, @function |
Graeme Russ | fea2572 | 2011-04-13 19:43:28 +1000 | [diff] [blame] | 33 | .globl _x86boot_start |
| 34 | _x86boot_start: |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 35 | /* |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 36 | * This is the fail-safe 32-bit bootstrap entry point. |
| 37 | * |
| 38 | * This code is used when booting from another boot loader like |
| 39 | * coreboot or EFI. So we repeat some of the same init found in |
| 40 | * start16. |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 41 | */ |
| 42 | cli |
| 43 | cld |
| 44 | |
Graeme Russ | 2f0e0cd | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 45 | /* Turn off cache (this might require a 486-class CPU) */ |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 46 | movl %cr0, %eax |
Graeme Russ | 0c24c9c | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 47 | orl $(X86_CR0_NW | X86_CR0_CD), %eax |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 48 | movl %eax, %cr0 |
| 49 | wbinvd |
| 50 | |
Gabe Black | 91d82a2 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 51 | /* Tell 32-bit code it is being entered from an in-RAM copy */ |
Simon Glass | 83ec7de | 2015-07-31 09:31:28 -0600 | [diff] [blame] | 52 | movl $GD_FLG_WARM_BOOT, %ebx |
Simon Glass | 42fde305 | 2015-08-04 12:33:57 -0600 | [diff] [blame] | 53 | |
| 54 | /* |
| 55 | * Zero the BIST (Built-In Self Test) value since we don't have it. |
| 56 | * It must be 0 or the previous loader would have reported an error. |
| 57 | */ |
| 58 | movl $0, %ebp |
| 59 | |
Gabe Black | 91d82a2 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 60 | jmp 1f |
Simon Glass | 83ec7de | 2015-07-31 09:31:28 -0600 | [diff] [blame] | 61 | |
| 62 | /* Add a way for tools to discover the _start entry point */ |
| 63 | .align 4 |
| 64 | .long 0x12345678 |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 65 | _start: |
Gabe Black | 91d82a2 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 66 | /* |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 67 | * This is the 32-bit cold-reset entry point, coming from start16. |
Simon Glass | 83ec7de | 2015-07-31 09:31:28 -0600 | [diff] [blame] | 68 | * Set %ebx to GD_FLG_COLD_BOOT to indicate this. |
Gabe Black | 91d82a2 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 69 | */ |
Simon Glass | 83ec7de | 2015-07-31 09:31:28 -0600 | [diff] [blame] | 70 | movl $GD_FLG_COLD_BOOT, %ebx |
Simon Glass | 42fde305 | 2015-08-04 12:33:57 -0600 | [diff] [blame] | 71 | |
Simon Glass | f67cd51 | 2014-11-06 13:20:10 -0700 | [diff] [blame] | 72 | /* Save BIST */ |
| 73 | movl %eax, %ebp |
Simon Glass | 42fde305 | 2015-08-04 12:33:57 -0600 | [diff] [blame] | 74 | 1: |
| 75 | |
| 76 | /* Save table pointer */ |
| 77 | movl %ecx, %esi |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 78 | |
Simon Glass | e5aa8a9 | 2016-03-16 07:44:40 -0600 | [diff] [blame] | 79 | #ifdef LOAD_FROM_32_BIT |
| 80 | lgdt gdt_ptr2 |
| 81 | #endif |
| 82 | |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 83 | /* Load the segement registers to match the GDT loaded in start16.S */ |
Graeme Russ | 109ad14 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 84 | movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax |
Graeme Russ | 8ffb2e8 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 85 | movw %ax, %fs |
| 86 | movw %ax, %ds |
| 87 | movw %ax, %gs |
| 88 | movw %ax, %es |
| 89 | movw %ax, %ss |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 90 | |
Mike Williams | 1626308 | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 91 | /* Clear the interrupt vectors */ |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 92 | lidt blank_idt_ptr |
| 93 | |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 94 | /* |
| 95 | * Critical early platform init - generally not used, we prefer init |
| 96 | * to happen later when we have a console, in case something goes |
| 97 | * wrong. |
| 98 | */ |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 99 | jmp early_board_init |
Graeme Russ | 88fa0a6 | 2010-10-07 20:03:27 +1100 | [diff] [blame] | 100 | .globl early_board_init_ret |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 101 | early_board_init_ret: |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 102 | post_code(POST_START) |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 103 | |
Graeme Russ | ed4cba7 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 104 | /* Initialise Cache-As-RAM */ |
| 105 | jmp car_init |
| 106 | .globl car_init_ret |
| 107 | car_init_ret: |
Bin Meng | bceb9f0 | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 108 | #ifndef CONFIG_HAVE_FSP |
Graeme Russ | ed4cba7 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 109 | /* |
| 110 | * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, |
| 111 | * or fully initialised SDRAM - we really don't care which) |
| 112 | * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 113 | * and early malloc() area. The MRC requires some space at the top. |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 114 | * |
| 115 | * Stack grows down from top of CAR. We have: |
| 116 | * |
| 117 | * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE |
Simon Glass | 65dd74a | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 118 | * MRC area |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 119 | * global_data with x86 global descriptor table |
Simon Glass | 76f90f3 | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 120 | * early malloc area |
| 121 | * stack |
| 122 | * bottom-> CONFIG_SYS_CAR_ADDR |
Graeme Russ | ed4cba7 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 123 | */ |
Simon Glass | 65dd74a | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 124 | movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp |
| 125 | #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE |
| 126 | subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp |
| 127 | #endif |
Bin Meng | bceb9f0 | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 128 | #else |
| 129 | /* |
Bin Meng | 48aa6c2 | 2015-08-20 06:40:20 -0700 | [diff] [blame] | 130 | * U-Boot enters here twice. For the first time it comes from |
| 131 | * car_init_done() with esp points to a temporary stack and esi |
| 132 | * set to zero. For the second time it comes from fsp_init_done() |
| 133 | * with esi holding the HOB list address returned by the FSP. |
Bin Meng | bceb9f0 | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 134 | */ |
| 135 | #endif |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 136 | /* Set up global data */ |
| 137 | mov %esp, %eax |
Albert ARIBAUD | ecc3066 | 2015-11-25 17:56:32 +0100 | [diff] [blame] | 138 | call board_init_f_alloc_reserve |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 139 | mov %eax, %esp |
Albert ARIBAUD | ecc3066 | 2015-11-25 17:56:32 +0100 | [diff] [blame] | 140 | call board_init_f_init_reserve |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 141 | |
Simon Glass | 60994a0 | 2015-10-18 19:51:26 -0600 | [diff] [blame] | 142 | #ifdef CONFIG_DEBUG_UART |
| 143 | call debug_uart_init |
| 144 | #endif |
Simon Glass | bbbe55f | 2015-08-02 18:07:21 -0600 | [diff] [blame] | 145 | |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 146 | /* Get address of global_data */ |
| 147 | mov %fs:0, %edx |
Bin Meng | bceb9f0 | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 148 | #ifdef CONFIG_HAVE_FSP |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 149 | /* Store the HOB list if we have one */ |
Bin Meng | aefaff8 | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 150 | test %esi, %esi |
| 151 | jz skip_hob |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 152 | movl %esi, GD_HOB_LIST(%edx) |
Bin Meng | bceb9f0 | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 153 | |
Bin Meng | 57b10f5 | 2015-08-20 06:40:19 -0700 | [diff] [blame] | 154 | /* |
| 155 | * After fsp_init() returns, the stack has already been switched to a |
| 156 | * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR. |
| 157 | * Enlarge the size of malloc() pool before relocation since we have |
| 158 | * plenty of memory now. |
| 159 | */ |
| 160 | subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp |
| 161 | movl %esp, GD_MALLOC_BASE(%edx) |
Bin Meng | aefaff8 | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 162 | skip_hob: |
Simon Glass | 42fde305 | 2015-08-04 12:33:57 -0600 | [diff] [blame] | 163 | #else |
| 164 | /* Store table pointer */ |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 165 | movl %esi, GD_TABLE(%edx) |
Bin Meng | aefaff8 | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 166 | #endif |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 167 | /* Store BIST */ |
| 168 | movl %ebp, GD_BIST(%edx) |
Graeme Russ | 9e6c572 | 2011-12-31 22:58:15 +1100 | [diff] [blame] | 169 | |
Graeme Russ | 96cd664 | 2011-02-12 15:11:54 +1100 | [diff] [blame] | 170 | /* Set parameter to board_init_f() to boot flags */ |
Simon Glass | d1cd045 | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 171 | post_code(POST_START_DONE) |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 172 | xorl %eax, %eax |
Graeme Russ | 161b358 | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 173 | |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 174 | /* Enter, U-Boot! */ |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 175 | call board_init_f |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 176 | |
| 177 | /* indicate (lack of) progress */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 178 | movw $0x85, %ax |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 179 | jmp die |
| 180 | |
Graeme Russ | f48dd6f | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 181 | .globl board_init_f_r_trampoline |
| 182 | .type board_init_f_r_trampoline, @function |
| 183 | board_init_f_r_trampoline: |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 184 | /* |
| 185 | * SDRAM has been initialised, U-Boot code has been copied into |
| 186 | * RAM, BSS has been cleared and relocation adjustments have been |
| 187 | * made. It is now time to jump into the in-RAM copy of U-Boot |
| 188 | * |
Graeme Russ | f48dd6f | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 189 | * %eax = Address of top of new stack |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 190 | */ |
| 191 | |
Graeme Russ | 8d61625 | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 192 | /* Stack grows down from top of SDRAM */ |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 193 | movl %eax, %esp |
| 194 | |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 195 | /* See if we need to disable CAR */ |
Simon Glass | 801d70c | 2015-01-01 16:18:13 -0700 | [diff] [blame] | 196 | .weak car_uninit |
| 197 | movl $car_uninit, %eax |
| 198 | cmpl $0, %eax |
| 199 | jz 1f |
| 200 | |
| 201 | call car_uninit |
| 202 | 1: |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 203 | /* Re-enter U-Boot by calling board_init_f_r() */ |
Graeme Russ | f48dd6f | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 204 | call board_init_f_r |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 205 | |
Graeme Russ | 2f0e0cd | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 206 | die: |
| 207 | hlt |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 208 | jmp die |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 209 | hlt |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 210 | |
| 211 | blank_idt_ptr: |
| 212 | .word 0 /* limit */ |
| 213 | .long 0 /* base */ |
Graeme Russ | a206cc2 | 2011-11-08 02:33:19 +0000 | [diff] [blame] | 214 | |
| 215 | .p2align 2 /* force 4-byte alignment */ |
| 216 | |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 217 | /* Add a multiboot header so U-Boot can be loaded by GRUB2 */ |
Graeme Russ | a206cc2 | 2011-11-08 02:33:19 +0000 | [diff] [blame] | 218 | multiboot_header: |
| 219 | /* magic */ |
Simon Glass | da3a95d | 2015-07-31 09:31:25 -0600 | [diff] [blame] | 220 | .long 0x1badb002 |
Graeme Russ | a206cc2 | 2011-11-08 02:33:19 +0000 | [diff] [blame] | 221 | /* flags */ |
| 222 | .long (1 << 16) |
| 223 | /* checksum */ |
| 224 | .long -0x1BADB002 - (1 << 16) |
| 225 | /* header addr */ |
| 226 | .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE |
| 227 | /* load addr */ |
| 228 | .long CONFIG_SYS_TEXT_BASE |
| 229 | /* load end addr */ |
| 230 | .long 0 |
| 231 | /* bss end addr */ |
| 232 | .long 0 |
| 233 | /* entry addr */ |
| 234 | .long CONFIG_SYS_TEXT_BASE |
Simon Glass | e5aa8a9 | 2016-03-16 07:44:40 -0600 | [diff] [blame] | 235 | |
| 236 | #ifdef LOAD_FROM_32_BIT |
| 237 | /* |
| 238 | * The following Global Descriptor Table is just enough to get us into |
| 239 | * 'Flat Protected Mode' - It will be discarded as soon as the final |
| 240 | * GDT is setup in a safe location in RAM |
| 241 | */ |
| 242 | gdt_ptr2: |
| 243 | .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */ |
| 244 | .long gdt_rom2 /* base */ |
| 245 | |
| 246 | /* Some CPUs are picky about GDT alignment... */ |
| 247 | .align 16 |
| 248 | .globl gdt_rom2 |
| 249 | gdt_rom2: |
| 250 | /* |
| 251 | * The GDT table ... |
| 252 | * |
| 253 | * Selector Type |
| 254 | * 0x00 NULL |
| 255 | * 0x08 Unused |
| 256 | * 0x10 32bit code |
| 257 | * 0x18 32bit data/stack |
| 258 | */ |
| 259 | /* The NULL Desciptor - Mandatory */ |
| 260 | .word 0x0000 /* limit_low */ |
| 261 | .word 0x0000 /* base_low */ |
| 262 | .byte 0x00 /* base_middle */ |
| 263 | .byte 0x00 /* access */ |
| 264 | .byte 0x00 /* flags + limit_high */ |
| 265 | .byte 0x00 /* base_high */ |
| 266 | |
| 267 | /* Unused Desciptor - (matches Linux) */ |
| 268 | .word 0x0000 /* limit_low */ |
| 269 | .word 0x0000 /* base_low */ |
| 270 | .byte 0x00 /* base_middle */ |
| 271 | .byte 0x00 /* access */ |
| 272 | .byte 0x00 /* flags + limit_high */ |
| 273 | .byte 0x00 /* base_high */ |
| 274 | |
| 275 | /* |
| 276 | * The Code Segment Descriptor: |
| 277 | * - Base = 0x00000000 |
| 278 | * - Size = 4GB |
| 279 | * - Access = Present, Ring 0, Exec (Code), Readable |
| 280 | * - Flags = 4kB Granularity, 32-bit |
| 281 | */ |
| 282 | .word 0xffff /* limit_low */ |
| 283 | .word 0x0000 /* base_low */ |
| 284 | .byte 0x00 /* base_middle */ |
| 285 | .byte 0x9b /* access */ |
| 286 | .byte 0xcf /* flags + limit_high */ |
| 287 | .byte 0x00 /* base_high */ |
| 288 | |
| 289 | /* |
| 290 | * The Data Segment Descriptor: |
| 291 | * - Base = 0x00000000 |
| 292 | * - Size = 4GB |
| 293 | * - Access = Present, Ring 0, Non-Exec (Data), Writable |
| 294 | * - Flags = 4kB Granularity, 32-bit |
| 295 | */ |
| 296 | .word 0xffff /* limit_low */ |
| 297 | .word 0x0000 /* base_low */ |
| 298 | .byte 0x00 /* base_middle */ |
| 299 | .byte 0x93 /* access */ |
| 300 | .byte 0xcf /* flags + limit_high */ |
| 301 | .byte 0x00 /* base_high */ |
| 302 | #endif |