Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / 9bb621aad38e7314faa5da7a6189d42a5bdd9785 / . / configs / firefly-rk3288_defconfig
blob: 2f722082a3816c58bb4cc53888fc2f450e759b51 [file] [log] [blame]
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]1CONFIG_ARM=y
Tom Rinia2ac2b92021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
3CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
Tom Rinif76750d2021-12-11 14:55:51 -0500[diff] [blame]4CONFIG_SYS_ARCH_TIMER=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]5CONFIG_ARCH_ROCKCHIP=y
Kever Yangf74a0892019-10-16 16:50:03 +0800[diff] [blame]6CONFIG_SYS_TEXT_BASE=0x01000000
Tom Rini554e5512020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Tom Rini052170c2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_ENV_OFFSET=0x3F8000
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]10CONFIG_ROCKCHIP_RK3288=y
11CONFIG_TARGET_FIREFLY_RK3288=y
Tom Rini59e5d1e2019-11-11 20:04:24 -0500[diff] [blame]12CONFIG_SPL_STACK_R_ADDR=0x80000
Ovidiu Panait2dfdd0c2020-09-25 21:12:56 +0300[diff] [blame]13CONFIG_SPL_SIZE_LIMIT=0x40000
Tom Rini358b6a22018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BASE=0xff690000
15CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rinifb82fe32017-06-19 09:47:40 -0400[diff] [blame]16CONFIG_DEBUG_UART=y
Tom Rini49c8ef02021-08-23 10:25:31 -0400[diff] [blame]17CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini48f62322017-08-25 17:50:27 -0400[diff] [blame]18# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass37304aa2019-07-20 20:51:14 -0600[diff] [blame]19CONFIG_USE_PREBOOT=y
Klaus Gogera2a50532018-05-25 23:45:05 +0200[diff] [blame]20CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
Tom Rini0817daa2020-10-09 12:22:06 -0400[diff] [blame]21CONFIG_SILENT_CONSOLE=y
Mario Six78eba692018-03-28 14:38:17 +0200[diff] [blame]22CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]23CONFIG_SPL_STACK_R=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]24CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]25CONFIG_CMD_GPIO=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]26CONFIG_CMD_GPT=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]27CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]28CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]29CONFIG_CMD_SPI=y
Eddie Caic00d1652017-03-07 12:47:07 +0800[diff] [blame]30CONFIG_CMD_USB=y
Urja Rannikkoa186e8a2019-05-13 13:51:04 +0000[diff] [blame]31CONFIG_CMD_USB_MASS_STORAGE=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]32# CONFIG_CMD_SETEXPR is not set
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]33CONFIG_CMD_CACHE=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]34CONFIG_CMD_TIME=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]35CONFIG_CMD_PMIC=y
36CONFIG_CMD_REGULATOR=y
Patrick Delaunayb0cf7332017-01-27 11:00:37 +0100[diff] [blame]37# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunaybd42a942017-01-27 11:00:41 +0100[diff] [blame]38# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]39CONFIG_SPL_PARTITION_UUIDS=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]40CONFIG_SPL_OF_CONTROL=y
Simon Glass56d69772016-05-14 14:03:00 -0600[diff] [blame]41CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5dc4dfd2017-08-28 07:16:32 -0400[diff] [blame]42CONFIG_ENV_IS_IN_MMC=y
Tom Rini8d8ee472019-11-12 22:46:36 -0500[diff] [blame]43CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Romain Perier1caec072017-01-17 10:32:25 +0100[diff] [blame]44CONFIG_NET_RANDOM_ETHADDR=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]45CONFIG_REGMAP=y
huang lin41c7f662015-11-17 14:20:13 +0800[diff] [blame]46CONFIG_SPL_REGMAP=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]47CONFIG_SYSCON=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]48CONFIG_SPL_SYSCON=y
Simon Glass79918092016-01-21 19:43:49 -0700[diff] [blame]49# CONFIG_SPL_SIMPLE_BUS is not set
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]50CONFIG_CLK=y
51CONFIG_SPL_CLK=y
Alex Kiernan65c96752018-05-29 15:30:55 +0000[diff] [blame]52CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]53CONFIG_ROCKCHIP_GPIO=y
54CONFIG_SYS_I2C_ROCKCHIP=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]55CONFIG_LED=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]56CONFIG_LED_GPIO=y
Masahiro Yamada55ed3b42017-01-10 13:32:04 +0900[diff] [blame]57CONFIG_MMC_DW=y
Masahiro Yamadafed44082017-01-10 13:32:03 +0900[diff] [blame]58CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal888f1842019-10-03 19:50:05 +0200[diff] [blame]59CONFIG_MTD=y
Patrick Delaunay14453fb2019-02-27 15:20:36 +0100[diff] [blame]60CONFIG_SF_DEFAULT_SPEED=20000000
Sjoerd Simons8c3018e2017-01-11 11:46:12 +0100[diff] [blame]61CONFIG_DM_ETH=y
Sjoerd Simons8c3018e2017-01-11 11:46:12 +0100[diff] [blame]62CONFIG_ETH_DESIGNWARE=y
63CONFIG_GMAC_ROCKCHIP=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]64CONFIG_PINCTRL=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]65CONFIG_SPL_PINCTRL=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]66CONFIG_DM_PMIC=y
Simon Glass889b8a32016-01-21 19:45:20 -0700[diff] [blame]67# CONFIG_SPL_PMIC_CHILDREN is not set
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]68CONFIG_PMIC_ACT8846=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]69CONFIG_REGULATOR_ACT8846=y
Simon Glass4edb9452016-02-22 22:55:40 -0700[diff] [blame]70CONFIG_DM_REGULATOR_FIXED=y
Simon Glass889b8a32016-01-21 19:45:20 -0700[diff] [blame]71CONFIG_PWM_ROCKCHIP=y
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]72CONFIG_RAM=y
73CONFIG_SPL_RAM=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]74CONFIG_DEBUG_UART_SHIFT=2
Tom Riniaca5cd22016-09-08 16:11:59 -0400[diff] [blame]75CONFIG_SYSRESET=y
Eddie Caic00d1652017-03-07 12:47:07 +0800[diff] [blame]76CONFIG_USB=y
Philipp Tomsich4ac72f52017-07-03 18:30:06 +0200[diff] [blame]77CONFIG_USB_DWC2=y
Adam Ford65748642018-01-02 10:39:52 -0600[diff] [blame]78CONFIG_ROCKCHIP_USB2_PHY=y
Tom Rinieddc7da2017-07-31 18:59:01 -0400[diff] [blame]79CONFIG_USB_KEYBOARD=y
Chris Packhamae358442017-08-28 20:50:45 +1200[diff] [blame]80CONFIG_USB_HOST_ETHER=y
Chris Packhamf58ad982017-08-28 20:50:46 +1200[diff] [blame]81CONFIG_USB_ETHER_ASIX=y
82CONFIG_USB_ETHER_SMSC95XX=y
Tom Rinidf59b7d2021-07-26 21:10:37 -0400[diff] [blame]83CONFIG_USB_GADGET=y
84CONFIG_USB_GADGET_DWC2_OTG=y
Simon Glass889b8a32016-01-21 19:45:20 -0700[diff] [blame]85CONFIG_DM_VIDEO=y
Anatolij Gustschin8a6ffed2020-02-04 22:43:06 +0100[diff] [blame]86# CONFIG_VIDEO_BPP8 is not set
Anatolij Gustschin7588c312016-01-25 17:17:22 +0100[diff] [blame]87CONFIG_DISPLAY=y
Simon Glass889b8a32016-01-21 19:45:20 -0700[diff] [blame]88CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.comb98f0a32017-04-17 22:24:23 +0800[diff] [blame]89CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Simon Glassb87ca802016-10-17 20:12:57 -0600[diff] [blame]90CONFIG_CONSOLE_SCROLL_LINES=10
Simon Glass17aa5482015-08-30 16:55:41 -0600[diff] [blame]91CONFIG_CMD_DHRYSTONE=y
92CONFIG_ERRNO_STR=y