blob: b6422d7d7aafd0f7b187342ae01212275d97a1e8 [file] [log] [blame]
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001/*-
2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
michaeldb632992008-12-10 17:55:19 +01003 * Copyright (c) 2008, Excito Elektronik i Skåne AB
Remy Böhmerc0d722f2008-12-13 22:51:58 +01004 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
5 *
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01006 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
11 * the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010023#include <common.h>
michaeldb632992008-12-10 17:55:19 +010024#include <asm/byteorder.h>
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010025#include <usb.h>
26#include <asm/io.h>
michaeldb632992008-12-10 17:55:19 +010027#include <malloc.h>
Stefan Roese67333f72010-11-26 15:43:28 +010028#include <watchdog.h>
Jean-Christophe PLAGNIOL-VILLARD2731b9a2009-04-03 12:46:58 +020029
30#include "ehci.h"
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010031
32int rootdev;
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +010033struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010034volatile struct ehci_hcor *hcor;
35
36static uint16_t portreset;
37static struct QH qh_list __attribute__((aligned(32)));
38
michaeldb632992008-12-10 17:55:19 +010039static struct descriptor {
40 struct usb_hub_descriptor hub;
41 struct usb_device_descriptor device;
42 struct usb_linux_config_descriptor config;
43 struct usb_linux_interface_descriptor interface;
44 struct usb_endpoint_descriptor endpoint;
45} __attribute__ ((packed)) descriptor = {
46 {
47 0x8, /* bDescLength */
48 0x29, /* bDescriptorType: hub descriptor */
49 2, /* bNrPorts -- runtime modified */
50 0, /* wHubCharacteristics */
Vincent Palatin5f4b4f22011-12-05 14:52:22 -080051 10, /* bPwrOn2PwrGood */
michaeldb632992008-12-10 17:55:19 +010052 0, /* bHubCntrCurrent */
53 {}, /* Device removable */
54 {} /* at most 7 ports! XXX */
55 },
56 {
57 0x12, /* bLength */
58 1, /* bDescriptorType: UDESC_DEVICE */
Sergei Shtylyov6d313c82010-02-27 21:29:42 +030059 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
michaeldb632992008-12-10 17:55:19 +010060 9, /* bDeviceClass: UDCLASS_HUB */
61 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
62 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
63 64, /* bMaxPacketSize: 64 bytes */
64 0x0000, /* idVendor */
65 0x0000, /* idProduct */
Sergei Shtylyov6d313c82010-02-27 21:29:42 +030066 cpu_to_le16(0x0100), /* bcdDevice */
michaeldb632992008-12-10 17:55:19 +010067 1, /* iManufacturer */
68 2, /* iProduct */
69 0, /* iSerialNumber */
70 1 /* bNumConfigurations: 1 */
71 },
72 {
73 0x9,
74 2, /* bDescriptorType: UDESC_CONFIG */
75 cpu_to_le16(0x19),
76 1, /* bNumInterface */
77 1, /* bConfigurationValue */
78 0, /* iConfiguration */
79 0x40, /* bmAttributes: UC_SELF_POWER */
80 0 /* bMaxPower */
81 },
82 {
83 0x9, /* bLength */
84 4, /* bDescriptorType: UDESC_INTERFACE */
85 0, /* bInterfaceNumber */
86 0, /* bAlternateSetting */
87 1, /* bNumEndpoints */
88 9, /* bInterfaceClass: UICLASS_HUB */
89 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
90 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
91 0 /* iInterface */
92 },
93 {
94 0x7, /* bLength */
95 5, /* bDescriptorType: UDESC_ENDPOINT */
96 0x81, /* bEndpointAddress:
97 * UE_DIR_IN | EHCI_INTR_ENDPT
98 */
99 3, /* bmAttributes: UE_INTERRUPT */
Tom Rix8f8bd562009-10-31 12:37:38 -0500100 8, /* wMaxPacketSize */
michaeldb632992008-12-10 17:55:19 +0100101 255 /* bInterval */
102 },
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100103};
104
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100105#if defined(CONFIG_EHCI_IS_TDI)
106#define ehci_is_TDI() (1)
107#else
108#define ehci_is_TDI() (0)
109#endif
110
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100111#if defined(CONFIG_EHCI_DCACHE)
112/*
113 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
114 * structures and data buffers. This is needed on platforms using this
115 * EHCI support with dcache enabled.
116 */
117static void flush_invalidate(u32 addr, int size, int flush)
118{
119 if (flush)
120 flush_dcache_range(addr, addr + size);
121 else
122 invalidate_dcache_range(addr, addr + size);
123}
124
125static void cache_qtd(struct qTD *qtd, int flush)
126{
127 u32 *ptr = (u32 *)qtd->qt_buffer[0];
128 int len = (qtd->qt_token & 0x7fff0000) >> 16;
129
130 flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
131 if (ptr && len)
132 flush_invalidate((u32)ptr, len, flush);
133}
134
135
136static inline struct QH *qh_addr(struct QH *qh)
137{
138 return (struct QH *)((u32)qh & 0xffffffe0);
139}
140
141static void cache_qh(struct QH *qh, int flush)
142{
143 struct qTD *qtd;
144 struct qTD *next;
145 static struct qTD *first_qtd;
146
147 /*
148 * Walk the QH list and flush/invalidate all entries
149 */
150 while (1) {
151 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
152 if ((u32)qh & QH_LINK_TYPE_QH)
153 break;
154 qh = qh_addr(qh);
155 qh = (struct QH *)qh->qh_link;
156 }
157 qh = qh_addr(qh);
158
159 /*
160 * Save first qTD pointer, needed for invalidating pass on this QH
161 */
162 if (flush)
163 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
164 0xffffffe0);
165 else
166 qtd = first_qtd;
167
168 /*
169 * Walk the qTD list and flush/invalidate all entries
170 */
171 while (1) {
172 if (qtd == NULL)
173 break;
174 cache_qtd(qtd, flush);
175 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
176 if (next == qtd)
177 break;
178 qtd = next;
179 }
180}
181
182static inline void ehci_flush_dcache(struct QH *qh)
183{
184 cache_qh(qh, 1);
185}
186
187static inline void ehci_invalidate_dcache(struct QH *qh)
188{
189 cache_qh(qh, 0);
190}
191#else /* CONFIG_EHCI_DCACHE */
192/*
193 *
194 */
195static inline void ehci_flush_dcache(struct QH *qh)
196{
197}
198
199static inline void ehci_invalidate_dcache(struct QH *qh)
200{
201}
202#endif /* CONFIG_EHCI_DCACHE */
203
Marek Vasut3874b6d2011-07-11 02:37:01 +0200204void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
205{
206 mdelay(50);
207}
208
209void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
210 __attribute__((weak, alias("__ehci_powerup_fixup")));
211
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100212static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
michaeldb632992008-12-10 17:55:19 +0100213{
michael51ab1422008-12-11 13:43:55 +0100214 uint32_t result;
215 do {
216 result = ehci_readl(ptr);
Wolfgang Denk09c83a42010-10-22 14:23:00 +0200217 udelay(5);
michael51ab1422008-12-11 13:43:55 +0100218 if (result == ~(uint32_t)0)
219 return -1;
220 result &= mask;
221 if (result == done)
222 return 0;
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100223 usec--;
224 } while (usec > 0);
michael51ab1422008-12-11 13:43:55 +0100225 return -1;
226}
227
228static void ehci_free(void *p, size_t sz)
229{
230
231}
232
233static int ehci_reset(void)
234{
235 uint32_t cmd;
236 uint32_t tmp;
237 uint32_t *reg_ptr;
238 int ret = 0;
239
240 cmd = ehci_readl(&hcor->or_usbcmd);
Stefan Roese273d7202010-11-26 15:44:00 +0100241 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
michael51ab1422008-12-11 13:43:55 +0100242 ehci_writel(&hcor->or_usbcmd, cmd);
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100243 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
michael51ab1422008-12-11 13:43:55 +0100244 if (ret < 0) {
245 printf("EHCI fail to reset\n");
246 goto out;
247 }
248
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100249 if (ehci_is_TDI()) {
250 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
251 tmp = ehci_readl(reg_ptr);
252 tmp |= USBMODE_CM_HC;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100253#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100254 tmp |= USBMODE_BE;
michael51ab1422008-12-11 13:43:55 +0100255#endif
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100256 ehci_writel(reg_ptr, tmp);
257 }
Simon Glass9ab4ce22012-02-27 10:52:47 +0000258
259#ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
260 cmd = ehci_readl(&hcor->or_txfilltuning);
261 cmd &= ~TXFIFO_THRESH(0x3f);
262 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
263 ehci_writel(&hcor->or_txfilltuning, cmd);
264#endif
michael51ab1422008-12-11 13:43:55 +0100265out:
266 return ret;
michaeldb632992008-12-10 17:55:19 +0100267}
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100268
269static void *ehci_alloc(size_t sz, size_t align)
270{
271 static struct QH qh __attribute__((aligned(32)));
272 static struct qTD td[3] __attribute__((aligned (32)));
273 static int ntds;
274 void *p;
275
276 switch (sz) {
277 case sizeof(struct QH):
278 p = &qh;
279 ntds = 0;
280 break;
281 case sizeof(struct qTD):
282 if (ntds == 3) {
michaeldb632992008-12-10 17:55:19 +0100283 debug("out of TDs\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100284 return NULL;
285 }
286 p = &td[ntds];
287 ntds++;
288 break;
289 default:
michaeldb632992008-12-10 17:55:19 +0100290 debug("unknown allocation size\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100291 return NULL;
292 }
293
Sergei Shtylyov9fb3b502010-06-28 22:44:49 +0400294 memset(p, 0, sz);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100295 return p;
296}
297
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100298static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
299{
300 uint32_t addr, delta, next;
301 int idx;
302
303 addr = (uint32_t) buf;
304 idx = 0;
305 while (idx < 5) {
michaeldb632992008-12-10 17:55:19 +0100306 td->qt_buffer[idx] = cpu_to_hc32(addr);
Wolfgang Denk3ed16072010-10-19 16:13:15 +0200307 td->qt_buffer_hi[idx] = 0;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100308 next = (addr + 4096) & ~4095;
309 delta = next - addr;
310 if (delta >= sz)
311 break;
312 sz -= delta;
313 addr = next;
314 idx++;
315 }
316
317 if (idx == 5) {
michaeldb632992008-12-10 17:55:19 +0100318 debug("out of buffer pointers (%u bytes left)\n", sz);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100319 return -1;
320 }
321
322 return 0;
323}
324
325static int
326ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
327 int length, struct devrequest *req)
328{
329 struct QH *qh;
330 struct qTD *td;
331 volatile struct qTD *vtd;
332 unsigned long ts;
333 uint32_t *tdp;
334 uint32_t endpt, token, usbsts;
335 uint32_t c, toggle;
michaeldb632992008-12-10 17:55:19 +0100336 uint32_t cmd;
Simon Glass96820a32011-02-07 14:42:16 -0800337 int timeout;
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100338 int ret = 0;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100339
michaeldb632992008-12-10 17:55:19 +0100340 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100341 buffer, length, req);
342 if (req != NULL)
michaeldb632992008-12-10 17:55:19 +0100343 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100344 req->request, req->request,
345 req->requesttype, req->requesttype,
346 le16_to_cpu(req->value), le16_to_cpu(req->value),
michaeldb632992008-12-10 17:55:19 +0100347 le16_to_cpu(req->index));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100348
349 qh = ehci_alloc(sizeof(struct QH), 32);
350 if (qh == NULL) {
michaeldb632992008-12-10 17:55:19 +0100351 debug("unable to allocate QH\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100352 return -1;
353 }
michaeldb632992008-12-10 17:55:19 +0100354 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100355 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
356 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
357 endpt = (8 << 28) |
358 (c << 27) |
359 (usb_maxpacket(dev, pipe) << 16) |
360 (0 << 15) |
361 (1 << 14) |
362 (usb_pipespeed(pipe) << 12) |
363 (usb_pipeendpoint(pipe) << 8) |
364 (0 << 7) | (usb_pipedevice(pipe) << 0);
michaeldb632992008-12-10 17:55:19 +0100365 qh->qh_endpt1 = cpu_to_hc32(endpt);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100366 endpt = (1 << 30) |
367 (dev->portnr << 23) |
368 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
michaeldb632992008-12-10 17:55:19 +0100369 qh->qh_endpt2 = cpu_to_hc32(endpt);
370 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100371
372 td = NULL;
373 tdp = &qh->qh_overlay.qt_next;
374
375 toggle =
376 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
377
378 if (req != NULL) {
379 td = ehci_alloc(sizeof(struct qTD), 32);
380 if (td == NULL) {
michaeldb632992008-12-10 17:55:19 +0100381 debug("unable to allocate SETUP td\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100382 goto fail;
383 }
michaeldb632992008-12-10 17:55:19 +0100384 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
385 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100386 token = (0 << 31) |
387 (sizeof(*req) << 16) |
388 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
michaeldb632992008-12-10 17:55:19 +0100389 td->qt_token = cpu_to_hc32(token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100390 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
michaeldb632992008-12-10 17:55:19 +0100391 debug("unable construct SETUP td\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100392 ehci_free(td, sizeof(*td));
393 goto fail;
394 }
michaeldb632992008-12-10 17:55:19 +0100395 *tdp = cpu_to_hc32((uint32_t) td);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100396 tdp = &td->qt_next;
397 toggle = 1;
398 }
399
400 if (length > 0 || req == NULL) {
401 td = ehci_alloc(sizeof(struct qTD), 32);
402 if (td == NULL) {
michaeldb632992008-12-10 17:55:19 +0100403 debug("unable to allocate DATA td\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100404 goto fail;
405 }
michaeldb632992008-12-10 17:55:19 +0100406 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
407 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100408 token = (toggle << 31) |
409 (length << 16) |
410 ((req == NULL ? 1 : 0) << 15) |
411 (0 << 12) |
412 (3 << 10) |
413 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
michaeldb632992008-12-10 17:55:19 +0100414 td->qt_token = cpu_to_hc32(token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100415 if (ehci_td_buffer(td, buffer, length) != 0) {
michaeldb632992008-12-10 17:55:19 +0100416 debug("unable construct DATA td\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100417 ehci_free(td, sizeof(*td));
418 goto fail;
419 }
michaeldb632992008-12-10 17:55:19 +0100420 *tdp = cpu_to_hc32((uint32_t) td);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100421 tdp = &td->qt_next;
422 }
423
424 if (req != NULL) {
425 td = ehci_alloc(sizeof(struct qTD), 32);
426 if (td == NULL) {
michaeldb632992008-12-10 17:55:19 +0100427 debug("unable to allocate ACK td\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100428 goto fail;
429 }
michaeldb632992008-12-10 17:55:19 +0100430 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
431 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100432 token = (toggle << 31) |
433 (0 << 16) |
434 (1 << 15) |
435 (0 << 12) |
436 (3 << 10) |
437 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
michaeldb632992008-12-10 17:55:19 +0100438 td->qt_token = cpu_to_hc32(token);
439 *tdp = cpu_to_hc32((uint32_t) td);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100440 tdp = &td->qt_next;
441 }
442
michaeldb632992008-12-10 17:55:19 +0100443 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100444
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100445 /* Flush dcache */
446 ehci_flush_dcache(&qh_list);
447
michael51ab1422008-12-11 13:43:55 +0100448 usbsts = ehci_readl(&hcor->or_usbsts);
449 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100450
451 /* Enable async. schedule. */
michael51ab1422008-12-11 13:43:55 +0100452 cmd = ehci_readl(&hcor->or_usbcmd);
453 cmd |= CMD_ASE;
454 ehci_writel(&hcor->or_usbcmd, cmd);
michaeldb632992008-12-10 17:55:19 +0100455
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100456 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
457 100 * 1000);
458 if (ret < 0) {
459 printf("EHCI fail timeout STD_ASS set\n");
460 goto fail;
michael51ab1422008-12-11 13:43:55 +0100461 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100462
463 /* Wait for TDs to be processed. */
464 ts = get_timer(0);
465 vtd = td;
Simon Glass96820a32011-02-07 14:42:16 -0800466 timeout = USB_TIMEOUT_MS(pipe);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100467 do {
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100468 /* Invalidate dcache */
469 ehci_invalidate_dcache(&qh_list);
michaeldb632992008-12-10 17:55:19 +0100470 token = hc32_to_cpu(vtd->qt_token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100471 if (!(token & 0x80))
472 break;
Stefan Roese67333f72010-11-26 15:43:28 +0100473 WATCHDOG_RESET();
Simon Glass96820a32011-02-07 14:42:16 -0800474 } while (get_timer(ts) < timeout);
475
476 /* Check that the TD processing happened */
477 if (token & 0x80) {
478 printf("EHCI timed out on TD - token=%#x\n", token);
Simon Glass96820a32011-02-07 14:42:16 -0800479 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100480
481 /* Disable async schedule. */
michael51ab1422008-12-11 13:43:55 +0100482 cmd = ehci_readl(&hcor->or_usbcmd);
michaeldb632992008-12-10 17:55:19 +0100483 cmd &= ~CMD_ASE;
michael51ab1422008-12-11 13:43:55 +0100484 ehci_writel(&hcor->or_usbcmd, cmd);
485
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100486 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
487 100 * 1000);
488 if (ret < 0) {
489 printf("EHCI fail timeout STD_ASS reset\n");
490 goto fail;
michael51ab1422008-12-11 13:43:55 +0100491 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100492
michaeldb632992008-12-10 17:55:19 +0100493 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100494
michaeldb632992008-12-10 17:55:19 +0100495 token = hc32_to_cpu(qh->qh_overlay.qt_token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100496 if (!(token & 0x80)) {
michaeldb632992008-12-10 17:55:19 +0100497 debug("TOKEN=%#x\n", token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100498 switch (token & 0xfc) {
499 case 0:
500 toggle = token >> 31;
501 usb_settoggle(dev, usb_pipeendpoint(pipe),
502 usb_pipeout(pipe), toggle);
503 dev->status = 0;
504 break;
505 case 0x40:
506 dev->status = USB_ST_STALLED;
507 break;
508 case 0xa0:
509 case 0x20:
510 dev->status = USB_ST_BUF_ERR;
511 break;
512 case 0x50:
513 case 0x10:
514 dev->status = USB_ST_BABBLE_DET;
515 break;
516 default:
517 dev->status = USB_ST_CRC_ERR;
Anatolij Gustschin222d6df2010-11-02 11:47:29 +0100518 if ((token & 0x40) == 0x40)
519 dev->status |= USB_ST_STALLED;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100520 break;
521 }
522 dev->act_len = length - ((token >> 16) & 0x7fff);
523 } else {
524 dev->act_len = 0;
michaeldb632992008-12-10 17:55:19 +0100525 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
michael51ab1422008-12-11 13:43:55 +0100526 dev->devnum, ehci_readl(&hcor->or_usbsts),
527 ehci_readl(&hcor->or_portsc[0]),
528 ehci_readl(&hcor->or_portsc[1]));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100529 }
530
531 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
532
533fail:
michaeldb632992008-12-10 17:55:19 +0100534 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100535 while (td != (void *)QT_NEXT_TERMINATE) {
536 qh->qh_overlay.qt_next = td->qt_next;
537 ehci_free(td, sizeof(*td));
michaeldb632992008-12-10 17:55:19 +0100538 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100539 }
540 ehci_free(qh, sizeof(*qh));
541 return -1;
542}
543
544static inline int min3(int a, int b, int c)
545{
546
547 if (b < a)
548 a = b;
549 if (c < a)
550 a = c;
551 return a;
552}
553
michaeldb632992008-12-10 17:55:19 +0100554int
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100555ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
556 int length, struct devrequest *req)
557{
558 uint8_t tmpbuf[4];
559 u16 typeReq;
michaeldb632992008-12-10 17:55:19 +0100560 void *srcptr = NULL;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100561 int len, srclen;
562 uint32_t reg;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100563 uint32_t *status_reg;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100564
Sergei Shtylyove06a0552010-02-27 21:32:17 +0300565 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100566 printf("The request port(%d) is not configured\n",
567 le16_to_cpu(req->index) - 1);
568 return -1;
569 }
570 status_reg = (uint32_t *)&hcor->or_portsc[
571 le16_to_cpu(req->index) - 1];
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100572 srclen = 0;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100573
michaeldb632992008-12-10 17:55:19 +0100574 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100575 req->request, req->request,
576 req->requesttype, req->requesttype,
577 le16_to_cpu(req->value), le16_to_cpu(req->index));
578
Prafulla Wadaskar44259bb2009-07-17 19:56:30 +0530579 typeReq = req->request | req->requesttype << 8;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100580
Prafulla Wadaskar44259bb2009-07-17 19:56:30 +0530581 switch (typeReq) {
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100582 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
583 switch (le16_to_cpu(req->value) >> 8) {
584 case USB_DT_DEVICE:
michaeldb632992008-12-10 17:55:19 +0100585 debug("USB_DT_DEVICE request\n");
586 srcptr = &descriptor.device;
587 srclen = 0x12;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100588 break;
589 case USB_DT_CONFIG:
michaeldb632992008-12-10 17:55:19 +0100590 debug("USB_DT_CONFIG config\n");
591 srcptr = &descriptor.config;
592 srclen = 0x19;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100593 break;
594 case USB_DT_STRING:
michaeldb632992008-12-10 17:55:19 +0100595 debug("USB_DT_STRING config\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100596 switch (le16_to_cpu(req->value) & 0xff) {
597 case 0: /* Language */
598 srcptr = "\4\3\1\0";
599 srclen = 4;
600 break;
601 case 1: /* Vendor */
602 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
603 srclen = 14;
604 break;
605 case 2: /* Product */
606 srcptr = "\52\3E\0H\0C\0I\0 "
607 "\0H\0o\0s\0t\0 "
608 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
609 srclen = 42;
610 break;
611 default:
michaeldb632992008-12-10 17:55:19 +0100612 debug("unknown value DT_STRING %x\n",
613 le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100614 goto unknown;
615 }
616 break;
617 default:
michaeldb632992008-12-10 17:55:19 +0100618 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100619 goto unknown;
620 }
621 break;
622 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
623 switch (le16_to_cpu(req->value) >> 8) {
624 case USB_DT_HUB:
michaeldb632992008-12-10 17:55:19 +0100625 debug("USB_DT_HUB config\n");
626 srcptr = &descriptor.hub;
627 srclen = 0x8;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100628 break;
629 default:
michaeldb632992008-12-10 17:55:19 +0100630 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100631 goto unknown;
632 }
633 break;
634 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
michaeldb632992008-12-10 17:55:19 +0100635 debug("USB_REQ_SET_ADDRESS\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100636 rootdev = le16_to_cpu(req->value);
637 break;
638 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
michaeldb632992008-12-10 17:55:19 +0100639 debug("USB_REQ_SET_CONFIGURATION\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100640 /* Nothing to do */
641 break;
642 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
643 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
644 tmpbuf[1] = 0;
645 srcptr = tmpbuf;
646 srclen = 2;
647 break;
michaeldb632992008-12-10 17:55:19 +0100648 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100649 memset(tmpbuf, 0, 4);
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100650 reg = ehci_readl(status_reg);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100651 if (reg & EHCI_PS_CS)
652 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
653 if (reg & EHCI_PS_PE)
654 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
655 if (reg & EHCI_PS_SUSP)
656 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
657 if (reg & EHCI_PS_OCA)
658 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300659 if (reg & EHCI_PS_PR)
660 tmpbuf[0] |= USB_PORT_STAT_RESET;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100661 if (reg & EHCI_PS_PP)
662 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
Stefan Roese597eb282009-01-21 17:12:01 +0100663
664 if (ehci_is_TDI()) {
665 switch ((reg >> 26) & 3) {
666 case 0:
667 break;
668 case 1:
669 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
670 break;
671 case 2:
672 default:
673 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
674 break;
675 }
676 } else {
677 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
678 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100679
680 if (reg & EHCI_PS_CSC)
681 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
682 if (reg & EHCI_PS_PEC)
683 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
684 if (reg & EHCI_PS_OCC)
685 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
686 if (portreset & (1 << le16_to_cpu(req->index)))
687 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100688
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100689 srcptr = tmpbuf;
690 srclen = 4;
691 break;
michaeldb632992008-12-10 17:55:19 +0100692 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100693 reg = ehci_readl(status_reg);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100694 reg &= ~EHCI_PS_CLEAR;
695 switch (le16_to_cpu(req->value)) {
michael51ab1422008-12-11 13:43:55 +0100696 case USB_PORT_FEAT_ENABLE:
697 reg |= EHCI_PS_PE;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100698 ehci_writel(status_reg, reg);
michael51ab1422008-12-11 13:43:55 +0100699 break;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100700 case USB_PORT_FEAT_POWER:
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100701 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
702 reg |= EHCI_PS_PP;
703 ehci_writel(status_reg, reg);
704 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100705 break;
706 case USB_PORT_FEAT_RESET:
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100707 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
708 !ehci_is_TDI() &&
709 EHCI_PS_IS_LOWSPEED(reg)) {
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100710 /* Low speed device, give up ownership. */
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100711 debug("port %d low speed --> companion\n",
712 req->index - 1);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100713 reg |= EHCI_PS_PO;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100714 ehci_writel(status_reg, reg);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100715 break;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100716 } else {
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300717 int ret;
718
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100719 reg |= EHCI_PS_PR;
720 reg &= ~EHCI_PS_PE;
721 ehci_writel(status_reg, reg);
722 /*
723 * caller must wait, then call GetPortStatus
724 * usb 2.0 specification say 50 ms resets on
725 * root
726 */
Marek Vasut3874b6d2011-07-11 02:37:01 +0200727 ehci_powerup_fixup(status_reg, &reg);
728
Chris Zhangb4161912010-01-06 13:34:04 -0800729 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300730 /*
731 * A host controller must terminate the reset
732 * and stabilize the state of the port within
733 * 2 milliseconds
734 */
735 ret = handshake(status_reg, EHCI_PS_PR, 0,
736 2 * 1000);
737 if (!ret)
738 portreset |=
739 1 << le16_to_cpu(req->index);
740 else
741 printf("port(%d) reset error\n",
742 le16_to_cpu(req->index) - 1);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100743 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100744 break;
745 default:
michaeldb632992008-12-10 17:55:19 +0100746 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100747 goto unknown;
748 }
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100749 /* unblock posted writes */
Kumar Gala50243e32009-07-07 15:48:58 -0500750 (void) ehci_readl(&hcor->or_usbcmd);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100751 break;
michaeldb632992008-12-10 17:55:19 +0100752 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100753 reg = ehci_readl(status_reg);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100754 switch (le16_to_cpu(req->value)) {
755 case USB_PORT_FEAT_ENABLE:
756 reg &= ~EHCI_PS_PE;
757 break;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100758 case USB_PORT_FEAT_C_ENABLE:
759 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
760 break;
761 case USB_PORT_FEAT_POWER:
762 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
763 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100764 case USB_PORT_FEAT_C_CONNECTION:
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100765 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100766 break;
michael51ab1422008-12-11 13:43:55 +0100767 case USB_PORT_FEAT_OVER_CURRENT:
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100768 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
michael51ab1422008-12-11 13:43:55 +0100769 break;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100770 case USB_PORT_FEAT_C_RESET:
771 portreset &= ~(1 << le16_to_cpu(req->index));
772 break;
773 default:
michaeldb632992008-12-10 17:55:19 +0100774 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100775 goto unknown;
776 }
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100777 ehci_writel(status_reg, reg);
778 /* unblock posted write */
Kumar Gala50243e32009-07-07 15:48:58 -0500779 (void) ehci_readl(&hcor->or_usbcmd);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100780 break;
781 default:
michaeldb632992008-12-10 17:55:19 +0100782 debug("Unknown request\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100783 goto unknown;
784 }
785
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000786 mdelay(1);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100787 len = min3(srclen, le16_to_cpu(req->length), length);
788 if (srcptr != NULL && len > 0)
789 memcpy(buffer, srcptr, len);
michaeldb632992008-12-10 17:55:19 +0100790 else
791 debug("Len is 0\n");
792
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100793 dev->act_len = len;
794 dev->status = 0;
795 return 0;
796
797unknown:
michaeldb632992008-12-10 17:55:19 +0100798 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100799 req->requesttype, req->request, le16_to_cpu(req->value),
800 le16_to_cpu(req->index), le16_to_cpu(req->length));
801
802 dev->act_len = 0;
803 dev->status = USB_ST_STALLED;
804 return -1;
805}
806
807int usb_lowlevel_stop(void)
808{
809 return ehci_hcd_stop();
810}
811
812int usb_lowlevel_init(void)
813{
814 uint32_t reg;
michaeldb632992008-12-10 17:55:19 +0100815 uint32_t cmd;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100816
817 if (ehci_hcd_init() != 0)
818 return -1;
819
michael51ab1422008-12-11 13:43:55 +0100820 /* EHCI spec section 4.1 */
821 if (ehci_reset() != 0)
822 return -1;
823
Stefan Roese832e6142009-01-21 17:12:10 +0100824#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
825 if (ehci_hcd_init() != 0)
826 return -1;
827#endif
828
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100829 /* Set head of reclaim list */
830 memset(&qh_list, 0, sizeof(qh_list));
michaeldb632992008-12-10 17:55:19 +0100831 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
832 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
833 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
834 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
835 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
836 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100837
838 /* Set async. queue head pointer. */
michael51ab1422008-12-11 13:43:55 +0100839 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100840
michael51ab1422008-12-11 13:43:55 +0100841 reg = ehci_readl(&hccr->cr_hcsparams);
842 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
843 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100844 /* Port Indicators */
845 if (HCS_INDICATOR(reg))
michaeldb632992008-12-10 17:55:19 +0100846 descriptor.hub.wHubCharacteristics |= 0x80;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100847 /* Port Power Control */
848 if (HCS_PPC(reg))
michaeldb632992008-12-10 17:55:19 +0100849 descriptor.hub.wHubCharacteristics |= 0x01;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100850
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100851 /* Start the host controller. */
michael51ab1422008-12-11 13:43:55 +0100852 cmd = ehci_readl(&hcor->or_usbcmd);
Wolfgang Denkf15c6512009-02-12 00:08:39 +0100853 /*
854 * Philips, Intel, and maybe others need CMD_RUN before the
855 * root hub will detect new devices (why?); NEC doesn't
856 */
michael51ab1422008-12-11 13:43:55 +0100857 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
858 cmd |= CMD_RUN;
859 ehci_writel(&hcor->or_usbcmd, cmd);
860
861 /* take control over the ports */
862 cmd = ehci_readl(&hcor->or_configflag);
863 cmd |= FLAG_CF;
864 ehci_writel(&hcor->or_configflag, cmd);
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100865 /* unblock posted write */
michael51ab1422008-12-11 13:43:55 +0100866 cmd = ehci_readl(&hcor->or_usbcmd);
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000867 mdelay(5);
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100868 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
869 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100870
871 rootdev = 0;
872
873 return 0;
874}
875
876int
877submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
878 int length)
879{
880
881 if (usb_pipetype(pipe) != PIPE_BULK) {
882 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
883 return -1;
884 }
885 return ehci_submit_async(dev, pipe, buffer, length, NULL);
886}
887
888int
889submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
890 int length, struct devrequest *setup)
891{
892
893 if (usb_pipetype(pipe) != PIPE_CONTROL) {
894 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
895 return -1;
896 }
897
898 if (usb_pipedevice(pipe) == rootdev) {
899 if (rootdev == 0)
900 dev->speed = USB_SPEED_HIGH;
901 return ehci_submit_root(dev, pipe, buffer, length, setup);
902 }
903 return ehci_submit_async(dev, pipe, buffer, length, setup);
904}
905
906int
907submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
908 int length, int interval)
909{
910
911 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
912 dev, pipe, buffer, length, interval);
Marek Vasut7555d5e2011-09-25 21:07:56 +0200913 return ehci_submit_async(dev, pipe, buffer, length, NULL);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100914}
Marek Vasut7555d5e2011-09-25 21:07:56 +0200915