Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_EXYNOS=y |
| 3 | CONFIG_TARGET_SNOW=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 4 | CONFIG_DM_I2C=y |
Masahiro Yamada | f1ef2b6 | 2014-09-22 19:59:06 +0900 | [diff] [blame] | 5 | CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" |
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 6 | CONFIG_SPL=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 7 | CONFIG_SYS_PROMPT="snow # " |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 8 | # CONFIG_CMD_IMLS is not set |
| 9 | # CONFIG_CMD_SETEXPR is not set |
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 10 | CONFIG_CMD_SOUND=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 11 | CONFIG_CMD_PMIC=y |
| 12 | CONFIG_CMD_REGULATOR=y |
Simon Glass | 26468d5 | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 13 | CONFIG_CMD_TPM=y |
Simon Glass | eddb8cf | 2015-08-22 18:31:43 -0600 | [diff] [blame] | 14 | CONFIG_CMD_TPM_TEST=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 15 | CONFIG_DM_I2C_COMPAT=y |
| 16 | CONFIG_I2C_CROS_EC_LDO=y |
| 17 | CONFIG_I2C_MUX=y |
| 18 | CONFIG_I2C_ARB_GPIO_CHALLENGE=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 19 | CONFIG_CROS_EC_KEYB=y |
| 20 | CONFIG_CMD_CROS_EC=y |
| 21 | CONFIG_CROS_EC=y |
| 22 | CONFIG_CROS_EC_I2C=y |
| 23 | CONFIG_SPI_FLASH=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 24 | CONFIG_DM_PMIC=y |
| 25 | CONFIG_DM_PMIC_MAX77686=y |
| 26 | CONFIG_PMIC_S5M8767=y |
| 27 | CONFIG_PMIC_TPS65090=y |
| 28 | CONFIG_DM_REGULATOR=y |
| 29 | CONFIG_DM_REGULATOR_MAX77686=y |
| 30 | CONFIG_REGULATOR_S5M8767=y |
| 31 | CONFIG_REGULATOR_TPS65090=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 32 | CONFIG_DEBUG_UART=y |
| 33 | CONFIG_DEBUG_UART_S5P=y |
| 34 | CONFIG_DEBUG_UART_BASE=0x12c30000 |
| 35 | CONFIG_DEBUG_UART_CLOCK=100000000 |
Simon Glass | ef35d98 | 2015-03-06 13:19:08 -0700 | [diff] [blame] | 36 | CONFIG_SOUND=y |
Simon Glass | 00cf7bf | 2015-03-06 13:19:10 -0700 | [diff] [blame] | 37 | CONFIG_I2S=y |
Simon Glass | 6bd7be2 | 2015-03-06 13:19:11 -0700 | [diff] [blame] | 38 | CONFIG_I2S_SAMSUNG=y |
Simon Glass | 7a170a5 | 2015-03-06 13:19:12 -0700 | [diff] [blame] | 39 | CONFIG_SOUND_MAX98095=y |
Simon Glass | dd573f9 | 2015-03-06 13:19:13 -0700 | [diff] [blame] | 40 | CONFIG_SOUND_WM8994=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 41 | CONFIG_DM_TPM=y |
Christophe Ricard | 0766ad2 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 42 | CONFIG_TPM_TIS_INFINEON=y |
Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 43 | CONFIG_USB=y |
| 44 | CONFIG_DM_USB=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 45 | CONFIG_VIDEO_BRIDGE=y |
| 46 | CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y |
| 47 | CONFIG_VIDEO_BRIDGE_NXP_PTN3460=y |
Simon Glass | 26468d5 | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 48 | CONFIG_TPM=y |
Simon Glass | d4061aa | 2015-08-03 08:19:28 -0600 | [diff] [blame] | 49 | CONFIG_ERRNO_STR=y |